xref: /dpdk/drivers/net/intel/ipn3ke/ipn3ke_flow.h (revision c1d145834f287aa8cf53de914618a7312f2c360e)
1*c1d14583SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
2*c1d14583SBruce Richardson  * Copyright(c) 2019 Intel Corporation
3*c1d14583SBruce Richardson  */
4*c1d14583SBruce Richardson 
5*c1d14583SBruce Richardson #ifndef _IPN3KE_FLOW_H_
6*c1d14583SBruce Richardson #define _IPN3KE_FLOW_H_
7*c1d14583SBruce Richardson 
8*c1d14583SBruce Richardson /**
9*c1d14583SBruce Richardson  * Expand the length to DWORD alignment with 'Unused' field.
10*c1d14583SBruce Richardson  *
11*c1d14583SBruce Richardson  * FLOW KEY:
12*c1d14583SBruce Richardson  *  | Unused |Ruler id (id)  | Key1 Key2 … (data) |
13*c1d14583SBruce Richardson  *  |--------+---------------+--------------------|
14*c1d14583SBruce Richardson  *  | 17bits |    3 bits     |   Total 108 bits   |
15*c1d14583SBruce Richardson  * MSB                 --->                      LSB
16*c1d14583SBruce Richardson  *
17*c1d14583SBruce Richardson  * Note: And the MSb of key data is filled to 0 when it is less
18*c1d14583SBruce Richardson  *       than 108 bit.
19*c1d14583SBruce Richardson  */
20*c1d14583SBruce Richardson #define IPN3KE_FLOW_KEY_UNUSED_BITS  17
21*c1d14583SBruce Richardson #define IPN3KE_FLOW_KEY_ID_BITS      3
22*c1d14583SBruce Richardson #define IPN3KE_FLOW_KEY_DATA_BITS    108
23*c1d14583SBruce Richardson 
24*c1d14583SBruce Richardson #define IPN3KE_FLOW_KEY_TOTAL_BITS \
25*c1d14583SBruce Richardson 		(IPN3KE_FLOW_KEY_UNUSED_BITS + \
26*c1d14583SBruce Richardson 		IPN3KE_FLOW_KEY_ID_BITS + \
27*c1d14583SBruce Richardson 		IPN3KE_FLOW_KEY_DATA_BITS)
28*c1d14583SBruce Richardson 
29*c1d14583SBruce Richardson #define IPN3KE_FLOW_KEY_ID_OFFSET \
30*c1d14583SBruce Richardson 		(IPN3KE_FLOW_KEY_UNUSED_BITS)
31*c1d14583SBruce Richardson 
32*c1d14583SBruce Richardson #define IPN3KE_FLOW_KEY_DATA_OFFSET \
33*c1d14583SBruce Richardson 		(IPN3KE_FLOW_KEY_ID_OFFSET + IPN3KE_FLOW_KEY_ID_BITS)
34*c1d14583SBruce Richardson 
35*c1d14583SBruce Richardson /**
36*c1d14583SBruce Richardson  * Expand the length to DWORD alignment with 'Unused' field.
37*c1d14583SBruce Richardson  *
38*c1d14583SBruce Richardson  * FLOW RESULT:
39*c1d14583SBruce Richardson  *  |  Unused | enable (acl) |    uid       |
40*c1d14583SBruce Richardson  *  |---------+--------------+--------------|
41*c1d14583SBruce Richardson  *  | 15 bits |    1 bit     |   16 bits    |
42*c1d14583SBruce Richardson  * MSB              --->                   LSB
43*c1d14583SBruce Richardson  */
44*c1d14583SBruce Richardson 
45*c1d14583SBruce Richardson #define IPN3KE_FLOW_RESULT_UNUSED_BITS 15
46*c1d14583SBruce Richardson #define IPN3KE_FLOW_RESULT_ACL_BITS    1
47*c1d14583SBruce Richardson #define IPN3KE_FLOW_RESULT_UID_BITS    16
48*c1d14583SBruce Richardson 
49*c1d14583SBruce Richardson #define IPN3KE_FLOW_RESULT_TOTAL_BITS \
50*c1d14583SBruce Richardson 		(IPN3KE_FLOW_RESULT_UNUSED_BITS + \
51*c1d14583SBruce Richardson 		IPN3KE_FLOW_RESULT_ACL_BITS + \
52*c1d14583SBruce Richardson 		IPN3KE_FLOW_RESULT_UID_BITS)
53*c1d14583SBruce Richardson 
54*c1d14583SBruce Richardson #define IPN3KE_FLOW_RESULT_ACL_OFFSET \
55*c1d14583SBruce Richardson 		(IPN3KE_FLOW_RESULT_UNUSED_BITS)
56*c1d14583SBruce Richardson 
57*c1d14583SBruce Richardson #define IPN3KE_FLOW_RESULT_UID_OFFSET \
58*c1d14583SBruce Richardson 		(IPN3KE_FLOW_RESULT_ACL_OFFSET + IPN3KE_FLOW_RESULT_ACL_BITS)
59*c1d14583SBruce Richardson 
60*c1d14583SBruce Richardson #define IPN3KE_FLOW_RESULT_UID_MAX \
61*c1d14583SBruce Richardson 		((1UL << IPN3KE_FLOW_RESULT_UID_BITS) - 1)
62*c1d14583SBruce Richardson 
63*c1d14583SBruce Richardson #ifndef BITS_PER_BYTE
64*c1d14583SBruce Richardson #define BITS_PER_BYTE    8
65*c1d14583SBruce Richardson #endif
66*c1d14583SBruce Richardson #define BITS_TO_BYTES(bits) \
67*c1d14583SBruce Richardson 	(((bits) + BITS_PER_BYTE - 1) / BITS_PER_BYTE)
68*c1d14583SBruce Richardson 
69*c1d14583SBruce Richardson struct ipn3ke_flow_rule {
70*c1d14583SBruce Richardson 	uint8_t key[BITS_TO_BYTES(IPN3KE_FLOW_KEY_TOTAL_BITS)];
71*c1d14583SBruce Richardson 	uint8_t result[BITS_TO_BYTES(IPN3KE_FLOW_RESULT_TOTAL_BITS)];
72*c1d14583SBruce Richardson };
73*c1d14583SBruce Richardson 
74*c1d14583SBruce Richardson struct rte_flow {
75*c1d14583SBruce Richardson 	TAILQ_ENTRY(rte_flow) next; /**< Pointer to the next flow structure. */
76*c1d14583SBruce Richardson 
77*c1d14583SBruce Richardson 	struct ipn3ke_flow_rule rule;
78*c1d14583SBruce Richardson };
79*c1d14583SBruce Richardson 
80*c1d14583SBruce Richardson TAILQ_HEAD(ipn3ke_flow_list, rte_flow);
81*c1d14583SBruce Richardson 
82*c1d14583SBruce Richardson static inline uint16_t ipn3ke_swap16(uint16_t x)
83*c1d14583SBruce Richardson {
84*c1d14583SBruce Richardson 	return ((x & 0xff) << 8) | ((x >> 8) & 0xff);
85*c1d14583SBruce Richardson }
86*c1d14583SBruce Richardson 
87*c1d14583SBruce Richardson static inline uint32_t ipn3ke_swap32(uint32_t x)
88*c1d14583SBruce Richardson {
89*c1d14583SBruce Richardson 	uint32_t high, low;
90*c1d14583SBruce Richardson 	uint32_t high1, low1;
91*c1d14583SBruce Richardson 
92*c1d14583SBruce Richardson 	high = (x >> 16) & 0xffff;
93*c1d14583SBruce Richardson 	low = x & 0xffff;
94*c1d14583SBruce Richardson 	high1 = ipn3ke_swap16(low);
95*c1d14583SBruce Richardson 	high1 = high1 << 16;
96*c1d14583SBruce Richardson 	low1 = ipn3ke_swap16(high);
97*c1d14583SBruce Richardson 	low1 = low1 & 0xffff;
98*c1d14583SBruce Richardson 
99*c1d14583SBruce Richardson 	return high1 | low1;
100*c1d14583SBruce Richardson }
101*c1d14583SBruce Richardson 
102*c1d14583SBruce Richardson extern const struct rte_flow_ops ipn3ke_flow_ops;
103*c1d14583SBruce Richardson 
104*c1d14583SBruce Richardson int ipn3ke_flow_init(void *dev);
105*c1d14583SBruce Richardson 
106*c1d14583SBruce Richardson #endif /* _IPN3KE_FLOW_H_ */
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