1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Huawei Technologies Co., Ltd 3 */ 4 5 #ifndef _HINIC_PMD_ETHDEV_H_ 6 #define _HINIC_PMD_ETHDEV_H_ 7 8 #include <rte_ethdev.h> 9 #include <rte_ethdev_core.h> 10 #include <ethdev_driver.h> 11 12 #include "base/hinic_compat.h" 13 #include "base/hinic_pmd_cfg.h" 14 15 #define HINIC_DEV_NAME_LEN 32 16 #define HINIC_MAX_RX_QUEUES 64 17 18 /* mbuf pool for copy invalid mbuf segs */ 19 #define HINIC_COPY_MEMPOOL_DEPTH 128 20 #define HINIC_COPY_MBUF_SIZE 4096 21 22 #define SIZE_8BYTES(size) (ALIGN((u32)(size), 8) >> 3) 23 24 #define HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev) \ 25 ((struct hinic_nic_dev *)(dev)->data->dev_private) 26 27 #define HINIC_MAX_QUEUE_DEPTH 4096 28 #define HINIC_MIN_QUEUE_DEPTH 128 29 #define HINIC_TXD_ALIGN 1 30 #define HINIC_RXD_ALIGN 1 31 32 #define HINIC_UINT32_BIT_SIZE (CHAR_BIT * sizeof(uint32_t)) 33 #define HINIC_VFTA_SIZE (4096 / HINIC_UINT32_BIT_SIZE) 34 35 #define HINIC_MAX_MTU_SIZE 9600 36 #define HINIC_MIN_MTU_SIZE 256 37 38 #define HINIC_VLAN_TAG_SIZE 4 39 #define HINIC_ETH_OVERHEAD \ 40 (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + HINIC_VLAN_TAG_SIZE * 2) 41 42 #define HINIC_MIN_FRAME_SIZE (HINIC_MIN_MTU_SIZE + HINIC_ETH_OVERHEAD) 43 #define HINIC_MAX_JUMBO_FRAME_SIZE (HINIC_MAX_MTU_SIZE + HINIC_ETH_OVERHEAD) 44 45 #define HINIC_MTU_TO_PKTLEN(mtu) ((mtu) + HINIC_ETH_OVERHEAD) 46 47 #define HINIC_PKTLEN_TO_MTU(pktlen) ((pktlen) - HINIC_ETH_OVERHEAD) 48 49 /* The max frame size with default MTU */ 50 #define HINIC_ETH_MAX_LEN (RTE_ETHER_MTU + HINIC_ETH_OVERHEAD) 51 52 enum hinic_dev_status { 53 HINIC_DEV_INIT, 54 HINIC_DEV_CLOSE, 55 HINIC_DEV_START, 56 HINIC_DEV_INTR_EN, 57 }; 58 59 #define HINIC_MAX_Q_FILTERS 64 /* hinic just support 64 filter types */ 60 #define HINIC_PKT_TYPE_FIND_ID(pkt_type) ((pkt_type) - HINIC_MAX_Q_FILTERS) 61 62 /* 5tuple filter info */ 63 struct hinic_5tuple_filter_info { 64 uint32_t dst_ip; 65 uint32_t src_ip; 66 uint16_t dst_port; 67 uint16_t src_port; 68 uint8_t proto; /* l4 protocol. */ 69 /* 70 * seven levels (001b-111b), 111b is highest, 71 * used when more than one filter matches. 72 */ 73 uint8_t priority; 74 75 /* if mask is 1b, do not compare the response bit domain */ 76 uint8_t dst_ip_mask:1, 77 src_ip_mask:1, 78 dst_port_mask:1, 79 src_port_mask:1, 80 proto_mask:1; 81 }; 82 83 /* 5tuple filter structure */ 84 struct hinic_5tuple_filter { 85 TAILQ_ENTRY(hinic_5tuple_filter) entries; 86 uint16_t index; /* the index of 5tuple filter */ 87 struct hinic_5tuple_filter_info filter_info; 88 uint16_t queue; /* rx queue assigned to */ 89 }; 90 91 TAILQ_HEAD(hinic_5tuple_filter_list, hinic_5tuple_filter); 92 93 /* 94 * If this filter is added by configuration, 95 * it should not be removed. 96 */ 97 struct hinic_pkt_filter { 98 uint16_t pkt_proto; 99 uint8_t qid; 100 bool enable; 101 }; 102 103 /* Structure to store filters' info. */ 104 struct hinic_filter_info { 105 uint8_t pkt_type; 106 uint8_t qid; 107 uint64_t type_mask; /* Bit mask for every used filter */ 108 struct hinic_5tuple_filter_list fivetuple_list; 109 struct hinic_pkt_filter pkt_filters[HINIC_MAX_Q_FILTERS]; 110 }; 111 112 /* Information about the fdir mode. */ 113 struct hinic_hw_fdir_mask { 114 uint32_t src_ipv4_mask; 115 uint32_t dst_ipv4_mask; 116 uint16_t src_port_mask; 117 uint16_t dst_port_mask; 118 uint16_t proto_mask; 119 uint16_t tunnel_flag; 120 uint16_t tunnel_inner_src_port_mask; 121 uint16_t tunnel_inner_dst_port_mask; 122 uint16_t dst_ipv6_mask; 123 }; 124 125 /* Flow Director attribute */ 126 struct hinic_atr_input { 127 uint32_t dst_ip; 128 uint32_t src_ip; 129 uint16_t src_port; 130 uint16_t dst_port; 131 uint16_t proto; 132 uint16_t tunnel_flag; 133 uint16_t tunnel_inner_src_port; 134 uint16_t tunnel_inner_dst_port; 135 uint8_t dst_ipv6[16]; 136 }; 137 138 enum hinic_fdir_mode { 139 HINIC_FDIR_MODE_NORMAL = 0, 140 HINIC_FDIR_MODE_TCAM = 1, 141 }; 142 143 #define HINIC_PF_MAX_TCAM_FILTERS 1024 144 #define HINIC_VF_MAX_TCAM_FILTERS 128 145 #define HINIC_SUPPORT_PF_MAX_NUM 4 146 #define HINIC_TOTAL_PF_MAX_NUM 16 147 #define HINIC_SUPPORT_VF_MAX_NUM 32 148 #define HINIC_TCAM_BLOCK_TYPE_PF 0 /* 1024 tcam index of a block */ 149 #define HINIC_TCAM_BLOCK_TYPE_VF 1 /* 128 tcam index of a block */ 150 151 #define HINIC_PKT_VF_TCAM_INDEX_START(block_index) \ 152 (HINIC_PF_MAX_TCAM_FILTERS * HINIC_SUPPORT_PF_MAX_NUM + \ 153 HINIC_VF_MAX_TCAM_FILTERS * (block_index)) 154 155 TAILQ_HEAD(hinic_tcam_filter_list, hinic_tcam_filter); 156 157 struct hinic_tcam_info { 158 struct hinic_tcam_filter_list tcam_list; 159 u8 tcam_index_array[HINIC_PF_MAX_TCAM_FILTERS]; 160 u16 tcam_block_index; 161 u16 tcam_rule_nums; 162 }; 163 164 struct tag_tcam_key_mem { 165 #if (RTE_BYTE_ORDER == RTE_BIG_ENDIAN) 166 167 u32 rsvd0:16; 168 u32 function_id:16; 169 170 u32 protocol:8; 171 /* 172 * tunnel packet, mask must be 0xff, spec value is 1; 173 * normal packet, mask must be 0, spec value is 0; 174 * if tunnal packet, ucode use 175 * sip/dip/protocol/src_port/dst_dport from inner packet 176 */ 177 u32 tunnel_flag:8; 178 u32 sip_h:16; 179 180 u32 sip_l:16; 181 u32 dip_h:16; 182 183 u32 dip_l:16; 184 u32 src_port:16; 185 186 u32 dst_port:16; 187 /* 188 * tunnel packet and normal packet, 189 * ext_dip mask must be 0xffffffff 190 */ 191 u32 ext_dip_h:16; 192 u32 ext_dip_l:16; 193 u32 rsvd2:16; 194 #else 195 u32 function_id:16; 196 u32 rsvd0:16; 197 198 u32 sip_h:16; 199 u32 tunnel_flag:8; 200 u32 protocol:8; 201 202 u32 dip_h:16; 203 u32 sip_l:16; 204 205 u32 src_port:16; 206 u32 dip_l:16; 207 208 u32 ext_dip_h:16; 209 u32 dst_port:16; 210 211 u32 rsvd2:16; 212 u32 ext_dip_l:16; 213 #endif 214 }; 215 216 struct tag_tcam_key_ipv6_mem { 217 #if (RTE_BYTE_ORDER == RTE_BIG_ENDIAN) 218 u32 rsvd0:16; 219 u32 ipv6_flag:1; 220 u32 protocol:7; 221 u32 function_id:8; 222 223 u32 dst_port:16; 224 u32 ipv6_key0:16; 225 226 u32 ipv6_key1:16; 227 u32 ipv6_key2:16; 228 229 u32 ipv6_key3:16; 230 u32 ipv6_key4:16; 231 232 u32 ipv6_key5:16; 233 u32 ipv6_key6:16; 234 235 u32 ipv6_key7:16; 236 u32 rsvd2:16; 237 #else 238 u32 function_id:8; 239 u32 protocol:7; 240 u32 ipv6_flag:1; 241 u32 rsvd0:16; 242 243 u32 ipv6_key0:16; 244 u32 dst_port:16; 245 246 u32 ipv6_key2:16; 247 u32 ipv6_key1:16; 248 249 u32 ipv6_key4:16; 250 u32 ipv6_key3:16; 251 252 u32 ipv6_key6:16; 253 u32 ipv6_key5:16; 254 255 u32 rsvd2:16; 256 u32 ipv6_key7:16; 257 #endif 258 }; 259 260 struct tag_tcam_key { 261 union { 262 struct tag_tcam_key_mem key_info; 263 struct tag_tcam_key_ipv6_mem key_info_ipv6; 264 }; 265 266 union { 267 struct tag_tcam_key_mem key_mask; 268 struct tag_tcam_key_ipv6_mem key_mask_ipv6; 269 }; 270 }; 271 272 struct hinic_fdir_rule { 273 struct hinic_hw_fdir_mask mask; 274 struct hinic_atr_input hinic_fdir; /* key of fdir filter */ 275 uint8_t queue; /* queue assigned when matched */ 276 enum hinic_fdir_mode mode; /* fdir type */ 277 u16 tcam_index; 278 }; 279 280 /* ntuple filter list structure */ 281 struct hinic_ntuple_filter_ele { 282 TAILQ_ENTRY(hinic_ntuple_filter_ele) entries; 283 struct rte_eth_ntuple_filter filter_info; 284 }; 285 286 /* ethertype filter list structure */ 287 struct hinic_ethertype_filter_ele { 288 TAILQ_ENTRY(hinic_ethertype_filter_ele) entries; 289 struct rte_eth_ethertype_filter filter_info; 290 }; 291 292 /* fdir filter list structure */ 293 struct hinic_fdir_rule_ele { 294 TAILQ_ENTRY(hinic_fdir_rule_ele) entries; 295 struct hinic_fdir_rule filter_info; 296 }; 297 298 struct hinic_tcam_filter { 299 TAILQ_ENTRY(hinic_tcam_filter) entries; 300 uint16_t index; /* tcam index */ 301 struct tag_tcam_key tcam_key; 302 uint16_t queue; /* rx queue assigned to */ 303 }; 304 305 struct rte_flow { 306 enum rte_filter_type filter_type; 307 void *rule; 308 }; 309 310 /* hinic_flow memory list structure */ 311 struct hinic_flow_mem { 312 TAILQ_ENTRY(hinic_flow_mem) entries; 313 struct rte_flow *flow; 314 }; 315 316 TAILQ_HEAD(hinic_ntuple_filter_list, hinic_ntuple_filter_ele); 317 TAILQ_HEAD(hinic_ethertype_filter_list, hinic_ethertype_filter_ele); 318 TAILQ_HEAD(hinic_fdir_rule_filter_list, hinic_fdir_rule_ele); 319 TAILQ_HEAD(hinic_flow_mem_list, hinic_flow_mem); 320 321 extern const struct rte_flow_ops hinic_flow_ops; 322 323 /* hinic nic_device */ 324 struct hinic_nic_dev { 325 /* hardware device */ 326 struct hinic_hwdev *hwdev; 327 struct hinic_txq **txqs; 328 struct hinic_rxq **rxqs; 329 struct rte_mempool *cpy_mpool; 330 u16 num_qps; 331 u16 num_sq; 332 u16 num_rq; 333 u16 mtu_size; 334 u8 rss_tmpl_idx; 335 u8 rss_indir_flag; 336 u8 num_rss; 337 u8 rx_queue_list[HINIC_MAX_RX_QUEUES]; 338 339 bool pause_set; 340 struct nic_pause_config nic_pause; 341 342 u32 vfta[HINIC_VFTA_SIZE]; /* VLAN bitmap */ 343 344 struct rte_ether_addr default_addr; 345 struct rte_ether_addr *mc_list; 346 /* info */ 347 unsigned int flags; 348 struct nic_service_cap nic_cap; 349 u32 rx_mode_status; /* promisc or allmulticast */ 350 pthread_mutex_t rx_mode_mutex; 351 u32 dev_status; 352 353 char proc_dev_name[HINIC_DEV_NAME_LEN]; 354 /* PF0->COS4, PF1->COS5, PF2->COS6, PF3->COS7, 355 * vf: the same with associate pf 356 */ 357 u32 default_cos; 358 u32 rx_csum_en; 359 360 struct hinic_filter_info filter; 361 struct hinic_tcam_info tcam; 362 struct hinic_ntuple_filter_list filter_ntuple_list; 363 struct hinic_ethertype_filter_list filter_ethertype_list; 364 struct hinic_fdir_rule_filter_list filter_fdir_rule_list; 365 struct hinic_flow_mem_list hinic_flow_list; 366 }; 367 368 void hinic_free_fdir_filter(struct hinic_nic_dev *nic_dev); 369 370 void hinic_destroy_fdir_filter(struct rte_eth_dev *dev); 371 #endif /* _HINIC_PMD_ETHDEV_H_ */ 372