1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Huawei Technologies Co., Ltd 3 */ 4 5 #ifndef _HINIC_PMD_ETHDEV_H_ 6 #define _HINIC_PMD_ETHDEV_H_ 7 8 #include <rte_ethdev.h> 9 #include <rte_ethdev_core.h> 10 11 #include "base/hinic_compat.h" 12 #include "base/hinic_pmd_cfg.h" 13 14 #define HINIC_DEV_NAME_LEN (32) 15 #define HINIC_MAX_RX_QUEUES (64) 16 17 /* mbuf pool for copy invalid mbuf segs */ 18 #define HINIC_COPY_MEMPOOL_DEPTH (128) 19 #define HINIC_COPY_MBUF_SIZE (4096) 20 21 #define SIZE_8BYTES(size) (ALIGN((u32)(size), 8) >> 3) 22 23 #define HINIC_PKTLEN_TO_MTU(pktlen) \ 24 ((pktlen) - (ETH_HLEN + ETH_CRC_LEN)) 25 26 #define HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev) \ 27 ((struct hinic_nic_dev *)(dev)->data->dev_private) 28 29 #define HINIC_MAX_QUEUE_DEPTH 4096 30 #define HINIC_MIN_QUEUE_DEPTH 128 31 #define HINIC_TXD_ALIGN 1 32 #define HINIC_RXD_ALIGN 1 33 34 enum hinic_dev_status { 35 HINIC_DEV_INIT, 36 HINIC_DEV_CLOSE, 37 HINIC_DEV_START, 38 HINIC_DEV_INTR_EN, 39 }; 40 41 /* hinic nic_device */ 42 struct hinic_nic_dev { 43 /* hardware device */ 44 struct hinic_hwdev *hwdev; 45 struct hinic_txq **txqs; 46 struct hinic_rxq **rxqs; 47 struct rte_mempool *cpy_mpool; 48 u16 num_qps; 49 u16 num_sq; 50 u16 num_rq; 51 u16 mtu_size; 52 u8 rss_tmpl_idx; 53 u8 rss_indir_flag; 54 u8 num_rss; 55 u8 rx_queue_list[HINIC_MAX_RX_QUEUES]; 56 57 /* info */ 58 unsigned int flags; 59 struct nic_service_cap nic_cap; 60 u32 rx_mode_status; /* promisc allmulticast */ 61 unsigned long dev_status; 62 63 /* dpdk only */ 64 char proc_dev_name[HINIC_DEV_NAME_LEN]; 65 /* PF0->COS4, PF1->COS5, PF2->COS6, PF3->COS7, 66 * vf: the same with associate pf 67 */ 68 u32 default_cos; 69 }; 70 71 #endif /* _HINIC_PMD_ETHDEV_H_ */ 72