xref: /dpdk/drivers/net/hinic/base/hinic_pmd_api_cmd.h (revision 53ffbf2caaf8d69ea55d800052f74e027bd44f4c)
1*53ffbf2cSZiyang Xuan /* SPDX-License-Identifier: BSD-3-Clause
2*53ffbf2cSZiyang Xuan  * Copyright(c) 2017 Huawei Technologies Co., Ltd
3*53ffbf2cSZiyang Xuan  */
4*53ffbf2cSZiyang Xuan 
5*53ffbf2cSZiyang Xuan #ifndef _HINIC_PMD_API_CMD_H_
6*53ffbf2cSZiyang Xuan #define _HINIC_PMD_API_CMD_H_
7*53ffbf2cSZiyang Xuan 
8*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_CELL_LEN_SHIFT			0
9*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_RD_DMA_ATTR_OFF_SHIFT		16
10*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_WR_DMA_ATTR_OFF_SHIFT		24
11*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_XOR_CHKSUM_SHIFT		56
12*53ffbf2cSZiyang Xuan 
13*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_CELL_LEN_MASK			0x3FU
14*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_RD_DMA_ATTR_OFF_MASK		0x3FU
15*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_WR_DMA_ATTR_OFF_MASK		0x3FU
16*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_XOR_CHKSUM_MASK			0xFFU
17*53ffbf2cSZiyang Xuan 
18*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_SET(val, member)		\
19*53ffbf2cSZiyang Xuan 	((((u64)val) & HINIC_API_CMD_CELL_CTRL_##member##_MASK) << \
20*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_CELL_CTRL_##member##_SHIFT)
21*53ffbf2cSZiyang Xuan 
22*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CELL_CTRL_CLEAR(val, member)		\
23*53ffbf2cSZiyang Xuan 	((val) & (~((u64)HINIC_API_CMD_CELL_CTRL_##member##_MASK <<	\
24*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_CELL_CTRL_##member##_SHIFT)))
25*53ffbf2cSZiyang Xuan 
26*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_API_TYPE_SHIFT			0
27*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_RD_WR_SHIFT				1
28*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_MGMT_BYPASS_SHIFT			2
29*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_RESP_AEQE_EN_SHIFT			3
30*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_PRIV_DATA_SHIFT			8
31*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_DEST_SHIFT				32
32*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_SIZE_SHIFT				40
33*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_XOR_CHKSUM_SHIFT			56
34*53ffbf2cSZiyang Xuan 
35*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_API_TYPE_MASK			0x1U
36*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_RD_WR_MASK				0x1U
37*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_MGMT_BYPASS_MASK			0x1U
38*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_RESP_AEQE_EN_MASK			0x1U
39*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_DEST_MASK				0x1FU
40*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_SIZE_MASK				0x7FFU
41*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_XOR_CHKSUM_MASK			0xFFU
42*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_PRIV_DATA_MASK			0xFFFFFFU
43*53ffbf2cSZiyang Xuan 
44*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_SET(val, member)			\
45*53ffbf2cSZiyang Xuan 	((((u64)val) & HINIC_API_CMD_DESC_##member##_MASK) << \
46*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_DESC_##member##_SHIFT)
47*53ffbf2cSZiyang Xuan 
48*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_DESC_CLEAR(val, member)			\
49*53ffbf2cSZiyang Xuan 	((val) & (~((u64)HINIC_API_CMD_DESC_##member##_MASK <<	\
50*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_DESC_##member##_SHIFT)))
51*53ffbf2cSZiyang Xuan 
52*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEADER_VALID_SHIFT			0
53*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEADER_CHAIN_ID_SHIFT		16
54*53ffbf2cSZiyang Xuan 
55*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEADER_VALID_MASK			0xFFU
56*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEADER_CHAIN_ID_MASK		0xFFU
57*53ffbf2cSZiyang Xuan 
58*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_VALID_CODE				0xFF
59*53ffbf2cSZiyang Xuan 
60*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEADER_GET(val, member)		\
61*53ffbf2cSZiyang Xuan 	(((val) >> HINIC_API_CMD_STATUS_HEADER_##member##_SHIFT) &	\
62*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_STATUS_HEADER_##member##_MASK)
63*53ffbf2cSZiyang Xuan 
64*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_REQ_RESTART_SHIFT			1
65*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_REQ_WB_TRIGGER_SHIFT		2
66*53ffbf2cSZiyang Xuan 
67*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_REQ_RESTART_MASK			0x1U
68*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_REQ_WB_TRIGGER_MASK			0x1U
69*53ffbf2cSZiyang Xuan 
70*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_REQ_SET(val, member)		\
71*53ffbf2cSZiyang Xuan 	(((val) & HINIC_API_CMD_CHAIN_REQ_##member##_MASK) << \
72*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_CHAIN_REQ_##member##_SHIFT)
73*53ffbf2cSZiyang Xuan 
74*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_REQ_GET(val, member)		\
75*53ffbf2cSZiyang Xuan 	(((val) >> HINIC_API_CMD_CHAIN_REQ_##member##_SHIFT) & \
76*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_CHAIN_REQ_##member##_MASK)
77*53ffbf2cSZiyang Xuan 
78*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_REQ_CLEAR(val, member)		\
79*53ffbf2cSZiyang Xuan 	((val) & (~(HINIC_API_CMD_CHAIN_REQ_##member##_MASK <<	\
80*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_CHAIN_REQ_##member##_SHIFT)))
81*53ffbf2cSZiyang Xuan 
82*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_RESTART_EN_SHIFT		1
83*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_XOR_ERR_SHIFT			2
84*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_AEQE_EN_SHIFT			4
85*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_AEQ_ID_SHIFT			8
86*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_XOR_CHK_EN_SHIFT		28
87*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_CELL_SIZE_SHIFT		30
88*53ffbf2cSZiyang Xuan 
89*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_RESTART_EN_MASK		0x1U
90*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_XOR_ERR_MASK			0x1U
91*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_AEQE_EN_MASK			0x1U
92*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_AEQ_ID_MASK			0x3U
93*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_XOR_CHK_EN_MASK		0x3U
94*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_CELL_SIZE_MASK			0x3U
95*53ffbf2cSZiyang Xuan 
96*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_SET(val, member)		\
97*53ffbf2cSZiyang Xuan 	(((val) & HINIC_API_CMD_CHAIN_CTRL_##member##_MASK) << \
98*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_CHAIN_CTRL_##member##_SHIFT)
99*53ffbf2cSZiyang Xuan 
100*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_CHAIN_CTRL_CLEAR(val, member)		\
101*53ffbf2cSZiyang Xuan 	((val) & (~(HINIC_API_CMD_CHAIN_CTRL_##member##_MASK <<	\
102*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_CHAIN_CTRL_##member##_SHIFT)))
103*53ffbf2cSZiyang Xuan 
104*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_VALID_MASK		0xFF
105*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_VALID_CODE		0xFF
106*53ffbf2cSZiyang Xuan 
107*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEADER_VALID(val)	\
108*53ffbf2cSZiyang Xuan 	(((val) & HINIC_API_CMD_RESP_HEAD_VALID_MASK) == \
109*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_RESP_HEAD_VALID_CODE)
110*53ffbf2cSZiyang Xuan 
111*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_STATUS_SHIFT		8
112*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_STATUS_MASK		0xFFU
113*53ffbf2cSZiyang Xuan 
114*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_ERR_CODE		0x1
115*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_ERR(val)	\
116*53ffbf2cSZiyang Xuan 	((((val) >> HINIC_API_CMD_RESP_HEAD_STATUS_SHIFT) & \
117*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_RESP_HEAD_STATUS_MASK) ==	\
118*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_RESP_HEAD_ERR_CODE)
119*53ffbf2cSZiyang Xuan 
120*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_CHAIN_ID_SHIFT		16
121*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_CHAIN_ID_MASK		0xFF
122*53ffbf2cSZiyang Xuan 
123*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_RESERVED			3
124*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_CHAIN_ID(val)	\
125*53ffbf2cSZiyang Xuan 	(((val) >> HINIC_API_CMD_RESP_HEAD_CHAIN_ID_SHIFT) & \
126*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_RESP_HEAD_CHAIN_ID_MASK)
127*53ffbf2cSZiyang Xuan 
128*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_DRIVER_PRIV_SHIFT	40
129*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_DRIVER_PRIV_MASK	0xFFFFFFU
130*53ffbf2cSZiyang Xuan 
131*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_RESP_HEAD_DRIVER_PRIV(val)	\
132*53ffbf2cSZiyang Xuan 	(u16)(((val) >> HINIC_API_CMD_RESP_HEAD_DRIVER_PRIV_SHIFT) & \
133*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_RESP_HEAD_DRIVER_PRIV_MASK)
134*53ffbf2cSZiyang Xuan 
135*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEAD_VALID_MASK		0xFFU
136*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEAD_VALID_SHIFT		0
137*53ffbf2cSZiyang Xuan 
138*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEAD_CHAIN_ID_MASK		0xFFU
139*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_HEAD_CHAIN_ID_VALID_SHIFT	16
140*53ffbf2cSZiyang Xuan 
141*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CONS_IDX_MASK		0xFFFFFFU
142*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CONS_IDX_SHIFT		0
143*53ffbf2cSZiyang Xuan 
144*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_FSM_MASK			0xFU
145*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_FSM_SHIFT			24
146*53ffbf2cSZiyang Xuan 
147*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CHKSUM_ERR_MASK		0x3U
148*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CHKSUM_ERR_SHIFT		28
149*53ffbf2cSZiyang Xuan 
150*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CPLD_ERR_MASK		0x1U
151*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CPLD_ERR_SHIFT		30
152*53ffbf2cSZiyang Xuan 
153*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CHAIN_ID(val) \
154*53ffbf2cSZiyang Xuan 	(((val) >> HINIC_API_CMD_STATUS_HEAD_CHAIN_ID_VALID_SHIFT) & \
155*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_STATUS_HEAD_VALID_MASK)
156*53ffbf2cSZiyang Xuan 
157*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CONS_IDX(val) \
158*53ffbf2cSZiyang Xuan 		((val) & HINIC_API_CMD_STATUS_CONS_IDX_MASK)
159*53ffbf2cSZiyang Xuan 
160*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_CHKSUM_ERR(val) \
161*53ffbf2cSZiyang Xuan 	(((val) >> HINIC_API_CMD_STATUS_CHKSUM_ERR_SHIFT) & \
162*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_STATUS_CHKSUM_ERR_MASK)
163*53ffbf2cSZiyang Xuan 
164*53ffbf2cSZiyang Xuan #define HINIC_API_CMD_STATUS_GET(val, member)			\
165*53ffbf2cSZiyang Xuan 	(((val) >> HINIC_API_CMD_STATUS_##member##_SHIFT) & \
166*53ffbf2cSZiyang Xuan 		HINIC_API_CMD_STATUS_##member##_MASK)
167*53ffbf2cSZiyang Xuan 
168*53ffbf2cSZiyang Xuan enum hinic_api_cmd_chain_type {
169*53ffbf2cSZiyang Xuan 	/* read from mgmt cpu command with completion  */
170*53ffbf2cSZiyang Xuan 	HINIC_API_CMD_WRITE_ASYNC_TO_MGMT_CPU	= 6,
171*53ffbf2cSZiyang Xuan 	/* PMD business api chain */
172*53ffbf2cSZiyang Xuan 	HINIC_API_CMD_PMD_WRITE_TO_MGMT         = 7,
173*53ffbf2cSZiyang Xuan 	HINIC_API_CMD_MAX
174*53ffbf2cSZiyang Xuan };
175*53ffbf2cSZiyang Xuan 
176*53ffbf2cSZiyang Xuan enum hinic_node_id {
177*53ffbf2cSZiyang Xuan 	HINIC_NODE_ID_MGMT_HOST = 21,
178*53ffbf2cSZiyang Xuan };
179*53ffbf2cSZiyang Xuan 
180*53ffbf2cSZiyang Xuan struct hinic_api_cmd_status {
181*53ffbf2cSZiyang Xuan 	u64 header;
182*53ffbf2cSZiyang Xuan 	u32 buf_desc;
183*53ffbf2cSZiyang Xuan 	u32 cell_addr_hi;
184*53ffbf2cSZiyang Xuan 	u32 cell_addr_lo;
185*53ffbf2cSZiyang Xuan 	u32 rsvd0;
186*53ffbf2cSZiyang Xuan 	u64 rsvd1;
187*53ffbf2cSZiyang Xuan };
188*53ffbf2cSZiyang Xuan 
189*53ffbf2cSZiyang Xuan /* HW struct */
190*53ffbf2cSZiyang Xuan struct hinic_api_cmd_cell {
191*53ffbf2cSZiyang Xuan 	u64 ctrl;
192*53ffbf2cSZiyang Xuan 
193*53ffbf2cSZiyang Xuan 	/* address is 64 bit in HW struct */
194*53ffbf2cSZiyang Xuan 	u64 next_cell_paddr;
195*53ffbf2cSZiyang Xuan 
196*53ffbf2cSZiyang Xuan 	u64 desc;
197*53ffbf2cSZiyang Xuan 
198*53ffbf2cSZiyang Xuan 	/* HW struct */
199*53ffbf2cSZiyang Xuan 	union {
200*53ffbf2cSZiyang Xuan 		struct {
201*53ffbf2cSZiyang Xuan 			u64 hw_cmd_paddr;
202*53ffbf2cSZiyang Xuan 		} write;
203*53ffbf2cSZiyang Xuan 
204*53ffbf2cSZiyang Xuan 		struct {
205*53ffbf2cSZiyang Xuan 			u64 hw_wb_resp_paddr;
206*53ffbf2cSZiyang Xuan 			u64 hw_cmd_paddr;
207*53ffbf2cSZiyang Xuan 		} read;
208*53ffbf2cSZiyang Xuan 	};
209*53ffbf2cSZiyang Xuan };
210*53ffbf2cSZiyang Xuan 
211*53ffbf2cSZiyang Xuan struct hinic_api_cmd_cell_ctxt {
212*53ffbf2cSZiyang Xuan 	dma_addr_t			cell_paddr;
213*53ffbf2cSZiyang Xuan 	struct hinic_api_cmd_cell	*cell_vaddr;
214*53ffbf2cSZiyang Xuan 
215*53ffbf2cSZiyang Xuan 	dma_addr_t			cell_paddr_free;
216*53ffbf2cSZiyang Xuan 	void				*cell_vaddr_free;
217*53ffbf2cSZiyang Xuan 
218*53ffbf2cSZiyang Xuan 	dma_addr_t			api_cmd_paddr;
219*53ffbf2cSZiyang Xuan 	void				*api_cmd_vaddr;
220*53ffbf2cSZiyang Xuan 
221*53ffbf2cSZiyang Xuan 	dma_addr_t			api_cmd_paddr_free;
222*53ffbf2cSZiyang Xuan 	void				*api_cmd_vaddr_free;
223*53ffbf2cSZiyang Xuan 
224*53ffbf2cSZiyang Xuan 	int				status;
225*53ffbf2cSZiyang Xuan 
226*53ffbf2cSZiyang Xuan 	u32				saved_prod_idx;
227*53ffbf2cSZiyang Xuan };
228*53ffbf2cSZiyang Xuan 
229*53ffbf2cSZiyang Xuan struct hinic_api_cmd_chain_attr {
230*53ffbf2cSZiyang Xuan 	struct hinic_hwdev		*hwdev;
231*53ffbf2cSZiyang Xuan 	enum hinic_api_cmd_chain_type	chain_type;
232*53ffbf2cSZiyang Xuan 
233*53ffbf2cSZiyang Xuan 	u32				num_cells;
234*53ffbf2cSZiyang Xuan 	u16				rsp_size;
235*53ffbf2cSZiyang Xuan 	u16				cell_size;
236*53ffbf2cSZiyang Xuan };
237*53ffbf2cSZiyang Xuan 
238*53ffbf2cSZiyang Xuan struct hinic_api_cmd_chain {
239*53ffbf2cSZiyang Xuan 	struct hinic_hwdev		*hwdev;
240*53ffbf2cSZiyang Xuan 	enum hinic_api_cmd_chain_type	chain_type;
241*53ffbf2cSZiyang Xuan 
242*53ffbf2cSZiyang Xuan 	u32				num_cells;
243*53ffbf2cSZiyang Xuan 	u16				cell_size;
244*53ffbf2cSZiyang Xuan 	u16				rsp_size;
245*53ffbf2cSZiyang Xuan 
246*53ffbf2cSZiyang Xuan 	/* HW members is 24 bit format */
247*53ffbf2cSZiyang Xuan 	u32				prod_idx;
248*53ffbf2cSZiyang Xuan 	u32				cons_idx;
249*53ffbf2cSZiyang Xuan 
250*53ffbf2cSZiyang Xuan 	/* Async cmd can not be scheduled */
251*53ffbf2cSZiyang Xuan 	spinlock_t			async_lock;
252*53ffbf2cSZiyang Xuan 
253*53ffbf2cSZiyang Xuan 	dma_addr_t			wb_status_paddr;
254*53ffbf2cSZiyang Xuan 	struct hinic_api_cmd_status	*wb_status;
255*53ffbf2cSZiyang Xuan 
256*53ffbf2cSZiyang Xuan 	dma_addr_t			head_cell_paddr;
257*53ffbf2cSZiyang Xuan 	struct hinic_api_cmd_cell	*head_node;
258*53ffbf2cSZiyang Xuan 
259*53ffbf2cSZiyang Xuan 	struct hinic_api_cmd_cell_ctxt	*cell_ctxt;
260*53ffbf2cSZiyang Xuan 	struct hinic_api_cmd_cell	*curr_node;
261*53ffbf2cSZiyang Xuan };
262*53ffbf2cSZiyang Xuan 
263*53ffbf2cSZiyang Xuan int hinic_api_cmd_write(struct hinic_api_cmd_chain *chain,
264*53ffbf2cSZiyang Xuan 			enum hinic_node_id dest, void *cmd, u16 size);
265*53ffbf2cSZiyang Xuan 
266*53ffbf2cSZiyang Xuan int hinic_api_cmd_init(struct hinic_hwdev *hwdev,
267*53ffbf2cSZiyang Xuan 			       struct hinic_api_cmd_chain **chain);
268*53ffbf2cSZiyang Xuan 
269*53ffbf2cSZiyang Xuan void hinic_api_cmd_free(struct hinic_api_cmd_chain **chain);
270*53ffbf2cSZiyang Xuan 
271*53ffbf2cSZiyang Xuan #endif /* _HINIC_PMD_API_CMD_H_ */
272