1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 */ 5 6 #include <stdio.h> 7 8 #include <sys/stat.h> 9 #include <sys/mman.h> 10 #include <fcntl.h> 11 #include <libgen.h> 12 13 #include <rte_pci.h> 14 #include <rte_bus_pci.h> 15 #include <rte_memzone.h> 16 #include <rte_malloc.h> 17 #include <rte_mbuf.h> 18 #include <rte_string_fns.h> 19 #include <rte_ethdev.h> 20 21 #include "enic_compat.h" 22 #include "enic.h" 23 #include "wq_enet_desc.h" 24 #include "rq_enet_desc.h" 25 #include "cq_enet_desc.h" 26 #include "vnic_enet.h" 27 #include "vnic_dev.h" 28 #include "vnic_wq.h" 29 #include "vnic_rq.h" 30 #include "vnic_cq.h" 31 #include "vnic_intr.h" 32 #include "vnic_nic.h" 33 34 static inline int enic_is_sriov_vf(struct enic *enic) 35 { 36 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF; 37 } 38 39 static int is_zero_addr(uint8_t *addr) 40 { 41 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]); 42 } 43 44 static int is_mcast_addr(uint8_t *addr) 45 { 46 return addr[0] & 1; 47 } 48 49 static int is_eth_addr_valid(uint8_t *addr) 50 { 51 return !is_mcast_addr(addr) && !is_zero_addr(addr); 52 } 53 54 static void 55 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq) 56 { 57 uint16_t i; 58 59 if (!rq || !rq->mbuf_ring) { 60 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL"); 61 return; 62 } 63 64 for (i = 0; i < rq->ring.desc_count; i++) { 65 if (rq->mbuf_ring[i]) { 66 rte_pktmbuf_free_seg(rq->mbuf_ring[i]); 67 rq->mbuf_ring[i] = NULL; 68 } 69 } 70 } 71 72 static void enic_free_wq_buf(struct vnic_wq_buf *buf) 73 { 74 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb; 75 76 rte_pktmbuf_free_seg(mbuf); 77 buf->mb = NULL; 78 } 79 80 static void enic_log_q_error(struct enic *enic) 81 { 82 unsigned int i; 83 u32 error_status; 84 85 for (i = 0; i < enic->wq_count; i++) { 86 error_status = vnic_wq_error_status(&enic->wq[i]); 87 if (error_status) 88 dev_err(enic, "WQ[%d] error_status %d\n", i, 89 error_status); 90 } 91 92 for (i = 0; i < enic_vnic_rq_count(enic); i++) { 93 if (!enic->rq[i].in_use) 94 continue; 95 error_status = vnic_rq_error_status(&enic->rq[i]); 96 if (error_status) 97 dev_err(enic, "RQ[%d] error_status %d\n", i, 98 error_status); 99 } 100 } 101 102 static void enic_clear_soft_stats(struct enic *enic) 103 { 104 struct enic_soft_stats *soft_stats = &enic->soft_stats; 105 rte_atomic64_clear(&soft_stats->rx_nombuf); 106 rte_atomic64_clear(&soft_stats->rx_packet_errors); 107 rte_atomic64_clear(&soft_stats->tx_oversized); 108 } 109 110 static void enic_init_soft_stats(struct enic *enic) 111 { 112 struct enic_soft_stats *soft_stats = &enic->soft_stats; 113 rte_atomic64_init(&soft_stats->rx_nombuf); 114 rte_atomic64_init(&soft_stats->rx_packet_errors); 115 rte_atomic64_init(&soft_stats->tx_oversized); 116 enic_clear_soft_stats(enic); 117 } 118 119 void enic_dev_stats_clear(struct enic *enic) 120 { 121 if (vnic_dev_stats_clear(enic->vdev)) 122 dev_err(enic, "Error in clearing stats\n"); 123 enic_clear_soft_stats(enic); 124 } 125 126 int enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats) 127 { 128 struct vnic_stats *stats; 129 struct enic_soft_stats *soft_stats = &enic->soft_stats; 130 int64_t rx_truncated; 131 uint64_t rx_packet_errors; 132 int ret = vnic_dev_stats_dump(enic->vdev, &stats); 133 134 if (ret) { 135 dev_err(enic, "Error in getting stats\n"); 136 return ret; 137 } 138 139 /* The number of truncated packets can only be calculated by 140 * subtracting a hardware counter from error packets received by 141 * the driver. Note: this causes transient inaccuracies in the 142 * ipackets count. Also, the length of truncated packets are 143 * counted in ibytes even though truncated packets are dropped 144 * which can make ibytes be slightly higher than it should be. 145 */ 146 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors); 147 rx_truncated = rx_packet_errors - stats->rx.rx_errors; 148 149 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated; 150 r_stats->opackets = stats->tx.tx_frames_ok; 151 152 r_stats->ibytes = stats->rx.rx_bytes_ok; 153 r_stats->obytes = stats->tx.tx_bytes_ok; 154 155 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop; 156 r_stats->oerrors = stats->tx.tx_errors 157 + rte_atomic64_read(&soft_stats->tx_oversized); 158 159 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated; 160 161 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf); 162 return 0; 163 } 164 165 void enic_del_mac_address(struct enic *enic, int mac_index) 166 { 167 struct rte_eth_dev *eth_dev = enic->rte_dev; 168 uint8_t *mac_addr = eth_dev->data->mac_addrs[mac_index].addr_bytes; 169 170 if (vnic_dev_del_addr(enic->vdev, mac_addr)) 171 dev_err(enic, "del mac addr failed\n"); 172 } 173 174 int enic_set_mac_address(struct enic *enic, uint8_t *mac_addr) 175 { 176 int err; 177 178 if (!is_eth_addr_valid(mac_addr)) { 179 dev_err(enic, "invalid mac address\n"); 180 return -EINVAL; 181 } 182 183 err = vnic_dev_add_addr(enic->vdev, mac_addr); 184 if (err) 185 dev_err(enic, "add mac addr failed\n"); 186 return err; 187 } 188 189 static void 190 enic_free_rq_buf(struct rte_mbuf **mbuf) 191 { 192 if (*mbuf == NULL) 193 return; 194 195 rte_pktmbuf_free(*mbuf); 196 *mbuf = NULL; 197 } 198 199 void enic_init_vnic_resources(struct enic *enic) 200 { 201 unsigned int error_interrupt_enable = 1; 202 unsigned int error_interrupt_offset = 0; 203 unsigned int index = 0; 204 unsigned int cq_idx; 205 struct vnic_rq *data_rq; 206 207 for (index = 0; index < enic->rq_count; index++) { 208 cq_idx = enic_cq_rq(enic, enic_rte_rq_idx_to_sop_idx(index)); 209 210 vnic_rq_init(&enic->rq[enic_rte_rq_idx_to_sop_idx(index)], 211 cq_idx, 212 error_interrupt_enable, 213 error_interrupt_offset); 214 215 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)]; 216 if (data_rq->in_use) 217 vnic_rq_init(data_rq, 218 cq_idx, 219 error_interrupt_enable, 220 error_interrupt_offset); 221 222 vnic_cq_init(&enic->cq[cq_idx], 223 0 /* flow_control_enable */, 224 1 /* color_enable */, 225 0 /* cq_head */, 226 0 /* cq_tail */, 227 1 /* cq_tail_color */, 228 0 /* interrupt_enable */, 229 1 /* cq_entry_enable */, 230 0 /* cq_message_enable */, 231 0 /* interrupt offset */, 232 0 /* cq_message_addr */); 233 } 234 235 for (index = 0; index < enic->wq_count; index++) { 236 vnic_wq_init(&enic->wq[index], 237 enic_cq_wq(enic, index), 238 error_interrupt_enable, 239 error_interrupt_offset); 240 241 cq_idx = enic_cq_wq(enic, index); 242 vnic_cq_init(&enic->cq[cq_idx], 243 0 /* flow_control_enable */, 244 1 /* color_enable */, 245 0 /* cq_head */, 246 0 /* cq_tail */, 247 1 /* cq_tail_color */, 248 0 /* interrupt_enable */, 249 0 /* cq_entry_enable */, 250 1 /* cq_message_enable */, 251 0 /* interrupt offset */, 252 (u64)enic->wq[index].cqmsg_rz->iova); 253 } 254 255 vnic_intr_init(&enic->intr, 256 enic->config.intr_timer_usec, 257 enic->config.intr_timer_type, 258 /*mask_on_assertion*/1); 259 } 260 261 262 static int 263 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq) 264 { 265 struct rte_mbuf *mb; 266 struct rq_enet_desc *rqd = rq->ring.descs; 267 unsigned i; 268 dma_addr_t dma_addr; 269 270 if (!rq->in_use) 271 return 0; 272 273 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index, 274 rq->ring.desc_count); 275 276 for (i = 0; i < rq->ring.desc_count; i++, rqd++) { 277 mb = rte_mbuf_raw_alloc(rq->mp); 278 if (mb == NULL) { 279 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n", 280 (unsigned)rq->index); 281 return -ENOMEM; 282 } 283 284 mb->data_off = RTE_PKTMBUF_HEADROOM; 285 dma_addr = (dma_addr_t)(mb->buf_iova 286 + RTE_PKTMBUF_HEADROOM); 287 rq_enet_desc_enc(rqd, dma_addr, 288 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP 289 : RQ_ENET_TYPE_NOT_SOP), 290 mb->buf_len - RTE_PKTMBUF_HEADROOM); 291 rq->mbuf_ring[i] = mb; 292 } 293 294 /* make sure all prior writes are complete before doing the PIO write */ 295 rte_rmb(); 296 297 /* Post all but the last buffer to VIC. */ 298 rq->posted_index = rq->ring.desc_count - 1; 299 300 rq->rx_nb_hold = 0; 301 302 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n", 303 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold); 304 iowrite32(rq->posted_index, &rq->ctrl->posted_index); 305 iowrite32(0, &rq->ctrl->fetch_index); 306 rte_rmb(); 307 308 return 0; 309 310 } 311 312 static void * 313 enic_alloc_consistent(void *priv, size_t size, 314 dma_addr_t *dma_handle, u8 *name) 315 { 316 void *vaddr; 317 const struct rte_memzone *rz; 318 *dma_handle = 0; 319 struct enic *enic = (struct enic *)priv; 320 struct enic_memzone_entry *mze; 321 322 rz = rte_memzone_reserve_aligned((const char *)name, 323 size, SOCKET_ID_ANY, 0, ENIC_ALIGN); 324 if (!rz) { 325 pr_err("%s : Failed to allocate memory requested for %s\n", 326 __func__, name); 327 return NULL; 328 } 329 330 vaddr = rz->addr; 331 *dma_handle = (dma_addr_t)rz->iova; 332 333 mze = rte_malloc("enic memzone entry", 334 sizeof(struct enic_memzone_entry), 0); 335 336 if (!mze) { 337 pr_err("%s : Failed to allocate memory for memzone list\n", 338 __func__); 339 rte_memzone_free(rz); 340 return NULL; 341 } 342 343 mze->rz = rz; 344 345 rte_spinlock_lock(&enic->memzone_list_lock); 346 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries); 347 rte_spinlock_unlock(&enic->memzone_list_lock); 348 349 return vaddr; 350 } 351 352 static void 353 enic_free_consistent(void *priv, 354 __rte_unused size_t size, 355 void *vaddr, 356 dma_addr_t dma_handle) 357 { 358 struct enic_memzone_entry *mze; 359 struct enic *enic = (struct enic *)priv; 360 361 rte_spinlock_lock(&enic->memzone_list_lock); 362 LIST_FOREACH(mze, &enic->memzone_list, entries) { 363 if (mze->rz->addr == vaddr && 364 mze->rz->iova == dma_handle) 365 break; 366 } 367 if (mze == NULL) { 368 rte_spinlock_unlock(&enic->memzone_list_lock); 369 dev_warning(enic, 370 "Tried to free memory, but couldn't find it in the memzone list\n"); 371 return; 372 } 373 LIST_REMOVE(mze, entries); 374 rte_spinlock_unlock(&enic->memzone_list_lock); 375 rte_memzone_free(mze->rz); 376 rte_free(mze); 377 } 378 379 int enic_link_update(struct enic *enic) 380 { 381 struct rte_eth_dev *eth_dev = enic->rte_dev; 382 int ret; 383 int link_status = 0; 384 385 link_status = enic_get_link_status(enic); 386 ret = (link_status == enic->link_status); 387 enic->link_status = link_status; 388 eth_dev->data->dev_link.link_status = link_status; 389 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX; 390 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev); 391 return ret; 392 } 393 394 static void 395 enic_intr_handler(void *arg) 396 { 397 struct rte_eth_dev *dev = (struct rte_eth_dev *)arg; 398 struct enic *enic = pmd_priv(dev); 399 400 vnic_intr_return_all_credits(&enic->intr); 401 402 enic_link_update(enic); 403 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); 404 enic_log_q_error(enic); 405 } 406 407 int enic_enable(struct enic *enic) 408 { 409 unsigned int index; 410 int err; 411 struct rte_eth_dev *eth_dev = enic->rte_dev; 412 413 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev); 414 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX; 415 416 /* vnic notification of link status has already been turned on in 417 * enic_dev_init() which is called during probe time. Here we are 418 * just turning on interrupt vector 0 if needed. 419 */ 420 if (eth_dev->data->dev_conf.intr_conf.lsc) 421 vnic_dev_notify_set(enic->vdev, 0); 422 423 if (enic_clsf_init(enic)) 424 dev_warning(enic, "Init of hash table for clsf failed."\ 425 "Flow director feature will not work\n"); 426 427 for (index = 0; index < enic->rq_count; index++) { 428 err = enic_alloc_rx_queue_mbufs(enic, 429 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]); 430 if (err) { 431 dev_err(enic, "Failed to alloc sop RX queue mbufs\n"); 432 return err; 433 } 434 err = enic_alloc_rx_queue_mbufs(enic, 435 &enic->rq[enic_rte_rq_idx_to_data_idx(index)]); 436 if (err) { 437 /* release the allocated mbufs for the sop rq*/ 438 enic_rxmbuf_queue_release(enic, 439 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]); 440 441 dev_err(enic, "Failed to alloc data RX queue mbufs\n"); 442 return err; 443 } 444 } 445 446 for (index = 0; index < enic->wq_count; index++) 447 enic_start_wq(enic, index); 448 for (index = 0; index < enic->rq_count; index++) 449 enic_start_rq(enic, index); 450 451 vnic_dev_add_addr(enic->vdev, enic->mac_addr); 452 453 vnic_dev_enable_wait(enic->vdev); 454 455 /* Register and enable error interrupt */ 456 rte_intr_callback_register(&(enic->pdev->intr_handle), 457 enic_intr_handler, (void *)enic->rte_dev); 458 459 rte_intr_enable(&(enic->pdev->intr_handle)); 460 vnic_intr_unmask(&enic->intr); 461 462 return 0; 463 } 464 465 int enic_alloc_intr_resources(struct enic *enic) 466 { 467 int err; 468 469 dev_info(enic, "vNIC resources used: "\ 470 "wq %d rq %d cq %d intr %d\n", 471 enic->wq_count, enic_vnic_rq_count(enic), 472 enic->cq_count, enic->intr_count); 473 474 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0); 475 if (err) 476 enic_free_vnic_resources(enic); 477 478 return err; 479 } 480 481 void enic_free_rq(void *rxq) 482 { 483 struct vnic_rq *rq_sop, *rq_data; 484 struct enic *enic; 485 486 if (rxq == NULL) 487 return; 488 489 rq_sop = (struct vnic_rq *)rxq; 490 enic = vnic_dev_priv(rq_sop->vdev); 491 rq_data = &enic->rq[rq_sop->data_queue_idx]; 492 493 enic_rxmbuf_queue_release(enic, rq_sop); 494 if (rq_data->in_use) 495 enic_rxmbuf_queue_release(enic, rq_data); 496 497 rte_free(rq_sop->mbuf_ring); 498 if (rq_data->in_use) 499 rte_free(rq_data->mbuf_ring); 500 501 rq_sop->mbuf_ring = NULL; 502 rq_data->mbuf_ring = NULL; 503 504 vnic_rq_free(rq_sop); 505 if (rq_data->in_use) 506 vnic_rq_free(rq_data); 507 508 vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]); 509 510 rq_sop->in_use = 0; 511 rq_data->in_use = 0; 512 } 513 514 void enic_start_wq(struct enic *enic, uint16_t queue_idx) 515 { 516 struct rte_eth_dev *eth_dev = enic->rte_dev; 517 vnic_wq_enable(&enic->wq[queue_idx]); 518 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED; 519 } 520 521 int enic_stop_wq(struct enic *enic, uint16_t queue_idx) 522 { 523 struct rte_eth_dev *eth_dev = enic->rte_dev; 524 int ret; 525 526 ret = vnic_wq_disable(&enic->wq[queue_idx]); 527 if (ret) 528 return ret; 529 530 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED; 531 return 0; 532 } 533 534 void enic_start_rq(struct enic *enic, uint16_t queue_idx) 535 { 536 struct vnic_rq *rq_sop; 537 struct vnic_rq *rq_data; 538 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)]; 539 rq_data = &enic->rq[rq_sop->data_queue_idx]; 540 struct rte_eth_dev *eth_dev = enic->rte_dev; 541 542 if (rq_data->in_use) 543 vnic_rq_enable(rq_data); 544 rte_mb(); 545 vnic_rq_enable(rq_sop); 546 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED; 547 } 548 549 int enic_stop_rq(struct enic *enic, uint16_t queue_idx) 550 { 551 int ret1 = 0, ret2 = 0; 552 struct rte_eth_dev *eth_dev = enic->rte_dev; 553 struct vnic_rq *rq_sop; 554 struct vnic_rq *rq_data; 555 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)]; 556 rq_data = &enic->rq[rq_sop->data_queue_idx]; 557 558 ret2 = vnic_rq_disable(rq_sop); 559 rte_mb(); 560 if (rq_data->in_use) 561 ret1 = vnic_rq_disable(rq_data); 562 563 if (ret2) 564 return ret2; 565 else if (ret1) 566 return ret1; 567 568 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED; 569 return 0; 570 } 571 572 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx, 573 unsigned int socket_id, struct rte_mempool *mp, 574 uint16_t nb_desc, uint16_t free_thresh) 575 { 576 int rc; 577 uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx); 578 uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx); 579 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx]; 580 struct vnic_rq *rq_data = &enic->rq[data_queue_idx]; 581 unsigned int mbuf_size, mbufs_per_pkt; 582 unsigned int nb_sop_desc, nb_data_desc; 583 uint16_t min_sop, max_sop, min_data, max_data; 584 uint16_t mtu = enic->rte_dev->data->mtu; 585 586 rq_sop->is_sop = 1; 587 rq_sop->data_queue_idx = data_queue_idx; 588 rq_data->is_sop = 0; 589 rq_data->data_queue_idx = 0; 590 rq_sop->socket_id = socket_id; 591 rq_sop->mp = mp; 592 rq_data->socket_id = socket_id; 593 rq_data->mp = mp; 594 rq_sop->in_use = 1; 595 rq_sop->rx_free_thresh = free_thresh; 596 rq_data->rx_free_thresh = free_thresh; 597 dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx, 598 free_thresh); 599 600 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) - 601 RTE_PKTMBUF_HEADROOM); 602 603 if (enic->rte_dev->data->dev_conf.rxmode.offloads & 604 DEV_RX_OFFLOAD_SCATTER) { 605 dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx); 606 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */ 607 mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) + 608 (mbuf_size - 1)) / mbuf_size; 609 } else { 610 dev_info(enic, "Scatter rx mode disabled\n"); 611 mbufs_per_pkt = 1; 612 } 613 614 if (mbufs_per_pkt > 1) { 615 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx); 616 rq_sop->data_queue_enable = 1; 617 rq_data->in_use = 1; 618 } else { 619 dev_info(enic, "Rq %u Scatter rx mode not being used\n", 620 queue_idx); 621 rq_sop->data_queue_enable = 0; 622 rq_data->in_use = 0; 623 } 624 625 /* number of descriptors have to be a multiple of 32 */ 626 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F; 627 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F; 628 629 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt; 630 rq_data->max_mbufs_per_pkt = mbufs_per_pkt; 631 632 if (mbufs_per_pkt > 1) { 633 min_sop = 64; 634 max_sop = ((enic->config.rq_desc_count / 635 (mbufs_per_pkt - 1)) & ~0x1F); 636 min_data = min_sop * (mbufs_per_pkt - 1); 637 max_data = enic->config.rq_desc_count; 638 } else { 639 min_sop = 64; 640 max_sop = enic->config.rq_desc_count; 641 min_data = 0; 642 max_data = 0; 643 } 644 645 if (nb_desc < (min_sop + min_data)) { 646 dev_warning(enic, 647 "Number of rx descs too low, adjusting to minimum\n"); 648 nb_sop_desc = min_sop; 649 nb_data_desc = min_data; 650 } else if (nb_desc > (max_sop + max_data)) { 651 dev_warning(enic, 652 "Number of rx_descs too high, adjusting to maximum\n"); 653 nb_sop_desc = max_sop; 654 nb_data_desc = max_data; 655 } 656 if (mbufs_per_pkt > 1) { 657 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n", 658 mtu, mbuf_size, min_sop + min_data, 659 max_sop + max_data); 660 } 661 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n", 662 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc); 663 664 /* Allocate sop queue resources */ 665 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx, 666 nb_sop_desc, sizeof(struct rq_enet_desc)); 667 if (rc) { 668 dev_err(enic, "error in allocation of sop rq\n"); 669 goto err_exit; 670 } 671 nb_sop_desc = rq_sop->ring.desc_count; 672 673 if (rq_data->in_use) { 674 /* Allocate data queue resources */ 675 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx, 676 nb_data_desc, 677 sizeof(struct rq_enet_desc)); 678 if (rc) { 679 dev_err(enic, "error in allocation of data rq\n"); 680 goto err_free_rq_sop; 681 } 682 nb_data_desc = rq_data->ring.desc_count; 683 } 684 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx, 685 socket_id, nb_sop_desc + nb_data_desc, 686 sizeof(struct cq_enet_rq_desc)); 687 if (rc) { 688 dev_err(enic, "error in allocation of cq for rq\n"); 689 goto err_free_rq_data; 690 } 691 692 /* Allocate the mbuf rings */ 693 rq_sop->mbuf_ring = (struct rte_mbuf **) 694 rte_zmalloc_socket("rq->mbuf_ring", 695 sizeof(struct rte_mbuf *) * nb_sop_desc, 696 RTE_CACHE_LINE_SIZE, rq_sop->socket_id); 697 if (rq_sop->mbuf_ring == NULL) 698 goto err_free_cq; 699 700 if (rq_data->in_use) { 701 rq_data->mbuf_ring = (struct rte_mbuf **) 702 rte_zmalloc_socket("rq->mbuf_ring", 703 sizeof(struct rte_mbuf *) * nb_data_desc, 704 RTE_CACHE_LINE_SIZE, rq_sop->socket_id); 705 if (rq_data->mbuf_ring == NULL) 706 goto err_free_sop_mbuf; 707 } 708 709 rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */ 710 711 return 0; 712 713 err_free_sop_mbuf: 714 rte_free(rq_sop->mbuf_ring); 715 err_free_cq: 716 /* cleanup on error */ 717 vnic_cq_free(&enic->cq[queue_idx]); 718 err_free_rq_data: 719 if (rq_data->in_use) 720 vnic_rq_free(rq_data); 721 err_free_rq_sop: 722 vnic_rq_free(rq_sop); 723 err_exit: 724 return -ENOMEM; 725 } 726 727 void enic_free_wq(void *txq) 728 { 729 struct vnic_wq *wq; 730 struct enic *enic; 731 732 if (txq == NULL) 733 return; 734 735 wq = (struct vnic_wq *)txq; 736 enic = vnic_dev_priv(wq->vdev); 737 rte_memzone_free(wq->cqmsg_rz); 738 vnic_wq_free(wq); 739 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]); 740 } 741 742 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx, 743 unsigned int socket_id, uint16_t nb_desc) 744 { 745 int err; 746 struct vnic_wq *wq = &enic->wq[queue_idx]; 747 unsigned int cq_index = enic_cq_wq(enic, queue_idx); 748 char name[NAME_MAX]; 749 static int instance; 750 751 wq->socket_id = socket_id; 752 if (nb_desc) { 753 if (nb_desc > enic->config.wq_desc_count) { 754 dev_warning(enic, 755 "WQ %d - number of tx desc in cmd line (%d)"\ 756 "is greater than that in the UCSM/CIMC adapter"\ 757 "policy. Applying the value in the adapter "\ 758 "policy (%d)\n", 759 queue_idx, nb_desc, enic->config.wq_desc_count); 760 } else if (nb_desc != enic->config.wq_desc_count) { 761 enic->config.wq_desc_count = nb_desc; 762 dev_info(enic, 763 "TX Queues - effective number of descs:%d\n", 764 nb_desc); 765 } 766 } 767 768 /* Allocate queue resources */ 769 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx, 770 enic->config.wq_desc_count, 771 sizeof(struct wq_enet_desc)); 772 if (err) { 773 dev_err(enic, "error in allocation of wq\n"); 774 return err; 775 } 776 777 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index, 778 socket_id, enic->config.wq_desc_count, 779 sizeof(struct cq_enet_wq_desc)); 780 if (err) { 781 vnic_wq_free(wq); 782 dev_err(enic, "error in allocation of cq for wq\n"); 783 } 784 785 /* setup up CQ message */ 786 snprintf((char *)name, sizeof(name), 787 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx, 788 instance++); 789 790 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name, 791 sizeof(uint32_t), 792 SOCKET_ID_ANY, 0, 793 ENIC_ALIGN); 794 if (!wq->cqmsg_rz) 795 return -ENOMEM; 796 797 return err; 798 } 799 800 int enic_disable(struct enic *enic) 801 { 802 unsigned int i; 803 int err; 804 805 vnic_intr_mask(&enic->intr); 806 (void)vnic_intr_masked(&enic->intr); /* flush write */ 807 rte_intr_disable(&enic->pdev->intr_handle); 808 rte_intr_callback_unregister(&enic->pdev->intr_handle, 809 enic_intr_handler, 810 (void *)enic->rte_dev); 811 812 vnic_dev_disable(enic->vdev); 813 814 enic_clsf_destroy(enic); 815 816 if (!enic_is_sriov_vf(enic)) 817 vnic_dev_del_addr(enic->vdev, enic->mac_addr); 818 819 for (i = 0; i < enic->wq_count; i++) { 820 err = vnic_wq_disable(&enic->wq[i]); 821 if (err) 822 return err; 823 } 824 for (i = 0; i < enic_vnic_rq_count(enic); i++) { 825 if (enic->rq[i].in_use) { 826 err = vnic_rq_disable(&enic->rq[i]); 827 if (err) 828 return err; 829 } 830 } 831 832 /* If we were using interrupts, set the interrupt vector to -1 833 * to disable interrupts. We are not disabling link notifcations, 834 * though, as we want the polling of link status to continue working. 835 */ 836 if (enic->rte_dev->data->dev_conf.intr_conf.lsc) 837 vnic_dev_notify_set(enic->vdev, -1); 838 839 vnic_dev_set_reset_flag(enic->vdev, 1); 840 841 for (i = 0; i < enic->wq_count; i++) 842 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf); 843 844 for (i = 0; i < enic_vnic_rq_count(enic); i++) 845 if (enic->rq[i].in_use) 846 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 847 for (i = 0; i < enic->cq_count; i++) 848 vnic_cq_clean(&enic->cq[i]); 849 vnic_intr_clean(&enic->intr); 850 851 return 0; 852 } 853 854 static int enic_dev_wait(struct vnic_dev *vdev, 855 int (*start)(struct vnic_dev *, int), 856 int (*finished)(struct vnic_dev *, int *), 857 int arg) 858 { 859 int done; 860 int err; 861 int i; 862 863 err = start(vdev, arg); 864 if (err) 865 return err; 866 867 /* Wait for func to complete...2 seconds max */ 868 for (i = 0; i < 2000; i++) { 869 err = finished(vdev, &done); 870 if (err) 871 return err; 872 if (done) 873 return 0; 874 usleep(1000); 875 } 876 return -ETIMEDOUT; 877 } 878 879 static int enic_dev_open(struct enic *enic) 880 { 881 int err; 882 883 err = enic_dev_wait(enic->vdev, vnic_dev_open, 884 vnic_dev_open_done, 0); 885 if (err) 886 dev_err(enic_get_dev(enic), 887 "vNIC device open failed, err %d\n", err); 888 889 return err; 890 } 891 892 static int enic_set_rsskey(struct enic *enic) 893 { 894 dma_addr_t rss_key_buf_pa; 895 union vnic_rss_key *rss_key_buf_va = NULL; 896 static union vnic_rss_key rss_key = { 897 .key = { 898 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}}, 899 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}}, 900 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}}, 901 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}}, 902 } 903 }; 904 int err; 905 u8 name[NAME_MAX]; 906 907 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name); 908 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key), 909 &rss_key_buf_pa, name); 910 if (!rss_key_buf_va) 911 return -ENOMEM; 912 913 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key)); 914 915 err = enic_set_rss_key(enic, 916 rss_key_buf_pa, 917 sizeof(union vnic_rss_key)); 918 919 enic_free_consistent(enic, sizeof(union vnic_rss_key), 920 rss_key_buf_va, rss_key_buf_pa); 921 922 return err; 923 } 924 925 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 926 { 927 dma_addr_t rss_cpu_buf_pa; 928 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 929 int i; 930 int err; 931 u8 name[NAME_MAX]; 932 933 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name); 934 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu), 935 &rss_cpu_buf_pa, name); 936 if (!rss_cpu_buf_va) 937 return -ENOMEM; 938 939 for (i = 0; i < (1 << rss_hash_bits); i++) 940 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] = 941 enic_rte_rq_idx_to_sop_idx(i % enic->rq_count); 942 943 err = enic_set_rss_cpu(enic, 944 rss_cpu_buf_pa, 945 sizeof(union vnic_rss_cpu)); 946 947 enic_free_consistent(enic, sizeof(union vnic_rss_cpu), 948 rss_cpu_buf_va, rss_cpu_buf_pa); 949 950 return err; 951 } 952 953 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 954 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 955 { 956 const u8 tso_ipid_split_en = 0; 957 int err; 958 959 /* Enable VLAN tag stripping */ 960 961 err = enic_set_nic_cfg(enic, 962 rss_default_cpu, rss_hash_type, 963 rss_hash_bits, rss_base_cpu, 964 rss_enable, tso_ipid_split_en, 965 enic->ig_vlan_strip_en); 966 967 return err; 968 } 969 970 int enic_set_rss_nic_cfg(struct enic *enic) 971 { 972 const u8 rss_default_cpu = 0; 973 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 974 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 975 NIC_CFG_RSS_HASH_TYPE_IPV6 | 976 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 977 const u8 rss_hash_bits = 7; 978 const u8 rss_base_cpu = 0; 979 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 980 981 if (rss_enable) { 982 if (!enic_set_rsskey(enic)) { 983 if (enic_set_rsscpu(enic, rss_hash_bits)) { 984 rss_enable = 0; 985 dev_warning(enic, "RSS disabled, "\ 986 "Failed to set RSS cpu indirection table."); 987 } 988 } else { 989 rss_enable = 0; 990 dev_warning(enic, 991 "RSS disabled, Failed to set RSS key.\n"); 992 } 993 } 994 995 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 996 rss_hash_bits, rss_base_cpu, rss_enable); 997 } 998 999 int enic_setup_finish(struct enic *enic) 1000 { 1001 int ret; 1002 1003 enic_init_soft_stats(enic); 1004 1005 ret = enic_set_rss_nic_cfg(enic); 1006 if (ret) { 1007 dev_err(enic, "Failed to config nic, aborting.\n"); 1008 return -1; 1009 } 1010 1011 /* Default conf */ 1012 vnic_dev_packet_filter(enic->vdev, 1013 1 /* directed */, 1014 1 /* multicast */, 1015 1 /* broadcast */, 1016 0 /* promisc */, 1017 1 /* allmulti */); 1018 1019 enic->promisc = 0; 1020 enic->allmulti = 1; 1021 1022 return 0; 1023 } 1024 1025 void enic_add_packet_filter(struct enic *enic) 1026 { 1027 /* Args -> directed, multicast, broadcast, promisc, allmulti */ 1028 vnic_dev_packet_filter(enic->vdev, 1, 1, 1, 1029 enic->promisc, enic->allmulti); 1030 } 1031 1032 int enic_get_link_status(struct enic *enic) 1033 { 1034 return vnic_dev_link_status(enic->vdev); 1035 } 1036 1037 static void enic_dev_deinit(struct enic *enic) 1038 { 1039 struct rte_eth_dev *eth_dev = enic->rte_dev; 1040 1041 /* stop link status checking */ 1042 vnic_dev_notify_unset(enic->vdev); 1043 1044 rte_free(eth_dev->data->mac_addrs); 1045 } 1046 1047 1048 int enic_set_vnic_res(struct enic *enic) 1049 { 1050 struct rte_eth_dev *eth_dev = enic->rte_dev; 1051 int rc = 0; 1052 1053 /* With Rx scatter support, two RQs are now used per RQ used by 1054 * the application. 1055 */ 1056 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) { 1057 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n", 1058 eth_dev->data->nb_rx_queues, 1059 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count); 1060 rc = -EINVAL; 1061 } 1062 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) { 1063 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n", 1064 eth_dev->data->nb_tx_queues, enic->conf_wq_count); 1065 rc = -EINVAL; 1066 } 1067 1068 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues + 1069 eth_dev->data->nb_tx_queues)) { 1070 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n", 1071 (eth_dev->data->nb_rx_queues + 1072 eth_dev->data->nb_tx_queues), enic->conf_cq_count); 1073 rc = -EINVAL; 1074 } 1075 1076 if (rc == 0) { 1077 enic->rq_count = eth_dev->data->nb_rx_queues; 1078 enic->wq_count = eth_dev->data->nb_tx_queues; 1079 enic->cq_count = enic->rq_count + enic->wq_count; 1080 } 1081 1082 return rc; 1083 } 1084 1085 /* Initialize the completion queue for an RQ */ 1086 static int 1087 enic_reinit_rq(struct enic *enic, unsigned int rq_idx) 1088 { 1089 struct vnic_rq *sop_rq, *data_rq; 1090 unsigned int cq_idx; 1091 int rc = 0; 1092 1093 sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)]; 1094 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)]; 1095 cq_idx = rq_idx; 1096 1097 vnic_cq_clean(&enic->cq[cq_idx]); 1098 vnic_cq_init(&enic->cq[cq_idx], 1099 0 /* flow_control_enable */, 1100 1 /* color_enable */, 1101 0 /* cq_head */, 1102 0 /* cq_tail */, 1103 1 /* cq_tail_color */, 1104 0 /* interrupt_enable */, 1105 1 /* cq_entry_enable */, 1106 0 /* cq_message_enable */, 1107 0 /* interrupt offset */, 1108 0 /* cq_message_addr */); 1109 1110 1111 vnic_rq_init_start(sop_rq, enic_cq_rq(enic, 1112 enic_rte_rq_idx_to_sop_idx(rq_idx)), 0, 1113 sop_rq->ring.desc_count - 1, 1, 0); 1114 if (data_rq->in_use) { 1115 vnic_rq_init_start(data_rq, 1116 enic_cq_rq(enic, 1117 enic_rte_rq_idx_to_data_idx(rq_idx)), 0, 1118 data_rq->ring.desc_count - 1, 1, 0); 1119 } 1120 1121 rc = enic_alloc_rx_queue_mbufs(enic, sop_rq); 1122 if (rc) 1123 return rc; 1124 1125 if (data_rq->in_use) { 1126 rc = enic_alloc_rx_queue_mbufs(enic, data_rq); 1127 if (rc) { 1128 enic_rxmbuf_queue_release(enic, sop_rq); 1129 return rc; 1130 } 1131 } 1132 1133 return 0; 1134 } 1135 1136 /* The Cisco NIC can send and receive packets up to a max packet size 1137 * determined by the NIC type and firmware. There is also an MTU 1138 * configured into the NIC via the CIMC/UCSM management interface 1139 * which can be overridden by this function (up to the max packet size). 1140 * Depending on the network setup, doing so may cause packet drops 1141 * and unexpected behavior. 1142 */ 1143 int enic_set_mtu(struct enic *enic, uint16_t new_mtu) 1144 { 1145 unsigned int rq_idx; 1146 struct vnic_rq *rq; 1147 int rc = 0; 1148 uint16_t old_mtu; /* previous setting */ 1149 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */ 1150 struct rte_eth_dev *eth_dev = enic->rte_dev; 1151 1152 old_mtu = eth_dev->data->mtu; 1153 config_mtu = enic->config.mtu; 1154 1155 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1156 return -E_RTE_SECONDARY; 1157 1158 if (new_mtu > enic->max_mtu) { 1159 dev_err(enic, 1160 "MTU not updated: requested (%u) greater than max (%u)\n", 1161 new_mtu, enic->max_mtu); 1162 return -EINVAL; 1163 } 1164 if (new_mtu < ENIC_MIN_MTU) { 1165 dev_info(enic, 1166 "MTU not updated: requested (%u) less than min (%u)\n", 1167 new_mtu, ENIC_MIN_MTU); 1168 return -EINVAL; 1169 } 1170 if (new_mtu > config_mtu) 1171 dev_warning(enic, 1172 "MTU (%u) is greater than value configured in NIC (%u)\n", 1173 new_mtu, config_mtu); 1174 1175 /* The easy case is when scatter is disabled. However if the MTU 1176 * becomes greater than the mbuf data size, packet drops will ensue. 1177 */ 1178 if (!(enic->rte_dev->data->dev_conf.rxmode.offloads & 1179 DEV_RX_OFFLOAD_SCATTER)) { 1180 eth_dev->data->mtu = new_mtu; 1181 goto set_mtu_done; 1182 } 1183 1184 /* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to 1185 * change Rx scatter mode if necessary for better performance. I.e. if 1186 * MTU was greater than the mbuf size and now it's less, scatter Rx 1187 * doesn't have to be used and vice versa. 1188 */ 1189 rte_spinlock_lock(&enic->mtu_lock); 1190 1191 /* Stop traffic on all RQs */ 1192 for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) { 1193 rq = &enic->rq[rq_idx]; 1194 if (rq->is_sop && rq->in_use) { 1195 rc = enic_stop_rq(enic, 1196 enic_sop_rq_idx_to_rte_idx(rq_idx)); 1197 if (rc) { 1198 dev_err(enic, "Failed to stop Rq %u\n", rq_idx); 1199 goto set_mtu_done; 1200 } 1201 } 1202 } 1203 1204 /* replace Rx function with a no-op to avoid getting stale pkts */ 1205 eth_dev->rx_pkt_burst = enic_dummy_recv_pkts; 1206 rte_mb(); 1207 1208 /* Allow time for threads to exit the real Rx function. */ 1209 usleep(100000); 1210 1211 /* now it is safe to reconfigure the RQs */ 1212 1213 /* update the mtu */ 1214 eth_dev->data->mtu = new_mtu; 1215 1216 /* free and reallocate RQs with the new MTU */ 1217 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) { 1218 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)]; 1219 1220 enic_free_rq(rq); 1221 rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp, 1222 rq->tot_nb_desc, rq->rx_free_thresh); 1223 if (rc) { 1224 dev_err(enic, 1225 "Fatal MTU alloc error- No traffic will pass\n"); 1226 goto set_mtu_done; 1227 } 1228 1229 rc = enic_reinit_rq(enic, rq_idx); 1230 if (rc) { 1231 dev_err(enic, 1232 "Fatal MTU RQ reinit- No traffic will pass\n"); 1233 goto set_mtu_done; 1234 } 1235 } 1236 1237 /* put back the real receive function */ 1238 rte_mb(); 1239 eth_dev->rx_pkt_burst = enic_recv_pkts; 1240 rte_mb(); 1241 1242 /* restart Rx traffic */ 1243 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) { 1244 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)]; 1245 if (rq->is_sop && rq->in_use) 1246 enic_start_rq(enic, rq_idx); 1247 } 1248 1249 set_mtu_done: 1250 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu); 1251 rte_spinlock_unlock(&enic->mtu_lock); 1252 return rc; 1253 } 1254 1255 static int enic_dev_init(struct enic *enic) 1256 { 1257 int err; 1258 struct rte_eth_dev *eth_dev = enic->rte_dev; 1259 1260 vnic_dev_intr_coal_timer_info_default(enic->vdev); 1261 1262 /* Get vNIC configuration 1263 */ 1264 err = enic_get_vnic_config(enic); 1265 if (err) { 1266 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 1267 return err; 1268 } 1269 1270 /* Get available resource counts */ 1271 enic_get_res_counts(enic); 1272 if (enic->conf_rq_count == 1) { 1273 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n"); 1274 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n"); 1275 dev_err(enic, "See the ENIC PMD guide for more information.\n"); 1276 return -EINVAL; 1277 } 1278 1279 /* Get the supported filters */ 1280 enic_fdir_info(enic); 1281 1282 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN 1283 * ENIC_MAX_MAC_ADDR, 0); 1284 if (!eth_dev->data->mac_addrs) { 1285 dev_err(enic, "mac addr storage alloc failed, aborting.\n"); 1286 return -1; 1287 } 1288 ether_addr_copy((struct ether_addr *) enic->mac_addr, 1289 eth_dev->data->mac_addrs); 1290 1291 vnic_dev_set_reset_flag(enic->vdev, 0); 1292 1293 LIST_INIT(&enic->flows); 1294 rte_spinlock_init(&enic->flows_lock); 1295 1296 /* set up link status checking */ 1297 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */ 1298 1299 return 0; 1300 1301 } 1302 1303 int enic_probe(struct enic *enic) 1304 { 1305 struct rte_pci_device *pdev = enic->pdev; 1306 int err = -1; 1307 1308 dev_debug(enic, " Initializing ENIC PMD\n"); 1309 1310 /* if this is a secondary process the hardware is already initialized */ 1311 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1312 return 0; 1313 1314 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr; 1315 enic->bar0.len = pdev->mem_resource[0].len; 1316 1317 /* Register vNIC device */ 1318 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1); 1319 if (!enic->vdev) { 1320 dev_err(enic, "vNIC registration failed, aborting\n"); 1321 goto err_out; 1322 } 1323 1324 LIST_INIT(&enic->memzone_list); 1325 rte_spinlock_init(&enic->memzone_list_lock); 1326 1327 vnic_register_cbacks(enic->vdev, 1328 enic_alloc_consistent, 1329 enic_free_consistent); 1330 1331 /* Issue device open to get device in known state */ 1332 err = enic_dev_open(enic); 1333 if (err) { 1334 dev_err(enic, "vNIC dev open failed, aborting\n"); 1335 goto err_out_unregister; 1336 } 1337 1338 /* Set ingress vlan rewrite mode before vnic initialization */ 1339 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev, 1340 IG_VLAN_REWRITE_MODE_PASS_THRU); 1341 if (err) { 1342 dev_err(enic, 1343 "Failed to set ingress vlan rewrite mode, aborting.\n"); 1344 goto err_out_dev_close; 1345 } 1346 1347 /* Issue device init to initialize the vnic-to-switch link. 1348 * We'll start with carrier off and wait for link UP 1349 * notification later to turn on carrier. We don't need 1350 * to wait here for the vnic-to-switch link initialization 1351 * to complete; link UP notification is the indication that 1352 * the process is complete. 1353 */ 1354 1355 err = vnic_dev_init(enic->vdev, 0); 1356 if (err) { 1357 dev_err(enic, "vNIC dev init failed, aborting\n"); 1358 goto err_out_dev_close; 1359 } 1360 1361 err = enic_dev_init(enic); 1362 if (err) { 1363 dev_err(enic, "Device initialization failed, aborting\n"); 1364 goto err_out_dev_close; 1365 } 1366 1367 return 0; 1368 1369 err_out_dev_close: 1370 vnic_dev_close(enic->vdev); 1371 err_out_unregister: 1372 vnic_dev_unregister(enic->vdev); 1373 err_out: 1374 return err; 1375 } 1376 1377 void enic_remove(struct enic *enic) 1378 { 1379 enic_dev_deinit(enic); 1380 vnic_dev_close(enic->vdev); 1381 vnic_dev_unregister(enic->vdev); 1382 } 1383