1 /* 2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * Copyright (c) 2014, Cisco Systems, Inc. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in 17 * the documentation and/or other materials provided with the 18 * distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #include <stdio.h> 36 37 #include <sys/stat.h> 38 #include <sys/mman.h> 39 #include <fcntl.h> 40 #include <libgen.h> 41 42 #include <rte_pci.h> 43 #include <rte_memzone.h> 44 #include <rte_malloc.h> 45 #include <rte_mbuf.h> 46 #include <rte_string_fns.h> 47 #include <rte_ethdev.h> 48 49 #include "enic_compat.h" 50 #include "enic.h" 51 #include "wq_enet_desc.h" 52 #include "rq_enet_desc.h" 53 #include "cq_enet_desc.h" 54 #include "vnic_enet.h" 55 #include "vnic_dev.h" 56 #include "vnic_wq.h" 57 #include "vnic_rq.h" 58 #include "vnic_cq.h" 59 #include "vnic_intr.h" 60 #include "vnic_nic.h" 61 62 static inline int enic_is_sriov_vf(struct enic *enic) 63 { 64 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF; 65 } 66 67 static int is_zero_addr(uint8_t *addr) 68 { 69 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]); 70 } 71 72 static int is_mcast_addr(uint8_t *addr) 73 { 74 return addr[0] & 1; 75 } 76 77 static int is_eth_addr_valid(uint8_t *addr) 78 { 79 return !is_mcast_addr(addr) && !is_zero_addr(addr); 80 } 81 82 static void 83 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq) 84 { 85 uint16_t i; 86 87 if (!rq || !rq->mbuf_ring) { 88 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL"); 89 return; 90 } 91 92 for (i = 0; i < rq->ring.desc_count; i++) { 93 if (rq->mbuf_ring[i]) { 94 rte_pktmbuf_free_seg(rq->mbuf_ring[i]); 95 rq->mbuf_ring[i] = NULL; 96 } 97 } 98 } 99 100 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size) 101 { 102 vnic_set_hdr_split_size(enic->vdev, split_hdr_size); 103 } 104 105 static void enic_free_wq_buf(struct vnic_wq_buf *buf) 106 { 107 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb; 108 109 rte_pktmbuf_free_seg(mbuf); 110 buf->mb = NULL; 111 } 112 113 static void enic_log_q_error(struct enic *enic) 114 { 115 unsigned int i; 116 u32 error_status; 117 118 for (i = 0; i < enic->wq_count; i++) { 119 error_status = vnic_wq_error_status(&enic->wq[i]); 120 if (error_status) 121 dev_err(enic, "WQ[%d] error_status %d\n", i, 122 error_status); 123 } 124 125 for (i = 0; i < enic_vnic_rq_count(enic); i++) { 126 if (!enic->rq[i].in_use) 127 continue; 128 error_status = vnic_rq_error_status(&enic->rq[i]); 129 if (error_status) 130 dev_err(enic, "RQ[%d] error_status %d\n", i, 131 error_status); 132 } 133 } 134 135 static void enic_clear_soft_stats(struct enic *enic) 136 { 137 struct enic_soft_stats *soft_stats = &enic->soft_stats; 138 rte_atomic64_clear(&soft_stats->rx_nombuf); 139 rte_atomic64_clear(&soft_stats->rx_packet_errors); 140 rte_atomic64_clear(&soft_stats->tx_oversized); 141 } 142 143 static void enic_init_soft_stats(struct enic *enic) 144 { 145 struct enic_soft_stats *soft_stats = &enic->soft_stats; 146 rte_atomic64_init(&soft_stats->rx_nombuf); 147 rte_atomic64_init(&soft_stats->rx_packet_errors); 148 rte_atomic64_init(&soft_stats->tx_oversized); 149 enic_clear_soft_stats(enic); 150 } 151 152 void enic_dev_stats_clear(struct enic *enic) 153 { 154 if (vnic_dev_stats_clear(enic->vdev)) 155 dev_err(enic, "Error in clearing stats\n"); 156 enic_clear_soft_stats(enic); 157 } 158 159 void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats) 160 { 161 struct vnic_stats *stats; 162 struct enic_soft_stats *soft_stats = &enic->soft_stats; 163 int64_t rx_truncated; 164 uint64_t rx_packet_errors; 165 166 if (vnic_dev_stats_dump(enic->vdev, &stats)) { 167 dev_err(enic, "Error in getting stats\n"); 168 return; 169 } 170 171 /* The number of truncated packets can only be calculated by 172 * subtracting a hardware counter from error packets received by 173 * the driver. Note: this causes transient inaccuracies in the 174 * ipackets count. Also, the length of truncated packets are 175 * counted in ibytes even though truncated packets are dropped 176 * which can make ibytes be slightly higher than it should be. 177 */ 178 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors); 179 rx_truncated = rx_packet_errors - stats->rx.rx_errors; 180 181 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated; 182 r_stats->opackets = stats->tx.tx_frames_ok; 183 184 r_stats->ibytes = stats->rx.rx_bytes_ok; 185 r_stats->obytes = stats->tx.tx_bytes_ok; 186 187 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop; 188 r_stats->oerrors = stats->tx.tx_errors 189 + rte_atomic64_read(&soft_stats->tx_oversized); 190 191 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated; 192 193 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf); 194 } 195 196 void enic_del_mac_address(struct enic *enic, int mac_index) 197 { 198 struct rte_eth_dev *eth_dev = enic->rte_dev; 199 uint8_t *mac_addr = eth_dev->data->mac_addrs[mac_index].addr_bytes; 200 201 if (vnic_dev_del_addr(enic->vdev, mac_addr)) 202 dev_err(enic, "del mac addr failed\n"); 203 } 204 205 void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr) 206 { 207 int err; 208 209 if (!is_eth_addr_valid(mac_addr)) { 210 dev_err(enic, "invalid mac address\n"); 211 return; 212 } 213 214 err = vnic_dev_add_addr(enic->vdev, mac_addr); 215 if (err) { 216 dev_err(enic, "add mac addr failed\n"); 217 return; 218 } 219 } 220 221 static void 222 enic_free_rq_buf(struct rte_mbuf **mbuf) 223 { 224 if (*mbuf == NULL) 225 return; 226 227 rte_pktmbuf_free(*mbuf); 228 mbuf = NULL; 229 } 230 231 void enic_init_vnic_resources(struct enic *enic) 232 { 233 unsigned int error_interrupt_enable = 1; 234 unsigned int error_interrupt_offset = 0; 235 unsigned int index = 0; 236 unsigned int cq_idx; 237 struct vnic_rq *data_rq; 238 239 for (index = 0; index < enic->rq_count; index++) { 240 cq_idx = enic_cq_rq(enic, enic_rte_rq_idx_to_sop_idx(index)); 241 242 vnic_rq_init(&enic->rq[enic_rte_rq_idx_to_sop_idx(index)], 243 cq_idx, 244 error_interrupt_enable, 245 error_interrupt_offset); 246 247 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)]; 248 if (data_rq->in_use) 249 vnic_rq_init(data_rq, 250 cq_idx, 251 error_interrupt_enable, 252 error_interrupt_offset); 253 254 vnic_cq_init(&enic->cq[cq_idx], 255 0 /* flow_control_enable */, 256 1 /* color_enable */, 257 0 /* cq_head */, 258 0 /* cq_tail */, 259 1 /* cq_tail_color */, 260 0 /* interrupt_enable */, 261 1 /* cq_entry_enable */, 262 0 /* cq_message_enable */, 263 0 /* interrupt offset */, 264 0 /* cq_message_addr */); 265 } 266 267 for (index = 0; index < enic->wq_count; index++) { 268 vnic_wq_init(&enic->wq[index], 269 enic_cq_wq(enic, index), 270 error_interrupt_enable, 271 error_interrupt_offset); 272 273 cq_idx = enic_cq_wq(enic, index); 274 vnic_cq_init(&enic->cq[cq_idx], 275 0 /* flow_control_enable */, 276 1 /* color_enable */, 277 0 /* cq_head */, 278 0 /* cq_tail */, 279 1 /* cq_tail_color */, 280 0 /* interrupt_enable */, 281 0 /* cq_entry_enable */, 282 1 /* cq_message_enable */, 283 0 /* interrupt offset */, 284 (u64)enic->wq[index].cqmsg_rz->phys_addr); 285 } 286 287 vnic_intr_init(&enic->intr, 288 enic->config.intr_timer_usec, 289 enic->config.intr_timer_type, 290 /*mask_on_assertion*/1); 291 } 292 293 294 static int 295 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq) 296 { 297 struct rte_mbuf *mb; 298 struct rq_enet_desc *rqd = rq->ring.descs; 299 unsigned i; 300 dma_addr_t dma_addr; 301 302 if (!rq->in_use) 303 return 0; 304 305 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index, 306 rq->ring.desc_count); 307 308 for (i = 0; i < rq->ring.desc_count; i++, rqd++) { 309 mb = rte_mbuf_raw_alloc(rq->mp); 310 if (mb == NULL) { 311 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n", 312 (unsigned)rq->index); 313 return -ENOMEM; 314 } 315 316 mb->data_off = RTE_PKTMBUF_HEADROOM; 317 dma_addr = (dma_addr_t)(mb->buf_physaddr 318 + RTE_PKTMBUF_HEADROOM); 319 rq_enet_desc_enc(rqd, dma_addr, 320 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP 321 : RQ_ENET_TYPE_NOT_SOP), 322 mb->buf_len - RTE_PKTMBUF_HEADROOM); 323 rq->mbuf_ring[i] = mb; 324 } 325 326 /* make sure all prior writes are complete before doing the PIO write */ 327 rte_rmb(); 328 329 /* Post all but the last buffer to VIC. */ 330 rq->posted_index = rq->ring.desc_count - 1; 331 332 rq->rx_nb_hold = 0; 333 334 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n", 335 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold); 336 iowrite32(rq->posted_index, &rq->ctrl->posted_index); 337 iowrite32(0, &rq->ctrl->fetch_index); 338 rte_rmb(); 339 340 return 0; 341 342 } 343 344 static void * 345 enic_alloc_consistent(void *priv, size_t size, 346 dma_addr_t *dma_handle, u8 *name) 347 { 348 void *vaddr; 349 const struct rte_memzone *rz; 350 *dma_handle = 0; 351 struct enic *enic = (struct enic *)priv; 352 struct enic_memzone_entry *mze; 353 354 rz = rte_memzone_reserve_aligned((const char *)name, 355 size, SOCKET_ID_ANY, 0, ENIC_ALIGN); 356 if (!rz) { 357 pr_err("%s : Failed to allocate memory requested for %s\n", 358 __func__, name); 359 return NULL; 360 } 361 362 vaddr = rz->addr; 363 *dma_handle = (dma_addr_t)rz->phys_addr; 364 365 mze = rte_malloc("enic memzone entry", 366 sizeof(struct enic_memzone_entry), 0); 367 368 if (!mze) { 369 pr_err("%s : Failed to allocate memory for memzone list\n", 370 __func__); 371 rte_memzone_free(rz); 372 } 373 374 mze->rz = rz; 375 376 rte_spinlock_lock(&enic->memzone_list_lock); 377 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries); 378 rte_spinlock_unlock(&enic->memzone_list_lock); 379 380 return vaddr; 381 } 382 383 static void 384 enic_free_consistent(void *priv, 385 __rte_unused size_t size, 386 void *vaddr, 387 dma_addr_t dma_handle) 388 { 389 struct enic_memzone_entry *mze; 390 struct enic *enic = (struct enic *)priv; 391 392 rte_spinlock_lock(&enic->memzone_list_lock); 393 LIST_FOREACH(mze, &enic->memzone_list, entries) { 394 if (mze->rz->addr == vaddr && 395 mze->rz->phys_addr == dma_handle) 396 break; 397 } 398 if (mze == NULL) { 399 rte_spinlock_unlock(&enic->memzone_list_lock); 400 dev_warning(enic, 401 "Tried to free memory, but couldn't find it in the memzone list\n"); 402 return; 403 } 404 LIST_REMOVE(mze, entries); 405 rte_spinlock_unlock(&enic->memzone_list_lock); 406 rte_memzone_free(mze->rz); 407 rte_free(mze); 408 } 409 410 int enic_link_update(struct enic *enic) 411 { 412 struct rte_eth_dev *eth_dev = enic->rte_dev; 413 int ret; 414 int link_status = 0; 415 416 link_status = enic_get_link_status(enic); 417 ret = (link_status == enic->link_status); 418 enic->link_status = link_status; 419 eth_dev->data->dev_link.link_status = link_status; 420 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX; 421 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev); 422 return ret; 423 } 424 425 static void 426 enic_intr_handler(void *arg) 427 { 428 struct rte_eth_dev *dev = (struct rte_eth_dev *)arg; 429 struct enic *enic = pmd_priv(dev); 430 431 vnic_intr_return_all_credits(&enic->intr); 432 433 enic_link_update(enic); 434 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL); 435 enic_log_q_error(enic); 436 } 437 438 int enic_enable(struct enic *enic) 439 { 440 unsigned int index; 441 int err; 442 struct rte_eth_dev *eth_dev = enic->rte_dev; 443 444 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev); 445 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX; 446 447 /* vnic notification of link status has already been turned on in 448 * enic_dev_init() which is called during probe time. Here we are 449 * just turning on interrupt vector 0 if needed. 450 */ 451 if (eth_dev->data->dev_conf.intr_conf.lsc) 452 vnic_dev_notify_set(enic->vdev, 0); 453 454 if (enic_clsf_init(enic)) 455 dev_warning(enic, "Init of hash table for clsf failed."\ 456 "Flow director feature will not work\n"); 457 458 for (index = 0; index < enic->rq_count; index++) { 459 err = enic_alloc_rx_queue_mbufs(enic, 460 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]); 461 if (err) { 462 dev_err(enic, "Failed to alloc sop RX queue mbufs\n"); 463 return err; 464 } 465 err = enic_alloc_rx_queue_mbufs(enic, 466 &enic->rq[enic_rte_rq_idx_to_data_idx(index)]); 467 if (err) { 468 /* release the allocated mbufs for the sop rq*/ 469 enic_rxmbuf_queue_release(enic, 470 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]); 471 472 dev_err(enic, "Failed to alloc data RX queue mbufs\n"); 473 return err; 474 } 475 } 476 477 for (index = 0; index < enic->wq_count; index++) 478 enic_start_wq(enic, index); 479 for (index = 0; index < enic->rq_count; index++) 480 enic_start_rq(enic, index); 481 482 vnic_dev_add_addr(enic->vdev, enic->mac_addr); 483 484 vnic_dev_enable_wait(enic->vdev); 485 486 /* Register and enable error interrupt */ 487 rte_intr_callback_register(&(enic->pdev->intr_handle), 488 enic_intr_handler, (void *)enic->rte_dev); 489 490 rte_intr_enable(&(enic->pdev->intr_handle)); 491 vnic_intr_unmask(&enic->intr); 492 493 return 0; 494 } 495 496 int enic_alloc_intr_resources(struct enic *enic) 497 { 498 int err; 499 500 dev_info(enic, "vNIC resources used: "\ 501 "wq %d rq %d cq %d intr %d\n", 502 enic->wq_count, enic_vnic_rq_count(enic), 503 enic->cq_count, enic->intr_count); 504 505 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0); 506 if (err) 507 enic_free_vnic_resources(enic); 508 509 return err; 510 } 511 512 void enic_free_rq(void *rxq) 513 { 514 struct vnic_rq *rq_sop, *rq_data; 515 struct enic *enic; 516 517 if (rxq == NULL) 518 return; 519 520 rq_sop = (struct vnic_rq *)rxq; 521 enic = vnic_dev_priv(rq_sop->vdev); 522 rq_data = &enic->rq[rq_sop->data_queue_idx]; 523 524 enic_rxmbuf_queue_release(enic, rq_sop); 525 if (rq_data->in_use) 526 enic_rxmbuf_queue_release(enic, rq_data); 527 528 rte_free(rq_sop->mbuf_ring); 529 if (rq_data->in_use) 530 rte_free(rq_data->mbuf_ring); 531 532 rq_sop->mbuf_ring = NULL; 533 rq_data->mbuf_ring = NULL; 534 535 vnic_rq_free(rq_sop); 536 if (rq_data->in_use) 537 vnic_rq_free(rq_data); 538 539 vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]); 540 541 rq_sop->in_use = 0; 542 rq_data->in_use = 0; 543 } 544 545 void enic_start_wq(struct enic *enic, uint16_t queue_idx) 546 { 547 struct rte_eth_dev *eth_dev = enic->rte_dev; 548 vnic_wq_enable(&enic->wq[queue_idx]); 549 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED; 550 } 551 552 int enic_stop_wq(struct enic *enic, uint16_t queue_idx) 553 { 554 struct rte_eth_dev *eth_dev = enic->rte_dev; 555 int ret; 556 557 ret = vnic_wq_disable(&enic->wq[queue_idx]); 558 if (ret) 559 return ret; 560 561 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED; 562 return 0; 563 } 564 565 void enic_start_rq(struct enic *enic, uint16_t queue_idx) 566 { 567 struct vnic_rq *rq_sop; 568 struct vnic_rq *rq_data; 569 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)]; 570 rq_data = &enic->rq[rq_sop->data_queue_idx]; 571 struct rte_eth_dev *eth_dev = enic->rte_dev; 572 573 if (rq_data->in_use) 574 vnic_rq_enable(rq_data); 575 rte_mb(); 576 vnic_rq_enable(rq_sop); 577 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED; 578 } 579 580 int enic_stop_rq(struct enic *enic, uint16_t queue_idx) 581 { 582 int ret1 = 0, ret2 = 0; 583 struct rte_eth_dev *eth_dev = enic->rte_dev; 584 struct vnic_rq *rq_sop; 585 struct vnic_rq *rq_data; 586 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)]; 587 rq_data = &enic->rq[rq_sop->data_queue_idx]; 588 589 ret2 = vnic_rq_disable(rq_sop); 590 rte_mb(); 591 if (rq_data->in_use) 592 ret1 = vnic_rq_disable(rq_data); 593 594 if (ret2) 595 return ret2; 596 else if (ret1) 597 return ret1; 598 599 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED; 600 return 0; 601 } 602 603 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx, 604 unsigned int socket_id, struct rte_mempool *mp, 605 uint16_t nb_desc, uint16_t free_thresh) 606 { 607 int rc; 608 uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx); 609 uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx); 610 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx]; 611 struct vnic_rq *rq_data = &enic->rq[data_queue_idx]; 612 unsigned int mbuf_size, mbufs_per_pkt; 613 unsigned int nb_sop_desc, nb_data_desc; 614 uint16_t min_sop, max_sop, min_data, max_data; 615 uint16_t mtu = enic->rte_dev->data->mtu; 616 617 rq_sop->is_sop = 1; 618 rq_sop->data_queue_idx = data_queue_idx; 619 rq_data->is_sop = 0; 620 rq_data->data_queue_idx = 0; 621 rq_sop->socket_id = socket_id; 622 rq_sop->mp = mp; 623 rq_data->socket_id = socket_id; 624 rq_data->mp = mp; 625 rq_sop->in_use = 1; 626 rq_sop->rx_free_thresh = free_thresh; 627 rq_data->rx_free_thresh = free_thresh; 628 dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx, 629 free_thresh); 630 631 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) - 632 RTE_PKTMBUF_HEADROOM); 633 634 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) { 635 dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx); 636 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */ 637 mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) + 638 (mbuf_size - 1)) / mbuf_size; 639 } else { 640 dev_info(enic, "Scatter rx mode disabled\n"); 641 mbufs_per_pkt = 1; 642 } 643 644 if (mbufs_per_pkt > 1) { 645 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx); 646 rq_sop->data_queue_enable = 1; 647 rq_data->in_use = 1; 648 } else { 649 dev_info(enic, "Rq %u Scatter rx mode not being used\n", 650 queue_idx); 651 rq_sop->data_queue_enable = 0; 652 rq_data->in_use = 0; 653 } 654 655 /* number of descriptors have to be a multiple of 32 */ 656 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F; 657 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F; 658 659 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt; 660 rq_data->max_mbufs_per_pkt = mbufs_per_pkt; 661 662 if (mbufs_per_pkt > 1) { 663 min_sop = 64; 664 max_sop = ((enic->config.rq_desc_count / 665 (mbufs_per_pkt - 1)) & ~0x1F); 666 min_data = min_sop * (mbufs_per_pkt - 1); 667 max_data = enic->config.rq_desc_count; 668 } else { 669 min_sop = 64; 670 max_sop = enic->config.rq_desc_count; 671 min_data = 0; 672 max_data = 0; 673 } 674 675 if (nb_desc < (min_sop + min_data)) { 676 dev_warning(enic, 677 "Number of rx descs too low, adjusting to minimum\n"); 678 nb_sop_desc = min_sop; 679 nb_data_desc = min_data; 680 } else if (nb_desc > (max_sop + max_data)) { 681 dev_warning(enic, 682 "Number of rx_descs too high, adjusting to maximum\n"); 683 nb_sop_desc = max_sop; 684 nb_data_desc = max_data; 685 } 686 if (mbufs_per_pkt > 1) { 687 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n", 688 mtu, mbuf_size, min_sop + min_data, 689 max_sop + max_data); 690 } 691 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n", 692 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc); 693 694 /* Allocate sop queue resources */ 695 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx, 696 nb_sop_desc, sizeof(struct rq_enet_desc)); 697 if (rc) { 698 dev_err(enic, "error in allocation of sop rq\n"); 699 goto err_exit; 700 } 701 nb_sop_desc = rq_sop->ring.desc_count; 702 703 if (rq_data->in_use) { 704 /* Allocate data queue resources */ 705 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx, 706 nb_data_desc, 707 sizeof(struct rq_enet_desc)); 708 if (rc) { 709 dev_err(enic, "error in allocation of data rq\n"); 710 goto err_free_rq_sop; 711 } 712 nb_data_desc = rq_data->ring.desc_count; 713 } 714 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx, 715 socket_id, nb_sop_desc + nb_data_desc, 716 sizeof(struct cq_enet_rq_desc)); 717 if (rc) { 718 dev_err(enic, "error in allocation of cq for rq\n"); 719 goto err_free_rq_data; 720 } 721 722 /* Allocate the mbuf rings */ 723 rq_sop->mbuf_ring = (struct rte_mbuf **) 724 rte_zmalloc_socket("rq->mbuf_ring", 725 sizeof(struct rte_mbuf *) * nb_sop_desc, 726 RTE_CACHE_LINE_SIZE, rq_sop->socket_id); 727 if (rq_sop->mbuf_ring == NULL) 728 goto err_free_cq; 729 730 if (rq_data->in_use) { 731 rq_data->mbuf_ring = (struct rte_mbuf **) 732 rte_zmalloc_socket("rq->mbuf_ring", 733 sizeof(struct rte_mbuf *) * nb_data_desc, 734 RTE_CACHE_LINE_SIZE, rq_sop->socket_id); 735 if (rq_data->mbuf_ring == NULL) 736 goto err_free_sop_mbuf; 737 } 738 739 rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */ 740 741 return 0; 742 743 err_free_sop_mbuf: 744 rte_free(rq_sop->mbuf_ring); 745 err_free_cq: 746 /* cleanup on error */ 747 vnic_cq_free(&enic->cq[queue_idx]); 748 err_free_rq_data: 749 if (rq_data->in_use) 750 vnic_rq_free(rq_data); 751 err_free_rq_sop: 752 vnic_rq_free(rq_sop); 753 err_exit: 754 return -ENOMEM; 755 } 756 757 void enic_free_wq(void *txq) 758 { 759 struct vnic_wq *wq; 760 struct enic *enic; 761 762 if (txq == NULL) 763 return; 764 765 wq = (struct vnic_wq *)txq; 766 enic = vnic_dev_priv(wq->vdev); 767 rte_memzone_free(wq->cqmsg_rz); 768 vnic_wq_free(wq); 769 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]); 770 } 771 772 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx, 773 unsigned int socket_id, uint16_t nb_desc) 774 { 775 int err; 776 struct vnic_wq *wq = &enic->wq[queue_idx]; 777 unsigned int cq_index = enic_cq_wq(enic, queue_idx); 778 char name[NAME_MAX]; 779 static int instance; 780 781 wq->socket_id = socket_id; 782 if (nb_desc) { 783 if (nb_desc > enic->config.wq_desc_count) { 784 dev_warning(enic, 785 "WQ %d - number of tx desc in cmd line (%d)"\ 786 "is greater than that in the UCSM/CIMC adapter"\ 787 "policy. Applying the value in the adapter "\ 788 "policy (%d)\n", 789 queue_idx, nb_desc, enic->config.wq_desc_count); 790 } else if (nb_desc != enic->config.wq_desc_count) { 791 enic->config.wq_desc_count = nb_desc; 792 dev_info(enic, 793 "TX Queues - effective number of descs:%d\n", 794 nb_desc); 795 } 796 } 797 798 /* Allocate queue resources */ 799 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx, 800 enic->config.wq_desc_count, 801 sizeof(struct wq_enet_desc)); 802 if (err) { 803 dev_err(enic, "error in allocation of wq\n"); 804 return err; 805 } 806 807 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index, 808 socket_id, enic->config.wq_desc_count, 809 sizeof(struct cq_enet_wq_desc)); 810 if (err) { 811 vnic_wq_free(wq); 812 dev_err(enic, "error in allocation of cq for wq\n"); 813 } 814 815 /* setup up CQ message */ 816 snprintf((char *)name, sizeof(name), 817 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx, 818 instance++); 819 820 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name, 821 sizeof(uint32_t), 822 SOCKET_ID_ANY, 0, 823 ENIC_ALIGN); 824 if (!wq->cqmsg_rz) 825 return -ENOMEM; 826 827 return err; 828 } 829 830 int enic_disable(struct enic *enic) 831 { 832 unsigned int i; 833 int err; 834 835 vnic_intr_mask(&enic->intr); 836 (void)vnic_intr_masked(&enic->intr); /* flush write */ 837 rte_intr_disable(&enic->pdev->intr_handle); 838 rte_intr_callback_unregister(&enic->pdev->intr_handle, 839 enic_intr_handler, 840 (void *)enic->rte_dev); 841 842 vnic_dev_disable(enic->vdev); 843 844 enic_clsf_destroy(enic); 845 846 if (!enic_is_sriov_vf(enic)) 847 vnic_dev_del_addr(enic->vdev, enic->mac_addr); 848 849 for (i = 0; i < enic->wq_count; i++) { 850 err = vnic_wq_disable(&enic->wq[i]); 851 if (err) 852 return err; 853 } 854 for (i = 0; i < enic_vnic_rq_count(enic); i++) { 855 if (enic->rq[i].in_use) { 856 err = vnic_rq_disable(&enic->rq[i]); 857 if (err) 858 return err; 859 } 860 } 861 862 /* If we were using interrupts, set the interrupt vector to -1 863 * to disable interrupts. We are not disabling link notifcations, 864 * though, as we want the polling of link status to continue working. 865 */ 866 if (enic->rte_dev->data->dev_conf.intr_conf.lsc) 867 vnic_dev_notify_set(enic->vdev, -1); 868 869 vnic_dev_set_reset_flag(enic->vdev, 1); 870 871 for (i = 0; i < enic->wq_count; i++) 872 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf); 873 874 for (i = 0; i < enic_vnic_rq_count(enic); i++) 875 if (enic->rq[i].in_use) 876 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 877 for (i = 0; i < enic->cq_count; i++) 878 vnic_cq_clean(&enic->cq[i]); 879 vnic_intr_clean(&enic->intr); 880 881 return 0; 882 } 883 884 static int enic_dev_wait(struct vnic_dev *vdev, 885 int (*start)(struct vnic_dev *, int), 886 int (*finished)(struct vnic_dev *, int *), 887 int arg) 888 { 889 int done; 890 int err; 891 int i; 892 893 err = start(vdev, arg); 894 if (err) 895 return err; 896 897 /* Wait for func to complete...2 seconds max */ 898 for (i = 0; i < 2000; i++) { 899 err = finished(vdev, &done); 900 if (err) 901 return err; 902 if (done) 903 return 0; 904 usleep(1000); 905 } 906 return -ETIMEDOUT; 907 } 908 909 static int enic_dev_open(struct enic *enic) 910 { 911 int err; 912 913 err = enic_dev_wait(enic->vdev, vnic_dev_open, 914 vnic_dev_open_done, 0); 915 if (err) 916 dev_err(enic_get_dev(enic), 917 "vNIC device open failed, err %d\n", err); 918 919 return err; 920 } 921 922 static int enic_set_rsskey(struct enic *enic) 923 { 924 dma_addr_t rss_key_buf_pa; 925 union vnic_rss_key *rss_key_buf_va = NULL; 926 static union vnic_rss_key rss_key = { 927 .key = { 928 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}}, 929 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}}, 930 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}}, 931 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}}, 932 } 933 }; 934 int err; 935 u8 name[NAME_MAX]; 936 937 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name); 938 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key), 939 &rss_key_buf_pa, name); 940 if (!rss_key_buf_va) 941 return -ENOMEM; 942 943 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key)); 944 945 err = enic_set_rss_key(enic, 946 rss_key_buf_pa, 947 sizeof(union vnic_rss_key)); 948 949 enic_free_consistent(enic, sizeof(union vnic_rss_key), 950 rss_key_buf_va, rss_key_buf_pa); 951 952 return err; 953 } 954 955 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 956 { 957 dma_addr_t rss_cpu_buf_pa; 958 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 959 int i; 960 int err; 961 u8 name[NAME_MAX]; 962 963 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name); 964 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu), 965 &rss_cpu_buf_pa, name); 966 if (!rss_cpu_buf_va) 967 return -ENOMEM; 968 969 for (i = 0; i < (1 << rss_hash_bits); i++) 970 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] = 971 enic_rte_rq_idx_to_sop_idx(i % enic->rq_count); 972 973 err = enic_set_rss_cpu(enic, 974 rss_cpu_buf_pa, 975 sizeof(union vnic_rss_cpu)); 976 977 enic_free_consistent(enic, sizeof(union vnic_rss_cpu), 978 rss_cpu_buf_va, rss_cpu_buf_pa); 979 980 return err; 981 } 982 983 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 984 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 985 { 986 const u8 tso_ipid_split_en = 0; 987 int err; 988 989 /* Enable VLAN tag stripping */ 990 991 err = enic_set_nic_cfg(enic, 992 rss_default_cpu, rss_hash_type, 993 rss_hash_bits, rss_base_cpu, 994 rss_enable, tso_ipid_split_en, 995 enic->ig_vlan_strip_en); 996 997 return err; 998 } 999 1000 int enic_set_rss_nic_cfg(struct enic *enic) 1001 { 1002 const u8 rss_default_cpu = 0; 1003 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 1004 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 1005 NIC_CFG_RSS_HASH_TYPE_IPV6 | 1006 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 1007 const u8 rss_hash_bits = 7; 1008 const u8 rss_base_cpu = 0; 1009 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 1010 1011 if (rss_enable) { 1012 if (!enic_set_rsskey(enic)) { 1013 if (enic_set_rsscpu(enic, rss_hash_bits)) { 1014 rss_enable = 0; 1015 dev_warning(enic, "RSS disabled, "\ 1016 "Failed to set RSS cpu indirection table."); 1017 } 1018 } else { 1019 rss_enable = 0; 1020 dev_warning(enic, 1021 "RSS disabled, Failed to set RSS key.\n"); 1022 } 1023 } 1024 1025 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 1026 rss_hash_bits, rss_base_cpu, rss_enable); 1027 } 1028 1029 int enic_setup_finish(struct enic *enic) 1030 { 1031 int ret; 1032 1033 enic_init_soft_stats(enic); 1034 1035 ret = enic_set_rss_nic_cfg(enic); 1036 if (ret) { 1037 dev_err(enic, "Failed to config nic, aborting.\n"); 1038 return -1; 1039 } 1040 1041 /* Default conf */ 1042 vnic_dev_packet_filter(enic->vdev, 1043 1 /* directed */, 1044 1 /* multicast */, 1045 1 /* broadcast */, 1046 0 /* promisc */, 1047 1 /* allmulti */); 1048 1049 enic->promisc = 0; 1050 enic->allmulti = 1; 1051 1052 return 0; 1053 } 1054 1055 void enic_add_packet_filter(struct enic *enic) 1056 { 1057 /* Args -> directed, multicast, broadcast, promisc, allmulti */ 1058 vnic_dev_packet_filter(enic->vdev, 1, 1, 1, 1059 enic->promisc, enic->allmulti); 1060 } 1061 1062 int enic_get_link_status(struct enic *enic) 1063 { 1064 return vnic_dev_link_status(enic->vdev); 1065 } 1066 1067 static void enic_dev_deinit(struct enic *enic) 1068 { 1069 struct rte_eth_dev *eth_dev = enic->rte_dev; 1070 1071 /* stop link status checking */ 1072 vnic_dev_notify_unset(enic->vdev); 1073 1074 rte_free(eth_dev->data->mac_addrs); 1075 } 1076 1077 1078 int enic_set_vnic_res(struct enic *enic) 1079 { 1080 struct rte_eth_dev *eth_dev = enic->rte_dev; 1081 int rc = 0; 1082 1083 /* With Rx scatter support, two RQs are now used per RQ used by 1084 * the application. 1085 */ 1086 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) { 1087 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n", 1088 eth_dev->data->nb_rx_queues, 1089 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count); 1090 rc = -EINVAL; 1091 } 1092 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) { 1093 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n", 1094 eth_dev->data->nb_tx_queues, enic->conf_wq_count); 1095 rc = -EINVAL; 1096 } 1097 1098 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues + 1099 eth_dev->data->nb_tx_queues)) { 1100 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n", 1101 (eth_dev->data->nb_rx_queues + 1102 eth_dev->data->nb_tx_queues), enic->conf_cq_count); 1103 rc = -EINVAL; 1104 } 1105 1106 if (rc == 0) { 1107 enic->rq_count = eth_dev->data->nb_rx_queues; 1108 enic->wq_count = eth_dev->data->nb_tx_queues; 1109 enic->cq_count = enic->rq_count + enic->wq_count; 1110 } 1111 1112 return rc; 1113 } 1114 1115 /* Initialize the completion queue for an RQ */ 1116 static int 1117 enic_reinit_rq(struct enic *enic, unsigned int rq_idx) 1118 { 1119 struct vnic_rq *sop_rq, *data_rq; 1120 unsigned int cq_idx = enic_cq_rq(enic, rq_idx); 1121 int rc = 0; 1122 1123 sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)]; 1124 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)]; 1125 1126 vnic_cq_clean(&enic->cq[cq_idx]); 1127 vnic_cq_init(&enic->cq[cq_idx], 1128 0 /* flow_control_enable */, 1129 1 /* color_enable */, 1130 0 /* cq_head */, 1131 0 /* cq_tail */, 1132 1 /* cq_tail_color */, 1133 0 /* interrupt_enable */, 1134 1 /* cq_entry_enable */, 1135 0 /* cq_message_enable */, 1136 0 /* interrupt offset */, 1137 0 /* cq_message_addr */); 1138 1139 1140 vnic_rq_init_start(sop_rq, enic_cq_rq(enic, 1141 enic_rte_rq_idx_to_sop_idx(rq_idx)), 0, 1142 sop_rq->ring.desc_count - 1, 1, 0); 1143 if (data_rq->in_use) { 1144 vnic_rq_init_start(data_rq, 1145 enic_cq_rq(enic, 1146 enic_rte_rq_idx_to_data_idx(rq_idx)), 0, 1147 data_rq->ring.desc_count - 1, 1, 0); 1148 } 1149 1150 rc = enic_alloc_rx_queue_mbufs(enic, sop_rq); 1151 if (rc) 1152 return rc; 1153 1154 if (data_rq->in_use) { 1155 rc = enic_alloc_rx_queue_mbufs(enic, data_rq); 1156 if (rc) { 1157 enic_rxmbuf_queue_release(enic, sop_rq); 1158 return rc; 1159 } 1160 } 1161 1162 return 0; 1163 } 1164 1165 /* The Cisco NIC can send and receive packets up to a max packet size 1166 * determined by the NIC type and firmware. There is also an MTU 1167 * configured into the NIC via the CIMC/UCSM management interface 1168 * which can be overridden by this function (up to the max packet size). 1169 * Depending on the network setup, doing so may cause packet drops 1170 * and unexpected behavior. 1171 */ 1172 int enic_set_mtu(struct enic *enic, uint16_t new_mtu) 1173 { 1174 unsigned int rq_idx; 1175 struct vnic_rq *rq; 1176 int rc = 0; 1177 uint16_t old_mtu; /* previous setting */ 1178 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */ 1179 struct rte_eth_dev *eth_dev = enic->rte_dev; 1180 1181 old_mtu = eth_dev->data->mtu; 1182 config_mtu = enic->config.mtu; 1183 1184 if (new_mtu > enic->max_mtu) { 1185 dev_err(enic, 1186 "MTU not updated: requested (%u) greater than max (%u)\n", 1187 new_mtu, enic->max_mtu); 1188 return -EINVAL; 1189 } 1190 if (new_mtu < ENIC_MIN_MTU) { 1191 dev_info(enic, 1192 "MTU not updated: requested (%u) less than min (%u)\n", 1193 new_mtu, ENIC_MIN_MTU); 1194 return -EINVAL; 1195 } 1196 if (new_mtu > config_mtu) 1197 dev_warning(enic, 1198 "MTU (%u) is greater than value configured in NIC (%u)\n", 1199 new_mtu, config_mtu); 1200 1201 /* The easy case is when scatter is disabled. However if the MTU 1202 * becomes greater than the mbuf data size, packet drops will ensue. 1203 */ 1204 if (!enic->rte_dev->data->dev_conf.rxmode.enable_scatter) { 1205 eth_dev->data->mtu = new_mtu; 1206 goto set_mtu_done; 1207 } 1208 1209 /* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to 1210 * change Rx scatter mode if necessary for better performance. I.e. if 1211 * MTU was greater than the mbuf size and now it's less, scatter Rx 1212 * doesn't have to be used and vice versa. 1213 */ 1214 rte_spinlock_lock(&enic->mtu_lock); 1215 1216 /* Stop traffic on all RQs */ 1217 for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) { 1218 rq = &enic->rq[rq_idx]; 1219 if (rq->is_sop && rq->in_use) { 1220 rc = enic_stop_rq(enic, 1221 enic_sop_rq_idx_to_rte_idx(rq_idx)); 1222 if (rc) { 1223 dev_err(enic, "Failed to stop Rq %u\n", rq_idx); 1224 goto set_mtu_done; 1225 } 1226 } 1227 } 1228 1229 /* replace Rx funciton with a no-op to avoid getting stale pkts */ 1230 eth_dev->rx_pkt_burst = enic_dummy_recv_pkts; 1231 rte_mb(); 1232 1233 /* Allow time for threads to exit the real Rx function. */ 1234 usleep(100000); 1235 1236 /* now it is safe to reconfigure the RQs */ 1237 1238 /* update the mtu */ 1239 eth_dev->data->mtu = new_mtu; 1240 1241 /* free and reallocate RQs with the new MTU */ 1242 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) { 1243 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)]; 1244 1245 enic_free_rq(rq); 1246 rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp, 1247 rq->tot_nb_desc, rq->rx_free_thresh); 1248 if (rc) { 1249 dev_err(enic, 1250 "Fatal MTU alloc error- No traffic will pass\n"); 1251 goto set_mtu_done; 1252 } 1253 1254 rc = enic_reinit_rq(enic, rq_idx); 1255 if (rc) { 1256 dev_err(enic, 1257 "Fatal MTU RQ reinit- No traffic will pass\n"); 1258 goto set_mtu_done; 1259 } 1260 } 1261 1262 /* put back the real receive function */ 1263 rte_mb(); 1264 eth_dev->rx_pkt_burst = enic_recv_pkts; 1265 rte_mb(); 1266 1267 /* restart Rx traffic */ 1268 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) { 1269 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)]; 1270 if (rq->is_sop && rq->in_use) 1271 enic_start_rq(enic, rq_idx); 1272 } 1273 1274 set_mtu_done: 1275 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu); 1276 rte_spinlock_unlock(&enic->mtu_lock); 1277 return rc; 1278 } 1279 1280 static int enic_dev_init(struct enic *enic) 1281 { 1282 int err; 1283 struct rte_eth_dev *eth_dev = enic->rte_dev; 1284 1285 vnic_dev_intr_coal_timer_info_default(enic->vdev); 1286 1287 /* Get vNIC configuration 1288 */ 1289 err = enic_get_vnic_config(enic); 1290 if (err) { 1291 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 1292 return err; 1293 } 1294 1295 /* Get available resource counts */ 1296 enic_get_res_counts(enic); 1297 if (enic->conf_rq_count == 1) { 1298 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n"); 1299 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n"); 1300 dev_err(enic, "See the ENIC PMD guide for more information.\n"); 1301 return -EINVAL; 1302 } 1303 1304 /* Get the supported filters */ 1305 enic_fdir_info(enic); 1306 1307 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN 1308 * ENIC_MAX_MAC_ADDR, 0); 1309 if (!eth_dev->data->mac_addrs) { 1310 dev_err(enic, "mac addr storage alloc failed, aborting.\n"); 1311 return -1; 1312 } 1313 ether_addr_copy((struct ether_addr *) enic->mac_addr, 1314 eth_dev->data->mac_addrs); 1315 1316 vnic_dev_set_reset_flag(enic->vdev, 0); 1317 1318 /* set up link status checking */ 1319 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */ 1320 1321 return 0; 1322 1323 } 1324 1325 int enic_probe(struct enic *enic) 1326 { 1327 struct rte_pci_device *pdev = enic->pdev; 1328 int err = -1; 1329 1330 dev_debug(enic, " Initializing ENIC PMD\n"); 1331 1332 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr; 1333 enic->bar0.len = pdev->mem_resource[0].len; 1334 1335 /* Register vNIC device */ 1336 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1); 1337 if (!enic->vdev) { 1338 dev_err(enic, "vNIC registration failed, aborting\n"); 1339 goto err_out; 1340 } 1341 1342 LIST_INIT(&enic->memzone_list); 1343 rte_spinlock_init(&enic->memzone_list_lock); 1344 1345 vnic_register_cbacks(enic->vdev, 1346 enic_alloc_consistent, 1347 enic_free_consistent); 1348 1349 /* Issue device open to get device in known state */ 1350 err = enic_dev_open(enic); 1351 if (err) { 1352 dev_err(enic, "vNIC dev open failed, aborting\n"); 1353 goto err_out_unregister; 1354 } 1355 1356 /* Set ingress vlan rewrite mode before vnic initialization */ 1357 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev, 1358 IG_VLAN_REWRITE_MODE_PASS_THRU); 1359 if (err) { 1360 dev_err(enic, 1361 "Failed to set ingress vlan rewrite mode, aborting.\n"); 1362 goto err_out_dev_close; 1363 } 1364 1365 /* Issue device init to initialize the vnic-to-switch link. 1366 * We'll start with carrier off and wait for link UP 1367 * notification later to turn on carrier. We don't need 1368 * to wait here for the vnic-to-switch link initialization 1369 * to complete; link UP notification is the indication that 1370 * the process is complete. 1371 */ 1372 1373 err = vnic_dev_init(enic->vdev, 0); 1374 if (err) { 1375 dev_err(enic, "vNIC dev init failed, aborting\n"); 1376 goto err_out_dev_close; 1377 } 1378 1379 err = enic_dev_init(enic); 1380 if (err) { 1381 dev_err(enic, "Device initialization failed, aborting\n"); 1382 goto err_out_dev_close; 1383 } 1384 1385 return 0; 1386 1387 err_out_dev_close: 1388 vnic_dev_close(enic->vdev); 1389 err_out_unregister: 1390 vnic_dev_unregister(enic->vdev); 1391 err_out: 1392 return err; 1393 } 1394 1395 void enic_remove(struct enic *enic) 1396 { 1397 enic_dev_deinit(enic); 1398 vnic_dev_close(enic->vdev); 1399 vnic_dev_unregister(enic->vdev); 1400 } 1401