xref: /dpdk/drivers/net/dpaa2/dpaa2_sparser.h (revision 9df62f8574c2ea139432e3fff010d756f0980c45)
1*72ec7a67SSunil Kumar Kori /* * SPDX-License-Identifier: BSD-3-Clause
2*72ec7a67SSunil Kumar Kori  *   Copyright 2018-2019 NXP
3*72ec7a67SSunil Kumar Kori  */
4*72ec7a67SSunil Kumar Kori 
5*72ec7a67SSunil Kumar Kori /**
6*72ec7a67SSunil Kumar Kori  * @file	dpaa2_sparser.h
7*72ec7a67SSunil Kumar Kori  *
8*72ec7a67SSunil Kumar Kori  * @brief	Soft parser related macros & functions support for DPAA2 device
9*72ec7a67SSunil Kumar Kori  *	framework based applications.
10*72ec7a67SSunil Kumar Kori  *
11*72ec7a67SSunil Kumar Kori  */
12*72ec7a67SSunil Kumar Kori 
13*72ec7a67SSunil Kumar Kori #ifndef _DPAA2_SPARSER_H
14*72ec7a67SSunil Kumar Kori #define _DPAA2_SPARSER_H
15*72ec7a67SSunil Kumar Kori 
16*72ec7a67SSunil Kumar Kori #define WRIOP_SS_INITIALIZER(priv)				\
17*72ec7a67SSunil Kumar Kori do {								\
18*72ec7a67SSunil Kumar Kori 	/* Base offset of parse profile memory in WRIOP */	\
19*72ec7a67SSunil Kumar Kori 	(priv)->ss_offset = 0x20;				\
20*72ec7a67SSunil Kumar Kori 	(priv)->ss_iova	= (size_t)NULL;			\
21*72ec7a67SSunil Kumar Kori 	(priv)->ss_param_iova = (size_t)NULL;			\
22*72ec7a67SSunil Kumar Kori } while (0)
23*72ec7a67SSunil Kumar Kori 
24*72ec7a67SSunil Kumar Kori /**************************************************************************/
25*72ec7a67SSunil Kumar Kori /*
26*72ec7a67SSunil Kumar Kori  * @enum   parser_starting_hxs_code
27*72ec7a67SSunil Kumar Kori  * @Description PARSER Starting HXS code
28*72ec7a67SSunil Kumar Kori  */
29*72ec7a67SSunil Kumar Kori /***************************************************************************/
30*72ec7a67SSunil Kumar Kori enum parser_starting_hxs_code {
31*72ec7a67SSunil Kumar Kori 	/** Ethernet Starting HXS coding */
32*72ec7a67SSunil Kumar Kori 	PARSER_ETH_STARTING_HXS = 0x0000,
33*72ec7a67SSunil Kumar Kori 	/** LLC+SNAP Starting HXS coding */
34*72ec7a67SSunil Kumar Kori 	PARSER_LLC_SNAP_STARTING_HXS = 0x0001,
35*72ec7a67SSunil Kumar Kori 	/** VLAN Starting HXS coding */
36*72ec7a67SSunil Kumar Kori 	PARSER_VLAN_STARTING_HXS = 0x0002,
37*72ec7a67SSunil Kumar Kori 	/** PPPoE+PPP Starting HXS coding */
38*72ec7a67SSunil Kumar Kori 	PARSER_PPPOE_PPP_STARTING_HXS = 0x0003,
39*72ec7a67SSunil Kumar Kori 	/** MPLS Starting HXS coding */
40*72ec7a67SSunil Kumar Kori 	PARSER_MPLS_STARTING_HXS = 0x0004,
41*72ec7a67SSunil Kumar Kori 	/** ARP Starting HXS coding */
42*72ec7a67SSunil Kumar Kori 	PARSER_ARP_STARTING_HXS = 0x0005,
43*72ec7a67SSunil Kumar Kori 	/** IP Starting HXS coding */
44*72ec7a67SSunil Kumar Kori 	PARSER_IP_STARTING_HXS  = 0x0006,
45*72ec7a67SSunil Kumar Kori 	/** IPv4 Starting HXS coding */
46*72ec7a67SSunil Kumar Kori 	PARSER_IPV4_STARTING_HXS = 0x0007,
47*72ec7a67SSunil Kumar Kori 	/** IPv6 Starting HXS coding */
48*72ec7a67SSunil Kumar Kori 	PARSER_IPV6_STARTING_HXS = 0x0008,
49*72ec7a67SSunil Kumar Kori 	/** GRE Starting HXS coding */
50*72ec7a67SSunil Kumar Kori 	PARSER_GRE_STARTING_HXS = 0x0009,
51*72ec7a67SSunil Kumar Kori 	/** MinEncap Starting HXS coding */
52*72ec7a67SSunil Kumar Kori 	PARSER_MINENCAP_STARTING_HXS = 0x000A,
53*72ec7a67SSunil Kumar Kori 	/** Other L3 Shell Starting HXS coding */
54*72ec7a67SSunil Kumar Kori 	PARSER_OTHER_L3_SHELL_STARTING_HXS = 0x000B,
55*72ec7a67SSunil Kumar Kori 	/** TCP Starting HXS coding */
56*72ec7a67SSunil Kumar Kori 	PARSER_TCP_STARTING_HXS = 0x000C,
57*72ec7a67SSunil Kumar Kori 	/** UDP Starting HXS coding */
58*72ec7a67SSunil Kumar Kori 	PARSER_UDP_STARTING_HXS = 0x000D,
59*72ec7a67SSunil Kumar Kori 	/** IPSec Starting HXS coding */
60*72ec7a67SSunil Kumar Kori 	PARSER_IPSEC_STARTING_HXS = 0x000E,
61*72ec7a67SSunil Kumar Kori 	/** SCTP Starting HXS coding */
62*72ec7a67SSunil Kumar Kori 	PARSER_SCTP_STARTING_HXS = 0x000F,
63*72ec7a67SSunil Kumar Kori 	/** DCCP Starting HXS coding */
64*72ec7a67SSunil Kumar Kori 	PARSER_DCCP_STARTING_HXS = 0x0010,
65*72ec7a67SSunil Kumar Kori 	/** Other L4 Shell Starting HXS coding */
66*72ec7a67SSunil Kumar Kori 	PARSER_OTHER_L4_SHELL_STARTING_HXS = 0x0011,
67*72ec7a67SSunil Kumar Kori 	/** GTP Starting HXS coding */
68*72ec7a67SSunil Kumar Kori 	PARSER_GTP_STARTING_HXS = 0x0012,
69*72ec7a67SSunil Kumar Kori 	/** ESP Starting HXS coding */
70*72ec7a67SSunil Kumar Kori 	PARSER_ESP_STARTING_HXS = 0x0013,
71*72ec7a67SSunil Kumar Kori 	/** VXLAN Starting HXS coding */
72*72ec7a67SSunil Kumar Kori 	PARSER_VXLAN_STARTING_HXS = 0x0014,
73*72ec7a67SSunil Kumar Kori 	/** L5 (and above) Shell Starting HXS coding */
74*72ec7a67SSunil Kumar Kori 	PARSER_L5_SHELL_STARTING_HXS = 0x001E,
75*72ec7a67SSunil Kumar Kori 	/** Final Shell Starting HXS coding */
76*72ec7a67SSunil Kumar Kori 	PARSER_FINAL_SHELL_STARTING_HXS = 0x001F
77*72ec7a67SSunil Kumar Kori };
78*72ec7a67SSunil Kumar Kori 
79*72ec7a67SSunil Kumar Kori /**************************************************************************/
80*72ec7a67SSunil Kumar Kori /*
81*72ec7a67SSunil Kumar Kori  * @Description    struct dpni_drv_sparser_param - Structure representing the
82*72ec7a67SSunil Kumar Kori  *			information needed to activate(enable) a Soft Parser.
83*72ec7a67SSunil Kumar Kori  */
84*72ec7a67SSunil Kumar Kori /***************************************************************************/
85*72ec7a67SSunil Kumar Kori 
86*72ec7a67SSunil Kumar Kori struct dpni_drv_sparser_param {
87*72ec7a67SSunil Kumar Kori 	/* The "custom_header_first" must be set if the custom header to parse
88*72ec7a67SSunil Kumar Kori 	 * is the first header in the packet, otherwise "custom_header_first"
89*72ec7a67SSunil Kumar Kori 	 * must be cleared.
90*72ec7a67SSunil Kumar Kori 	 */
91*72ec7a67SSunil Kumar Kori 	uint8_t             custom_header_first;
92*72ec7a67SSunil Kumar Kori 	/* Hard HXS on which a soft parser is activated. This must be
93*72ec7a67SSunil Kumar Kori 	 * configured.
94*72ec7a67SSunil Kumar Kori 	 * if the header to parse is not the first header in the packet.
95*72ec7a67SSunil Kumar Kori 	 */
96*72ec7a67SSunil Kumar Kori 	enum parser_starting_hxs_code   link_to_hard_hxs;
97*72ec7a67SSunil Kumar Kori 	/* Soft Sequence Start PC */
98*72ec7a67SSunil Kumar Kori 	uint16_t            start_pc;
99*72ec7a67SSunil Kumar Kori 	/* Soft Sequence byte-code */
100*72ec7a67SSunil Kumar Kori 	uint8_t             *byte_code;
101*72ec7a67SSunil Kumar Kori 	/* Soft Sequence size */
102*72ec7a67SSunil Kumar Kori 	uint16_t            size;
103*72ec7a67SSunil Kumar Kori 	/* Pointer to the Parameters Array of the SP */
104*72ec7a67SSunil Kumar Kori 	uint8_t             *param_array;
105*72ec7a67SSunil Kumar Kori 	/* Parameters offset */
106*72ec7a67SSunil Kumar Kori 	uint8_t             param_offset;
107*72ec7a67SSunil Kumar Kori 	/* Parameters size */
108*72ec7a67SSunil Kumar Kori 	uint8_t             param_size;
109*72ec7a67SSunil Kumar Kori };
110*72ec7a67SSunil Kumar Kori 
111*72ec7a67SSunil Kumar Kori struct sp_parse_result {
112*72ec7a67SSunil Kumar Kori 	/* Next header */
113*72ec7a67SSunil Kumar Kori 	uint16_t    nxt_hdr;
114*72ec7a67SSunil Kumar Kori 	/* Frame Attribute Flags Extension */
115*72ec7a67SSunil Kumar Kori 	uint16_t    frame_attribute_flags_extension;
116*72ec7a67SSunil Kumar Kori 	/* Frame Attribute Flags (part 1) */
117*72ec7a67SSunil Kumar Kori 	uint32_t    frame_attribute_flags_1;
118*72ec7a67SSunil Kumar Kori 	/* Frame Attribute Flags (part 2) */
119*72ec7a67SSunil Kumar Kori 	uint32_t    frame_attribute_flags_2;
120*72ec7a67SSunil Kumar Kori 	/* Frame Attribute Flags (part 3) */
121*72ec7a67SSunil Kumar Kori 	uint32_t    frame_attribute_flags_3;
122*72ec7a67SSunil Kumar Kori 	/* Shim Offset 1 */
123*72ec7a67SSunil Kumar Kori 	uint8_t     shim_offset_1;
124*72ec7a67SSunil Kumar Kori 	/* Shim Offset 2 */
125*72ec7a67SSunil Kumar Kori 	uint8_t     shim_offset_2;
126*72ec7a67SSunil Kumar Kori 	/* Outer IP protocol field offset */
127*72ec7a67SSunil Kumar Kori 	uint8_t     ip_1_pid_offset;
128*72ec7a67SSunil Kumar Kori 	/* Ethernet offset */
129*72ec7a67SSunil Kumar Kori 	uint8_t     eth_offset;
130*72ec7a67SSunil Kumar Kori 	/* LLC+SNAP offset */
131*72ec7a67SSunil Kumar Kori 	uint8_t     llc_snap_offset;
132*72ec7a67SSunil Kumar Kori 	/* First VLAN's TCI field offset*/
133*72ec7a67SSunil Kumar Kori 	uint8_t     vlan_tci1_offset;
134*72ec7a67SSunil Kumar Kori 	/* Last VLAN's TCI field offset*/
135*72ec7a67SSunil Kumar Kori 	uint8_t     vlan_tcin_offset;
136*72ec7a67SSunil Kumar Kori 	/* Last Ethertype offset*/
137*72ec7a67SSunil Kumar Kori 	uint8_t     last_etype_offset;
138*72ec7a67SSunil Kumar Kori 	/* PPPoE offset */
139*72ec7a67SSunil Kumar Kori 	uint8_t     pppoe_offset;
140*72ec7a67SSunil Kumar Kori 	/* First MPLS offset */
141*72ec7a67SSunil Kumar Kori 	uint8_t     mpls_offset_1;
142*72ec7a67SSunil Kumar Kori 	/* Last MPLS offset */
143*72ec7a67SSunil Kumar Kori 	uint8_t     mpls_offset_n;
144*72ec7a67SSunil Kumar Kori 	/* Layer 3 (Outer IP, ARP, FCoE or FIP) offset */
145*72ec7a67SSunil Kumar Kori 	uint8_t     l3_offset;
146*72ec7a67SSunil Kumar Kori 	/* Inner IP or MinEncap offset*/
147*72ec7a67SSunil Kumar Kori 	uint8_t     ipn_or_minencap_offset;
148*72ec7a67SSunil Kumar Kori 	/* GRE offset */
149*72ec7a67SSunil Kumar Kori 	uint8_t     gre_offset;
150*72ec7a67SSunil Kumar Kori 	/* Layer 4 offset*/
151*72ec7a67SSunil Kumar Kori 	uint8_t     l4_offset;
152*72ec7a67SSunil Kumar Kori 	/* Layer 5 offset */
153*72ec7a67SSunil Kumar Kori 	uint8_t     l5_offset;
154*72ec7a67SSunil Kumar Kori 	/* Routing header offset of 1st IPv6 header */
155*72ec7a67SSunil Kumar Kori 	uint8_t     routing_hdr_offset1;
156*72ec7a67SSunil Kumar Kori 	/* Routing header offset of 2nd IPv6 header */
157*72ec7a67SSunil Kumar Kori 	uint8_t     routing_hdr_offset2;
158*72ec7a67SSunil Kumar Kori 	/* Next header offset */
159*72ec7a67SSunil Kumar Kori 	uint8_t     nxt_hdr_offset;
160*72ec7a67SSunil Kumar Kori 	/* IPv6 fragmentable part offset */
161*72ec7a67SSunil Kumar Kori 	uint8_t     ipv6_frag_offset;
162*72ec7a67SSunil Kumar Kori 	/* Frame's untouched running sum, input to parser */
163*72ec7a67SSunil Kumar Kori 	uint16_t    gross_running_sum;
164*72ec7a67SSunil Kumar Kori 	/* Running Sum */
165*72ec7a67SSunil Kumar Kori 	uint16_t    running_sum;
166*72ec7a67SSunil Kumar Kori 	/* Parse Error code */
167*72ec7a67SSunil Kumar Kori 	uint8_t     parse_error_code;
168*72ec7a67SSunil Kumar Kori 	/* Offset to the next header field before IPv6 fragment extension */
169*72ec7a67SSunil Kumar Kori 	uint8_t     nxt_hdr_before_ipv6_frag_ext;
170*72ec7a67SSunil Kumar Kori 	/* Inner IP Protocol field offset */
171*72ec7a67SSunil Kumar Kori 	uint8_t     ip_n_pid_offset;
172*72ec7a67SSunil Kumar Kori 	/* Reserved for Soft parsing context*/
173*72ec7a67SSunil Kumar Kori 	uint8_t     soft_parsing_context[21];
174*72ec7a67SSunil Kumar Kori };
175*72ec7a67SSunil Kumar Kori 
176*72ec7a67SSunil Kumar Kori struct frame_attr {
177*72ec7a67SSunil Kumar Kori 	const char *fld_name;
178*72ec7a67SSunil Kumar Kori 	uint8_t     faf_offset;
179*72ec7a67SSunil Kumar Kori 	uint32_t    fld_mask;
180*72ec7a67SSunil Kumar Kori };
181*72ec7a67SSunil Kumar Kori 
182*72ec7a67SSunil Kumar Kori struct frame_attr_ext {
183*72ec7a67SSunil Kumar Kori 	const char *fld_name;
184*72ec7a67SSunil Kumar Kori 	uint8_t     faf_ext_offset;
185*72ec7a67SSunil Kumar Kori 	uint16_t    fld_mask;
186*72ec7a67SSunil Kumar Kori };
187*72ec7a67SSunil Kumar Kori 
188*72ec7a67SSunil Kumar Kori 
189*72ec7a67SSunil Kumar Kori struct parse_err {
190*72ec7a67SSunil Kumar Kori 	uint16_t    code;
191*72ec7a67SSunil Kumar Kori 	const char *err_name;
192*72ec7a67SSunil Kumar Kori };
193*72ec7a67SSunil Kumar Kori 
194*72ec7a67SSunil Kumar Kori /* Macro definitions */
195*72ec7a67SSunil Kumar Kori #define IS_ONE_BIT_FIELD(_mask)                 \
196*72ec7a67SSunil Kumar Kori (!((_mask) & ((_mask) - 1)) || (_mask == 1))
197*72ec7a67SSunil Kumar Kori 
198*72ec7a67SSunil Kumar Kori int dpaa2_eth_load_wriop_soft_parser(struct dpaa2_dev_priv *priv,
199*72ec7a67SSunil Kumar Kori 		enum dpni_soft_sequence_dest dest);
200*72ec7a67SSunil Kumar Kori int dpaa2_eth_enable_wriop_soft_parser(struct dpaa2_dev_priv *priv,
201*72ec7a67SSunil Kumar Kori 		enum dpni_soft_sequence_dest dest);
202*72ec7a67SSunil Kumar Kori #endif /* _DPAA2_SPARSER_H_ */
203