1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved. 5 * Copyright (c) 2016 NXP. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _DPAA2_ETHDEV_H 35 #define _DPAA2_ETHDEV_H 36 37 #include <mc/fsl_dpni.h> 38 #include <mc/fsl_mc_sys.h> 39 40 #define DPAA2_MIN_RX_BUF_SIZE 512 41 #define DPAA2_MAX_RX_PKT_LEN 10240 /*WRIOP support*/ 42 43 #define MAX_TCS DPNI_MAX_TC 44 #define MAX_RX_QUEUES 16 45 #define MAX_TX_QUEUES 16 46 47 /*default tc to be used for ,congestion, distribution etc configuration. */ 48 #define DPAA2_DEF_TC 0 49 50 /* Threshold for a Tx queue to *Enter* Congestion state. 51 */ 52 #define CONG_ENTER_TX_THRESHOLD 512 53 54 /* Threshold for a queue to *Exit* Congestion state. 55 */ 56 #define CONG_EXIT_TX_THRESHOLD 480 57 58 /* RX queue tail drop threshold 59 * currently considering 32 KB packets 60 */ 61 #define CONG_THRESHOLD_RX_Q (64 * 1024) 62 63 /* Size of the input SMMU mapped memory required by MC */ 64 #define DIST_PARAM_IOVA_SIZE 256 65 66 /* Enable TX Congestion control support 67 * default is disable 68 */ 69 #define DPAA2_TX_CGR_SUPPORT 0x01 70 71 /* Disable RX tail drop, default is enable */ 72 #define DPAA2_RX_TAILDROP_OFF 0x04 73 74 struct dpaa2_dev_priv { 75 void *hw; 76 int32_t hw_id; 77 int32_t qdid; 78 uint16_t token; 79 uint8_t nb_tx_queues; 80 uint8_t nb_rx_queues; 81 void *rx_vq[MAX_RX_QUEUES]; 82 void *tx_vq[MAX_TX_QUEUES]; 83 84 struct dpaa2_bp_list *bp_list; /**<Attached buffer pool list */ 85 uint32_t options; 86 uint8_t max_mac_filters; 87 uint8_t max_vlan_filters; 88 uint8_t num_tc; 89 uint8_t flags; /*dpaa2 config flags */ 90 }; 91 92 int dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev, 93 uint32_t req_dist_set); 94 95 int dpaa2_remove_flow_dist(struct rte_eth_dev *eth_dev, 96 uint8_t tc_index); 97 98 int dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv, void *blist); 99 100 uint16_t dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, 101 uint16_t nb_pkts); 102 uint16_t dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts); 103 uint16_t dummy_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts); 104 #endif /* _DPAA2_ETHDEV_H */ 105