1 /* * SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved. 4 * Copyright 2016 NXP 5 * 6 */ 7 8 #include <time.h> 9 #include <net/if.h> 10 11 #include <rte_mbuf.h> 12 #include <rte_ethdev_driver.h> 13 #include <rte_malloc.h> 14 #include <rte_memcpy.h> 15 #include <rte_string_fns.h> 16 #include <rte_cycles.h> 17 #include <rte_kvargs.h> 18 #include <rte_dev.h> 19 #include <rte_fslmc.h> 20 #include <rte_flow_driver.h> 21 22 #include "dpaa2_pmd_logs.h" 23 #include <fslmc_vfio.h> 24 #include <dpaa2_hw_pvt.h> 25 #include <dpaa2_hw_mempool.h> 26 #include <dpaa2_hw_dpio.h> 27 #include <mc/fsl_dpmng.h> 28 #include "dpaa2_ethdev.h" 29 #include <fsl_qbman_debug.h> 30 31 #define DRIVER_LOOPBACK_MODE "drv_looback" 32 33 /* Supported Rx offloads */ 34 static uint64_t dev_rx_offloads_sup = 35 DEV_RX_OFFLOAD_VLAN_STRIP | 36 DEV_RX_OFFLOAD_IPV4_CKSUM | 37 DEV_RX_OFFLOAD_UDP_CKSUM | 38 DEV_RX_OFFLOAD_TCP_CKSUM | 39 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 40 DEV_RX_OFFLOAD_VLAN_FILTER | 41 DEV_RX_OFFLOAD_JUMBO_FRAME; 42 43 /* Rx offloads which cannot be disabled */ 44 static uint64_t dev_rx_offloads_nodis = 45 DEV_RX_OFFLOAD_SCATTER; 46 47 /* Supported Tx offloads */ 48 static uint64_t dev_tx_offloads_sup = 49 DEV_TX_OFFLOAD_VLAN_INSERT | 50 DEV_TX_OFFLOAD_IPV4_CKSUM | 51 DEV_TX_OFFLOAD_UDP_CKSUM | 52 DEV_TX_OFFLOAD_TCP_CKSUM | 53 DEV_TX_OFFLOAD_SCTP_CKSUM | 54 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM; 55 56 /* Tx offloads which cannot be disabled */ 57 static uint64_t dev_tx_offloads_nodis = 58 DEV_TX_OFFLOAD_MULTI_SEGS | 59 DEV_TX_OFFLOAD_MT_LOCKFREE | 60 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 61 62 /* enable timestamp in mbuf */ 63 enum pmd_dpaa2_ts dpaa2_enable_ts; 64 65 struct rte_dpaa2_xstats_name_off { 66 char name[RTE_ETH_XSTATS_NAME_SIZE]; 67 uint8_t page_id; /* dpni statistics page id */ 68 uint8_t stats_id; /* stats id in the given page */ 69 }; 70 71 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = { 72 {"ingress_multicast_frames", 0, 2}, 73 {"ingress_multicast_bytes", 0, 3}, 74 {"ingress_broadcast_frames", 0, 4}, 75 {"ingress_broadcast_bytes", 0, 5}, 76 {"egress_multicast_frames", 1, 2}, 77 {"egress_multicast_bytes", 1, 3}, 78 {"egress_broadcast_frames", 1, 4}, 79 {"egress_broadcast_bytes", 1, 5}, 80 {"ingress_filtered_frames", 2, 0}, 81 {"ingress_discarded_frames", 2, 1}, 82 {"ingress_nobuffer_discards", 2, 2}, 83 {"egress_discarded_frames", 2, 3}, 84 {"egress_confirmed_frames", 2, 4}, 85 }; 86 87 static const enum rte_filter_op dpaa2_supported_filter_ops[] = { 88 RTE_ETH_FILTER_ADD, 89 RTE_ETH_FILTER_DELETE, 90 RTE_ETH_FILTER_UPDATE, 91 RTE_ETH_FILTER_FLUSH, 92 RTE_ETH_FILTER_GET 93 }; 94 95 static struct rte_dpaa2_driver rte_dpaa2_pmd; 96 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev); 97 static int dpaa2_dev_link_update(struct rte_eth_dev *dev, 98 int wait_to_complete); 99 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev); 100 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev); 101 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 102 103 int dpaa2_logtype_pmd; 104 105 __rte_experimental void 106 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable) 107 { 108 dpaa2_enable_ts = enable; 109 } 110 111 static int 112 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 113 { 114 int ret; 115 struct dpaa2_dev_priv *priv = dev->data->dev_private; 116 struct fsl_mc_io *dpni = priv->hw; 117 118 PMD_INIT_FUNC_TRACE(); 119 120 if (dpni == NULL) { 121 DPAA2_PMD_ERR("dpni is NULL"); 122 return -1; 123 } 124 125 if (on) 126 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, 127 priv->token, vlan_id); 128 else 129 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW, 130 priv->token, vlan_id); 131 132 if (ret < 0) 133 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d", 134 ret, vlan_id, priv->hw_id); 135 136 return ret; 137 } 138 139 static int 140 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask) 141 { 142 struct dpaa2_dev_priv *priv = dev->data->dev_private; 143 struct fsl_mc_io *dpni = priv->hw; 144 int ret; 145 146 PMD_INIT_FUNC_TRACE(); 147 148 if (mask & ETH_VLAN_FILTER_MASK) { 149 /* VLAN Filter not avaialble */ 150 if (!priv->max_vlan_filters) { 151 DPAA2_PMD_INFO("VLAN filter not available"); 152 goto next_mask; 153 } 154 155 if (dev->data->dev_conf.rxmode.offloads & 156 DEV_RX_OFFLOAD_VLAN_FILTER) 157 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW, 158 priv->token, true); 159 else 160 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW, 161 priv->token, false); 162 if (ret < 0) 163 DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret); 164 } 165 next_mask: 166 if (mask & ETH_VLAN_EXTEND_MASK) { 167 if (dev->data->dev_conf.rxmode.offloads & 168 DEV_RX_OFFLOAD_VLAN_EXTEND) 169 DPAA2_PMD_INFO("VLAN extend offload not supported"); 170 } 171 172 return 0; 173 } 174 175 static int 176 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev, 177 enum rte_vlan_type vlan_type __rte_unused, 178 uint16_t tpid) 179 { 180 struct dpaa2_dev_priv *priv = dev->data->dev_private; 181 struct fsl_mc_io *dpni = priv->hw; 182 int ret = -ENOTSUP; 183 184 PMD_INIT_FUNC_TRACE(); 185 186 /* nothing to be done for standard vlan tpids */ 187 if (tpid == 0x8100 || tpid == 0x88A8) 188 return 0; 189 190 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW, 191 priv->token, tpid); 192 if (ret < 0) 193 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret); 194 /* if already configured tpids, remove them first */ 195 if (ret == -EBUSY) { 196 struct dpni_custom_tpid_cfg tpid_list = {0}; 197 198 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW, 199 priv->token, &tpid_list); 200 if (ret < 0) 201 goto fail; 202 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW, 203 priv->token, tpid_list.tpid1); 204 if (ret < 0) 205 goto fail; 206 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW, 207 priv->token, tpid); 208 } 209 fail: 210 return ret; 211 } 212 213 static int 214 dpaa2_fw_version_get(struct rte_eth_dev *dev, 215 char *fw_version, 216 size_t fw_size) 217 { 218 int ret; 219 struct dpaa2_dev_priv *priv = dev->data->dev_private; 220 struct fsl_mc_io *dpni = priv->hw; 221 struct mc_soc_version mc_plat_info = {0}; 222 struct mc_version mc_ver_info = {0}; 223 224 PMD_INIT_FUNC_TRACE(); 225 226 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info)) 227 DPAA2_PMD_WARN("\tmc_get_soc_version failed"); 228 229 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info)) 230 DPAA2_PMD_WARN("\tmc_get_version failed"); 231 232 ret = snprintf(fw_version, fw_size, 233 "%x-%d.%d.%d", 234 mc_plat_info.svr, 235 mc_ver_info.major, 236 mc_ver_info.minor, 237 mc_ver_info.revision); 238 239 ret += 1; /* add the size of '\0' */ 240 if (fw_size < (uint32_t)ret) 241 return ret; 242 else 243 return 0; 244 } 245 246 static void 247 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 248 { 249 struct dpaa2_dev_priv *priv = dev->data->dev_private; 250 251 PMD_INIT_FUNC_TRACE(); 252 253 dev_info->if_index = priv->hw_id; 254 255 dev_info->max_mac_addrs = priv->max_mac_filters; 256 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN; 257 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE; 258 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues; 259 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues; 260 dev_info->rx_offload_capa = dev_rx_offloads_sup | 261 dev_rx_offloads_nodis; 262 dev_info->tx_offload_capa = dev_tx_offloads_sup | 263 dev_tx_offloads_nodis; 264 dev_info->speed_capa = ETH_LINK_SPEED_1G | 265 ETH_LINK_SPEED_2_5G | 266 ETH_LINK_SPEED_10G; 267 268 dev_info->max_hash_mac_addrs = 0; 269 dev_info->max_vfs = 0; 270 dev_info->max_vmdq_pools = ETH_16_POOLS; 271 dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL; 272 } 273 274 static int 275 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev) 276 { 277 struct dpaa2_dev_priv *priv = dev->data->dev_private; 278 uint16_t dist_idx; 279 uint32_t vq_id; 280 uint8_t num_rxqueue_per_tc; 281 struct dpaa2_queue *mc_q, *mcq; 282 uint32_t tot_queues; 283 int i; 284 struct dpaa2_queue *dpaa2_q; 285 286 PMD_INIT_FUNC_TRACE(); 287 288 num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc); 289 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues; 290 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues, 291 RTE_CACHE_LINE_SIZE); 292 if (!mc_q) { 293 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues"); 294 return -1; 295 } 296 297 for (i = 0; i < priv->nb_rx_queues; i++) { 298 mc_q->eth_data = dev->data; 299 priv->rx_vq[i] = mc_q++; 300 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 301 dpaa2_q->q_storage = rte_malloc("dq_storage", 302 sizeof(struct queue_storage_info_t), 303 RTE_CACHE_LINE_SIZE); 304 if (!dpaa2_q->q_storage) 305 goto fail; 306 307 memset(dpaa2_q->q_storage, 0, 308 sizeof(struct queue_storage_info_t)); 309 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage)) 310 goto fail; 311 } 312 313 for (i = 0; i < priv->nb_tx_queues; i++) { 314 mc_q->eth_data = dev->data; 315 mc_q->flow_id = 0xffff; 316 priv->tx_vq[i] = mc_q++; 317 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 318 dpaa2_q->cscn = rte_malloc(NULL, 319 sizeof(struct qbman_result), 16); 320 if (!dpaa2_q->cscn) 321 goto fail_tx; 322 } 323 324 vq_id = 0; 325 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) { 326 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id]; 327 mcq->tc_index = dist_idx / num_rxqueue_per_tc; 328 mcq->flow_id = dist_idx % num_rxqueue_per_tc; 329 vq_id++; 330 } 331 332 return 0; 333 fail_tx: 334 i -= 1; 335 while (i >= 0) { 336 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 337 rte_free(dpaa2_q->cscn); 338 priv->tx_vq[i--] = NULL; 339 } 340 i = priv->nb_rx_queues; 341 fail: 342 i -= 1; 343 mc_q = priv->rx_vq[0]; 344 while (i >= 0) { 345 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 346 dpaa2_free_dq_storage(dpaa2_q->q_storage); 347 rte_free(dpaa2_q->q_storage); 348 priv->rx_vq[i--] = NULL; 349 } 350 rte_free(mc_q); 351 return -1; 352 } 353 354 static void 355 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev) 356 { 357 struct dpaa2_dev_priv *priv = dev->data->dev_private; 358 struct dpaa2_queue *dpaa2_q; 359 int i; 360 361 PMD_INIT_FUNC_TRACE(); 362 363 /* Queue allocation base */ 364 if (priv->rx_vq[0]) { 365 /* cleaning up queue storage */ 366 for (i = 0; i < priv->nb_rx_queues; i++) { 367 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 368 if (dpaa2_q->q_storage) 369 rte_free(dpaa2_q->q_storage); 370 } 371 /* cleanup tx queue cscn */ 372 for (i = 0; i < priv->nb_tx_queues; i++) { 373 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 374 rte_free(dpaa2_q->cscn); 375 } 376 /*free memory for all queues (RX+TX) */ 377 rte_free(priv->rx_vq[0]); 378 priv->rx_vq[0] = NULL; 379 } 380 } 381 382 static int 383 dpaa2_eth_dev_configure(struct rte_eth_dev *dev) 384 { 385 struct dpaa2_dev_priv *priv = dev->data->dev_private; 386 struct fsl_mc_io *dpni = priv->hw; 387 struct rte_eth_conf *eth_conf = &dev->data->dev_conf; 388 uint64_t rx_offloads = eth_conf->rxmode.offloads; 389 uint64_t tx_offloads = eth_conf->txmode.offloads; 390 int rx_l3_csum_offload = false; 391 int rx_l4_csum_offload = false; 392 int tx_l3_csum_offload = false; 393 int tx_l4_csum_offload = false; 394 int ret; 395 396 PMD_INIT_FUNC_TRACE(); 397 398 /* Rx offloads validation */ 399 if (dev_rx_offloads_nodis & ~rx_offloads) { 400 DPAA2_PMD_WARN( 401 "Rx offloads non configurable - requested 0x%" PRIx64 402 " ignored 0x%" PRIx64, 403 rx_offloads, dev_rx_offloads_nodis); 404 } 405 406 /* Tx offloads validation */ 407 if (dev_tx_offloads_nodis & ~tx_offloads) { 408 DPAA2_PMD_WARN( 409 "Tx offloads non configurable - requested 0x%" PRIx64 410 " ignored 0x%" PRIx64, 411 tx_offloads, dev_tx_offloads_nodis); 412 } 413 414 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 415 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) { 416 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, 417 priv->token, eth_conf->rxmode.max_rx_pkt_len); 418 if (ret) { 419 DPAA2_PMD_ERR( 420 "Unable to set mtu. check config"); 421 return ret; 422 } 423 } else { 424 return -1; 425 } 426 } 427 428 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) { 429 ret = dpaa2_setup_flow_dist(dev, 430 eth_conf->rx_adv_conf.rss_conf.rss_hf); 431 if (ret) { 432 DPAA2_PMD_ERR("Unable to set flow distribution." 433 "Check queue config"); 434 return ret; 435 } 436 } 437 438 if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM) 439 rx_l3_csum_offload = true; 440 441 if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) || 442 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM)) 443 rx_l4_csum_offload = true; 444 445 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 446 DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload); 447 if (ret) { 448 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret); 449 return ret; 450 } 451 452 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 453 DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload); 454 if (ret) { 455 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret); 456 return ret; 457 } 458 459 if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM) 460 tx_l3_csum_offload = true; 461 462 if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) || 463 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) || 464 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM)) 465 tx_l4_csum_offload = true; 466 467 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 468 DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload); 469 if (ret) { 470 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret); 471 return ret; 472 } 473 474 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 475 DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload); 476 if (ret) { 477 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret); 478 return ret; 479 } 480 481 /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in 482 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC] 483 * to 0 for LS2 in the hardware thus disabling data/annotation 484 * stashing. For LX2 this is fixed in hardware and thus hash result and 485 * parse results can be received in FD using this option. 486 */ 487 if (dpaa2_svr_family == SVR_LX2160A) { 488 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 489 DPNI_FLCTYPE_HASH, true); 490 if (ret) { 491 DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret); 492 return ret; 493 } 494 } 495 496 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER) 497 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK); 498 499 /* update the current status */ 500 dpaa2_dev_link_update(dev, 0); 501 502 return 0; 503 } 504 505 /* Function to setup RX flow information. It contains traffic class ID, 506 * flow ID, destination configuration etc. 507 */ 508 static int 509 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, 510 uint16_t rx_queue_id, 511 uint16_t nb_rx_desc __rte_unused, 512 unsigned int socket_id __rte_unused, 513 const struct rte_eth_rxconf *rx_conf __rte_unused, 514 struct rte_mempool *mb_pool) 515 { 516 struct dpaa2_dev_priv *priv = dev->data->dev_private; 517 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 518 struct dpaa2_queue *dpaa2_q; 519 struct dpni_queue cfg; 520 uint8_t options = 0; 521 uint8_t flow_id; 522 uint32_t bpid; 523 int ret; 524 525 PMD_INIT_FUNC_TRACE(); 526 527 DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p", 528 dev, rx_queue_id, mb_pool, rx_conf); 529 530 if (!priv->bp_list || priv->bp_list->mp != mb_pool) { 531 bpid = mempool_to_bpid(mb_pool); 532 ret = dpaa2_attach_bp_list(priv, 533 rte_dpaa2_bpid_info[bpid].bp_list); 534 if (ret) 535 return ret; 536 } 537 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 538 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */ 539 dpaa2_q->bp_array = rte_dpaa2_bpid_info; 540 541 /*Get the flow id from given VQ id*/ 542 flow_id = rx_queue_id % priv->nb_rx_queues; 543 memset(&cfg, 0, sizeof(struct dpni_queue)); 544 545 options = options | DPNI_QUEUE_OPT_USER_CTX; 546 cfg.user_context = (size_t)(dpaa2_q); 547 548 /*if ls2088 or rev2 device, enable the stashing */ 549 550 if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) { 551 options |= DPNI_QUEUE_OPT_FLC; 552 cfg.flc.stash_control = true; 553 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0; 554 /* 00 00 00 - last 6 bit represent annotation, context stashing, 555 * data stashing setting 01 01 00 (0x14) 556 * (in following order ->DS AS CS) 557 * to enable 1 line data, 1 line annotation. 558 * For LX2, this setting should be 01 00 00 (0x10) 559 */ 560 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A) 561 cfg.flc.value |= 0x10; 562 else 563 cfg.flc.value |= 0x14; 564 } 565 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX, 566 dpaa2_q->tc_index, flow_id, options, &cfg); 567 if (ret) { 568 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret); 569 return -1; 570 } 571 572 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) { 573 struct dpni_taildrop taildrop; 574 575 taildrop.enable = 1; 576 /*enabling per rx queue congestion control */ 577 taildrop.threshold = CONG_THRESHOLD_RX_Q; 578 taildrop.units = DPNI_CONGESTION_UNIT_BYTES; 579 taildrop.oal = CONG_RX_OAL; 580 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d", 581 rx_queue_id); 582 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token, 583 DPNI_CP_QUEUE, DPNI_QUEUE_RX, 584 dpaa2_q->tc_index, flow_id, &taildrop); 585 if (ret) { 586 DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)", 587 ret); 588 return -1; 589 } 590 } 591 592 dev->data->rx_queues[rx_queue_id] = dpaa2_q; 593 return 0; 594 } 595 596 static int 597 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, 598 uint16_t tx_queue_id, 599 uint16_t nb_tx_desc __rte_unused, 600 unsigned int socket_id __rte_unused, 601 const struct rte_eth_txconf *tx_conf __rte_unused) 602 { 603 struct dpaa2_dev_priv *priv = dev->data->dev_private; 604 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *) 605 priv->tx_vq[tx_queue_id]; 606 struct fsl_mc_io *dpni = priv->hw; 607 struct dpni_queue tx_conf_cfg; 608 struct dpni_queue tx_flow_cfg; 609 uint8_t options = 0, flow_id; 610 uint32_t tc_id; 611 int ret; 612 613 PMD_INIT_FUNC_TRACE(); 614 615 /* Return if queue already configured */ 616 if (dpaa2_q->flow_id != 0xffff) { 617 dev->data->tx_queues[tx_queue_id] = dpaa2_q; 618 return 0; 619 } 620 621 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue)); 622 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue)); 623 624 tc_id = tx_queue_id; 625 flow_id = 0; 626 627 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX, 628 tc_id, flow_id, options, &tx_flow_cfg); 629 if (ret) { 630 DPAA2_PMD_ERR("Error in setting the tx flow: " 631 "tc_id=%d, flow=%d err=%d", 632 tc_id, flow_id, ret); 633 return -1; 634 } 635 636 dpaa2_q->flow_id = flow_id; 637 638 if (tx_queue_id == 0) { 639 /*Set tx-conf and error configuration*/ 640 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW, 641 priv->token, 642 DPNI_CONF_DISABLE); 643 if (ret) { 644 DPAA2_PMD_ERR("Error in set tx conf mode settings: " 645 "err=%d", ret); 646 return -1; 647 } 648 } 649 dpaa2_q->tc_index = tc_id; 650 651 if (!(priv->flags & DPAA2_TX_CGR_OFF)) { 652 struct dpni_congestion_notification_cfg cong_notif_cfg; 653 654 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES; 655 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD; 656 /* Notify that the queue is not congested when the data in 657 * the queue is below this thershold. 658 */ 659 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD; 660 cong_notif_cfg.message_ctx = 0; 661 cong_notif_cfg.message_iova = 662 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn); 663 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE; 664 cong_notif_cfg.notification_mode = 665 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER | 666 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT | 667 DPNI_CONG_OPT_COHERENT_WRITE; 668 669 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW, 670 priv->token, 671 DPNI_QUEUE_TX, 672 tc_id, 673 &cong_notif_cfg); 674 if (ret) { 675 DPAA2_PMD_ERR( 676 "Error in setting tx congestion notification: " 677 "err=%d", ret); 678 return -ret; 679 } 680 } 681 dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf; 682 dev->data->tx_queues[tx_queue_id] = dpaa2_q; 683 return 0; 684 } 685 686 static void 687 dpaa2_dev_rx_queue_release(void *q __rte_unused) 688 { 689 PMD_INIT_FUNC_TRACE(); 690 } 691 692 static void 693 dpaa2_dev_tx_queue_release(void *q __rte_unused) 694 { 695 PMD_INIT_FUNC_TRACE(); 696 } 697 698 static uint32_t 699 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 700 { 701 int32_t ret; 702 struct dpaa2_dev_priv *priv = dev->data->dev_private; 703 struct dpaa2_queue *dpaa2_q; 704 struct qbman_swp *swp; 705 struct qbman_fq_query_np_rslt state; 706 uint32_t frame_cnt = 0; 707 708 PMD_INIT_FUNC_TRACE(); 709 710 if (unlikely(!DPAA2_PER_LCORE_DPIO)) { 711 ret = dpaa2_affine_qbman_swp(); 712 if (ret) { 713 DPAA2_PMD_ERR("Failure in affining portal"); 714 return -EINVAL; 715 } 716 } 717 swp = DPAA2_PER_LCORE_PORTAL; 718 719 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 720 721 if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) { 722 frame_cnt = qbman_fq_state_frame_count(&state); 723 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u", 724 rx_queue_id, frame_cnt); 725 } 726 return frame_cnt; 727 } 728 729 static const uint32_t * 730 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev) 731 { 732 static const uint32_t ptypes[] = { 733 /*todo -= add more types */ 734 RTE_PTYPE_L2_ETHER, 735 RTE_PTYPE_L3_IPV4, 736 RTE_PTYPE_L3_IPV4_EXT, 737 RTE_PTYPE_L3_IPV6, 738 RTE_PTYPE_L3_IPV6_EXT, 739 RTE_PTYPE_L4_TCP, 740 RTE_PTYPE_L4_UDP, 741 RTE_PTYPE_L4_SCTP, 742 RTE_PTYPE_L4_ICMP, 743 RTE_PTYPE_UNKNOWN 744 }; 745 746 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx || 747 dev->rx_pkt_burst == dpaa2_dev_loopback_rx) 748 return ptypes; 749 return NULL; 750 } 751 752 /** 753 * Dpaa2 link Interrupt handler 754 * 755 * @param param 756 * The address of parameter (struct rte_eth_dev *) regsitered before. 757 * 758 * @return 759 * void 760 */ 761 static void 762 dpaa2_interrupt_handler(void *param) 763 { 764 struct rte_eth_dev *dev = param; 765 struct dpaa2_dev_priv *priv = dev->data->dev_private; 766 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 767 int ret; 768 int irq_index = DPNI_IRQ_INDEX; 769 unsigned int status = 0, clear = 0; 770 771 PMD_INIT_FUNC_TRACE(); 772 773 if (dpni == NULL) { 774 DPAA2_PMD_ERR("dpni is NULL"); 775 return; 776 } 777 778 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token, 779 irq_index, &status); 780 if (unlikely(ret)) { 781 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret); 782 clear = 0xffffffff; 783 goto out; 784 } 785 786 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) { 787 clear = DPNI_IRQ_EVENT_LINK_CHANGED; 788 dpaa2_dev_link_update(dev, 0); 789 /* calling all the apps registered for link status event */ 790 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, 791 NULL); 792 } 793 out: 794 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token, 795 irq_index, clear); 796 if (unlikely(ret)) 797 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret); 798 } 799 800 static int 801 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable) 802 { 803 int err = 0; 804 struct dpaa2_dev_priv *priv = dev->data->dev_private; 805 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 806 int irq_index = DPNI_IRQ_INDEX; 807 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED; 808 809 PMD_INIT_FUNC_TRACE(); 810 811 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token, 812 irq_index, mask); 813 if (err < 0) { 814 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err, 815 strerror(-err)); 816 return err; 817 } 818 819 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token, 820 irq_index, enable); 821 if (err < 0) 822 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err, 823 strerror(-err)); 824 825 return err; 826 } 827 828 static int 829 dpaa2_dev_start(struct rte_eth_dev *dev) 830 { 831 struct rte_device *rdev = dev->device; 832 struct rte_dpaa2_device *dpaa2_dev; 833 struct rte_eth_dev_data *data = dev->data; 834 struct dpaa2_dev_priv *priv = data->dev_private; 835 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 836 struct dpni_queue cfg; 837 struct dpni_error_cfg err_cfg; 838 uint16_t qdid; 839 struct dpni_queue_id qid; 840 struct dpaa2_queue *dpaa2_q; 841 int ret, i; 842 struct rte_intr_handle *intr_handle; 843 844 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device); 845 intr_handle = &dpaa2_dev->intr_handle; 846 847 PMD_INIT_FUNC_TRACE(); 848 849 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 850 if (ret) { 851 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d", 852 priv->hw_id, ret); 853 return ret; 854 } 855 856 /* Power up the phy. Needed to make the link go UP */ 857 dpaa2_dev_set_link_up(dev); 858 859 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token, 860 DPNI_QUEUE_TX, &qdid); 861 if (ret) { 862 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret); 863 return ret; 864 } 865 priv->qdid = qdid; 866 867 for (i = 0; i < data->nb_rx_queues; i++) { 868 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i]; 869 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token, 870 DPNI_QUEUE_RX, dpaa2_q->tc_index, 871 dpaa2_q->flow_id, &cfg, &qid); 872 if (ret) { 873 DPAA2_PMD_ERR("Error in getting flow information: " 874 "err=%d", ret); 875 return ret; 876 } 877 dpaa2_q->fqid = qid.fqid; 878 } 879 880 /*checksum errors, send them to normal path and set it in annotation */ 881 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE; 882 883 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE; 884 err_cfg.set_frame_annotation = true; 885 886 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW, 887 priv->token, &err_cfg); 888 if (ret) { 889 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d", 890 ret); 891 return ret; 892 } 893 894 /* if the interrupts were configured on this devices*/ 895 if (intr_handle && (intr_handle->fd) && 896 (dev->data->dev_conf.intr_conf.lsc != 0)) { 897 /* Registering LSC interrupt handler */ 898 rte_intr_callback_register(intr_handle, 899 dpaa2_interrupt_handler, 900 (void *)dev); 901 902 /* enable vfio intr/eventfd mapping 903 * Interrupt index 0 is required, so we can not use 904 * rte_intr_enable. 905 */ 906 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX); 907 908 /* enable dpni_irqs */ 909 dpaa2_eth_setup_irqs(dev, 1); 910 } 911 912 /* Change the tx burst function if ordered queues are used */ 913 if (priv->en_ordered) 914 dev->tx_pkt_burst = dpaa2_dev_tx_ordered; 915 916 return 0; 917 } 918 919 /** 920 * This routine disables all traffic on the adapter by issuing a 921 * global reset on the MAC. 922 */ 923 static void 924 dpaa2_dev_stop(struct rte_eth_dev *dev) 925 { 926 struct dpaa2_dev_priv *priv = dev->data->dev_private; 927 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 928 int ret; 929 struct rte_eth_link link; 930 struct rte_intr_handle *intr_handle = dev->intr_handle; 931 932 PMD_INIT_FUNC_TRACE(); 933 934 /* reset interrupt callback */ 935 if (intr_handle && (intr_handle->fd) && 936 (dev->data->dev_conf.intr_conf.lsc != 0)) { 937 /*disable dpni irqs */ 938 dpaa2_eth_setup_irqs(dev, 0); 939 940 /* disable vfio intr before callback unregister */ 941 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX); 942 943 /* Unregistering LSC interrupt handler */ 944 rte_intr_callback_unregister(intr_handle, 945 dpaa2_interrupt_handler, 946 (void *)dev); 947 } 948 949 dpaa2_dev_set_link_down(dev); 950 951 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token); 952 if (ret) { 953 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev", 954 ret, priv->hw_id); 955 return; 956 } 957 958 /* clear the recorded link status */ 959 memset(&link, 0, sizeof(link)); 960 rte_eth_linkstatus_set(dev, &link); 961 } 962 963 static void 964 dpaa2_dev_close(struct rte_eth_dev *dev) 965 { 966 struct dpaa2_dev_priv *priv = dev->data->dev_private; 967 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 968 int ret; 969 struct rte_eth_link link; 970 971 PMD_INIT_FUNC_TRACE(); 972 973 /* Clean the device first */ 974 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token); 975 if (ret) { 976 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret); 977 return; 978 } 979 980 memset(&link, 0, sizeof(link)); 981 rte_eth_linkstatus_set(dev, &link); 982 } 983 984 static void 985 dpaa2_dev_promiscuous_enable( 986 struct rte_eth_dev *dev) 987 { 988 int ret; 989 struct dpaa2_dev_priv *priv = dev->data->dev_private; 990 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 991 992 PMD_INIT_FUNC_TRACE(); 993 994 if (dpni == NULL) { 995 DPAA2_PMD_ERR("dpni is NULL"); 996 return; 997 } 998 999 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 1000 if (ret < 0) 1001 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret); 1002 1003 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 1004 if (ret < 0) 1005 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret); 1006 } 1007 1008 static void 1009 dpaa2_dev_promiscuous_disable( 1010 struct rte_eth_dev *dev) 1011 { 1012 int ret; 1013 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1014 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1015 1016 PMD_INIT_FUNC_TRACE(); 1017 1018 if (dpni == NULL) { 1019 DPAA2_PMD_ERR("dpni is NULL"); 1020 return; 1021 } 1022 1023 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 1024 if (ret < 0) 1025 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret); 1026 1027 if (dev->data->all_multicast == 0) { 1028 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, 1029 priv->token, false); 1030 if (ret < 0) 1031 DPAA2_PMD_ERR("Unable to disable M promisc mode %d", 1032 ret); 1033 } 1034 } 1035 1036 static void 1037 dpaa2_dev_allmulticast_enable( 1038 struct rte_eth_dev *dev) 1039 { 1040 int ret; 1041 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1042 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1043 1044 PMD_INIT_FUNC_TRACE(); 1045 1046 if (dpni == NULL) { 1047 DPAA2_PMD_ERR("dpni is NULL"); 1048 return; 1049 } 1050 1051 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 1052 if (ret < 0) 1053 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret); 1054 } 1055 1056 static void 1057 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev) 1058 { 1059 int ret; 1060 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1061 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1062 1063 PMD_INIT_FUNC_TRACE(); 1064 1065 if (dpni == NULL) { 1066 DPAA2_PMD_ERR("dpni is NULL"); 1067 return; 1068 } 1069 1070 /* must remain on for all promiscuous */ 1071 if (dev->data->promiscuous == 1) 1072 return; 1073 1074 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 1075 if (ret < 0) 1076 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret); 1077 } 1078 1079 static int 1080 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 1081 { 1082 int ret; 1083 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1084 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1085 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN 1086 + VLAN_TAG_SIZE; 1087 1088 PMD_INIT_FUNC_TRACE(); 1089 1090 if (dpni == NULL) { 1091 DPAA2_PMD_ERR("dpni is NULL"); 1092 return -EINVAL; 1093 } 1094 1095 /* check that mtu is within the allowed range */ 1096 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN)) 1097 return -EINVAL; 1098 1099 if (frame_size > ETHER_MAX_LEN) 1100 dev->data->dev_conf.rxmode.offloads &= 1101 DEV_RX_OFFLOAD_JUMBO_FRAME; 1102 else 1103 dev->data->dev_conf.rxmode.offloads &= 1104 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1105 1106 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 1107 1108 /* Set the Max Rx frame length as 'mtu' + 1109 * Maximum Ethernet header length 1110 */ 1111 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token, 1112 frame_size); 1113 if (ret) { 1114 DPAA2_PMD_ERR("Setting the max frame length failed"); 1115 return -1; 1116 } 1117 DPAA2_PMD_INFO("MTU configured for the device: %d", mtu); 1118 return 0; 1119 } 1120 1121 static int 1122 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev, 1123 struct ether_addr *addr, 1124 __rte_unused uint32_t index, 1125 __rte_unused uint32_t pool) 1126 { 1127 int ret; 1128 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1129 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1130 1131 PMD_INIT_FUNC_TRACE(); 1132 1133 if (dpni == NULL) { 1134 DPAA2_PMD_ERR("dpni is NULL"); 1135 return -1; 1136 } 1137 1138 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW, 1139 priv->token, addr->addr_bytes); 1140 if (ret) 1141 DPAA2_PMD_ERR( 1142 "error: Adding the MAC ADDR failed: err = %d", ret); 1143 return 0; 1144 } 1145 1146 static void 1147 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev, 1148 uint32_t index) 1149 { 1150 int ret; 1151 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1152 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1153 struct rte_eth_dev_data *data = dev->data; 1154 struct ether_addr *macaddr; 1155 1156 PMD_INIT_FUNC_TRACE(); 1157 1158 macaddr = &data->mac_addrs[index]; 1159 1160 if (dpni == NULL) { 1161 DPAA2_PMD_ERR("dpni is NULL"); 1162 return; 1163 } 1164 1165 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW, 1166 priv->token, macaddr->addr_bytes); 1167 if (ret) 1168 DPAA2_PMD_ERR( 1169 "error: Removing the MAC ADDR failed: err = %d", ret); 1170 } 1171 1172 static int 1173 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev, 1174 struct ether_addr *addr) 1175 { 1176 int ret; 1177 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1178 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1179 1180 PMD_INIT_FUNC_TRACE(); 1181 1182 if (dpni == NULL) { 1183 DPAA2_PMD_ERR("dpni is NULL"); 1184 return -EINVAL; 1185 } 1186 1187 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW, 1188 priv->token, addr->addr_bytes); 1189 1190 if (ret) 1191 DPAA2_PMD_ERR( 1192 "error: Setting the MAC ADDR failed %d", ret); 1193 1194 return ret; 1195 } 1196 1197 static 1198 int dpaa2_dev_stats_get(struct rte_eth_dev *dev, 1199 struct rte_eth_stats *stats) 1200 { 1201 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1202 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1203 int32_t retcode; 1204 uint8_t page0 = 0, page1 = 1, page2 = 2; 1205 union dpni_statistics value; 1206 int i; 1207 struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq; 1208 1209 memset(&value, 0, sizeof(union dpni_statistics)); 1210 1211 PMD_INIT_FUNC_TRACE(); 1212 1213 if (!dpni) { 1214 DPAA2_PMD_ERR("dpni is NULL"); 1215 return -EINVAL; 1216 } 1217 1218 if (!stats) { 1219 DPAA2_PMD_ERR("stats is NULL"); 1220 return -EINVAL; 1221 } 1222 1223 /*Get Counters from page_0*/ 1224 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1225 page0, 0, &value); 1226 if (retcode) 1227 goto err; 1228 1229 stats->ipackets = value.page_0.ingress_all_frames; 1230 stats->ibytes = value.page_0.ingress_all_bytes; 1231 1232 /*Get Counters from page_1*/ 1233 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1234 page1, 0, &value); 1235 if (retcode) 1236 goto err; 1237 1238 stats->opackets = value.page_1.egress_all_frames; 1239 stats->obytes = value.page_1.egress_all_bytes; 1240 1241 /*Get Counters from page_2*/ 1242 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1243 page2, 0, &value); 1244 if (retcode) 1245 goto err; 1246 1247 /* Ingress drop frame count due to configured rules */ 1248 stats->ierrors = value.page_2.ingress_filtered_frames; 1249 /* Ingress drop frame count due to error */ 1250 stats->ierrors += value.page_2.ingress_discarded_frames; 1251 1252 stats->oerrors = value.page_2.egress_discarded_frames; 1253 stats->imissed = value.page_2.ingress_nobuffer_discards; 1254 1255 /* Fill in per queue stats */ 1256 for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) && 1257 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) { 1258 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i]; 1259 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i]; 1260 if (dpaa2_rxq) 1261 stats->q_ipackets[i] = dpaa2_rxq->rx_pkts; 1262 if (dpaa2_txq) 1263 stats->q_opackets[i] = dpaa2_txq->tx_pkts; 1264 1265 /* Byte counting is not implemented */ 1266 stats->q_ibytes[i] = 0; 1267 stats->q_obytes[i] = 0; 1268 } 1269 1270 return 0; 1271 1272 err: 1273 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode); 1274 return retcode; 1275 }; 1276 1277 static int 1278 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 1279 unsigned int n) 1280 { 1281 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1282 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1283 int32_t retcode; 1284 union dpni_statistics value[3] = {}; 1285 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings); 1286 1287 if (n < num) 1288 return num; 1289 1290 if (xstats == NULL) 1291 return 0; 1292 1293 /* Get Counters from page_0*/ 1294 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1295 0, 0, &value[0]); 1296 if (retcode) 1297 goto err; 1298 1299 /* Get Counters from page_1*/ 1300 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1301 1, 0, &value[1]); 1302 if (retcode) 1303 goto err; 1304 1305 /* Get Counters from page_2*/ 1306 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1307 2, 0, &value[2]); 1308 if (retcode) 1309 goto err; 1310 1311 for (i = 0; i < num; i++) { 1312 xstats[i].id = i; 1313 xstats[i].value = value[dpaa2_xstats_strings[i].page_id]. 1314 raw.counter[dpaa2_xstats_strings[i].stats_id]; 1315 } 1316 return i; 1317 err: 1318 DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode); 1319 return retcode; 1320 } 1321 1322 static int 1323 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 1324 struct rte_eth_xstat_name *xstats_names, 1325 unsigned int limit) 1326 { 1327 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1328 1329 if (limit < stat_cnt) 1330 return stat_cnt; 1331 1332 if (xstats_names != NULL) 1333 for (i = 0; i < stat_cnt; i++) 1334 snprintf(xstats_names[i].name, 1335 sizeof(xstats_names[i].name), 1336 "%s", 1337 dpaa2_xstats_strings[i].name); 1338 1339 return stat_cnt; 1340 } 1341 1342 static int 1343 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 1344 uint64_t *values, unsigned int n) 1345 { 1346 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1347 uint64_t values_copy[stat_cnt]; 1348 1349 if (!ids) { 1350 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1351 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1352 int32_t retcode; 1353 union dpni_statistics value[3] = {}; 1354 1355 if (n < stat_cnt) 1356 return stat_cnt; 1357 1358 if (!values) 1359 return 0; 1360 1361 /* Get Counters from page_0*/ 1362 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1363 0, 0, &value[0]); 1364 if (retcode) 1365 return 0; 1366 1367 /* Get Counters from page_1*/ 1368 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1369 1, 0, &value[1]); 1370 if (retcode) 1371 return 0; 1372 1373 /* Get Counters from page_2*/ 1374 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1375 2, 0, &value[2]); 1376 if (retcode) 1377 return 0; 1378 1379 for (i = 0; i < stat_cnt; i++) { 1380 values[i] = value[dpaa2_xstats_strings[i].page_id]. 1381 raw.counter[dpaa2_xstats_strings[i].stats_id]; 1382 } 1383 return stat_cnt; 1384 } 1385 1386 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt); 1387 1388 for (i = 0; i < n; i++) { 1389 if (ids[i] >= stat_cnt) { 1390 DPAA2_PMD_ERR("xstats id value isn't valid"); 1391 return -1; 1392 } 1393 values[i] = values_copy[ids[i]]; 1394 } 1395 return n; 1396 } 1397 1398 static int 1399 dpaa2_xstats_get_names_by_id( 1400 struct rte_eth_dev *dev, 1401 struct rte_eth_xstat_name *xstats_names, 1402 const uint64_t *ids, 1403 unsigned int limit) 1404 { 1405 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1406 struct rte_eth_xstat_name xstats_names_copy[stat_cnt]; 1407 1408 if (!ids) 1409 return dpaa2_xstats_get_names(dev, xstats_names, limit); 1410 1411 dpaa2_xstats_get_names(dev, xstats_names_copy, limit); 1412 1413 for (i = 0; i < limit; i++) { 1414 if (ids[i] >= stat_cnt) { 1415 DPAA2_PMD_ERR("xstats id value isn't valid"); 1416 return -1; 1417 } 1418 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 1419 } 1420 return limit; 1421 } 1422 1423 static void 1424 dpaa2_dev_stats_reset(struct rte_eth_dev *dev) 1425 { 1426 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1427 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1428 int32_t retcode; 1429 int i; 1430 struct dpaa2_queue *dpaa2_q; 1431 1432 PMD_INIT_FUNC_TRACE(); 1433 1434 if (dpni == NULL) { 1435 DPAA2_PMD_ERR("dpni is NULL"); 1436 return; 1437 } 1438 1439 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token); 1440 if (retcode) 1441 goto error; 1442 1443 /* Reset the per queue stats in dpaa2_queue structure */ 1444 for (i = 0; i < priv->nb_rx_queues; i++) { 1445 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 1446 if (dpaa2_q) 1447 dpaa2_q->rx_pkts = 0; 1448 } 1449 1450 for (i = 0; i < priv->nb_tx_queues; i++) { 1451 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 1452 if (dpaa2_q) 1453 dpaa2_q->tx_pkts = 0; 1454 } 1455 1456 return; 1457 1458 error: 1459 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode); 1460 return; 1461 }; 1462 1463 /* return 0 means link status changed, -1 means not changed */ 1464 static int 1465 dpaa2_dev_link_update(struct rte_eth_dev *dev, 1466 int wait_to_complete __rte_unused) 1467 { 1468 int ret; 1469 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1470 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1471 struct rte_eth_link link; 1472 struct dpni_link_state state = {0}; 1473 1474 if (dpni == NULL) { 1475 DPAA2_PMD_ERR("dpni is NULL"); 1476 return 0; 1477 } 1478 1479 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1480 if (ret < 0) { 1481 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret); 1482 return -1; 1483 } 1484 1485 memset(&link, 0, sizeof(struct rte_eth_link)); 1486 link.link_status = state.up; 1487 link.link_speed = state.rate; 1488 1489 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX) 1490 link.link_duplex = ETH_LINK_HALF_DUPLEX; 1491 else 1492 link.link_duplex = ETH_LINK_FULL_DUPLEX; 1493 1494 ret = rte_eth_linkstatus_set(dev, &link); 1495 if (ret == -1) 1496 DPAA2_PMD_DEBUG("No change in status"); 1497 else 1498 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id, 1499 link.link_status ? "Up" : "Down"); 1500 1501 return ret; 1502 } 1503 1504 /** 1505 * Toggle the DPNI to enable, if not already enabled. 1506 * This is not strictly PHY up/down - it is more of logical toggling. 1507 */ 1508 static int 1509 dpaa2_dev_set_link_up(struct rte_eth_dev *dev) 1510 { 1511 int ret = -EINVAL; 1512 struct dpaa2_dev_priv *priv; 1513 struct fsl_mc_io *dpni; 1514 int en = 0; 1515 struct dpni_link_state state = {0}; 1516 1517 priv = dev->data->dev_private; 1518 dpni = (struct fsl_mc_io *)priv->hw; 1519 1520 if (dpni == NULL) { 1521 DPAA2_PMD_ERR("dpni is NULL"); 1522 return ret; 1523 } 1524 1525 /* Check if DPNI is currently enabled */ 1526 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en); 1527 if (ret) { 1528 /* Unable to obtain dpni status; Not continuing */ 1529 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret); 1530 return -EINVAL; 1531 } 1532 1533 /* Enable link if not already enabled */ 1534 if (!en) { 1535 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 1536 if (ret) { 1537 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret); 1538 return -EINVAL; 1539 } 1540 } 1541 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1542 if (ret < 0) { 1543 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret); 1544 return -1; 1545 } 1546 1547 /* changing tx burst function to start enqueues */ 1548 dev->tx_pkt_burst = dpaa2_dev_tx; 1549 dev->data->dev_link.link_status = state.up; 1550 1551 if (state.up) 1552 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id); 1553 else 1554 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id); 1555 return ret; 1556 } 1557 1558 /** 1559 * Toggle the DPNI to disable, if not already disabled. 1560 * This is not strictly PHY up/down - it is more of logical toggling. 1561 */ 1562 static int 1563 dpaa2_dev_set_link_down(struct rte_eth_dev *dev) 1564 { 1565 int ret = -EINVAL; 1566 struct dpaa2_dev_priv *priv; 1567 struct fsl_mc_io *dpni; 1568 int dpni_enabled = 0; 1569 int retries = 10; 1570 1571 PMD_INIT_FUNC_TRACE(); 1572 1573 priv = dev->data->dev_private; 1574 dpni = (struct fsl_mc_io *)priv->hw; 1575 1576 if (dpni == NULL) { 1577 DPAA2_PMD_ERR("Device has not yet been configured"); 1578 return ret; 1579 } 1580 1581 /*changing tx burst function to avoid any more enqueues */ 1582 dev->tx_pkt_burst = dummy_dev_tx; 1583 1584 /* Loop while dpni_disable() attempts to drain the egress FQs 1585 * and confirm them back to us. 1586 */ 1587 do { 1588 ret = dpni_disable(dpni, 0, priv->token); 1589 if (ret) { 1590 DPAA2_PMD_ERR("dpni disable failed (%d)", ret); 1591 return ret; 1592 } 1593 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled); 1594 if (ret) { 1595 DPAA2_PMD_ERR("dpni enable check failed (%d)", ret); 1596 return ret; 1597 } 1598 if (dpni_enabled) 1599 /* Allow the MC some slack */ 1600 rte_delay_us(100 * 1000); 1601 } while (dpni_enabled && --retries); 1602 1603 if (!retries) { 1604 DPAA2_PMD_WARN("Retry count exceeded disabling dpni"); 1605 /* todo- we may have to manually cleanup queues. 1606 */ 1607 } else { 1608 DPAA2_PMD_INFO("Port %d Link DOWN successful", 1609 dev->data->port_id); 1610 } 1611 1612 dev->data->dev_link.link_status = 0; 1613 1614 return ret; 1615 } 1616 1617 static int 1618 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1619 { 1620 int ret = -EINVAL; 1621 struct dpaa2_dev_priv *priv; 1622 struct fsl_mc_io *dpni; 1623 struct dpni_link_state state = {0}; 1624 1625 PMD_INIT_FUNC_TRACE(); 1626 1627 priv = dev->data->dev_private; 1628 dpni = (struct fsl_mc_io *)priv->hw; 1629 1630 if (dpni == NULL || fc_conf == NULL) { 1631 DPAA2_PMD_ERR("device not configured"); 1632 return ret; 1633 } 1634 1635 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1636 if (ret) { 1637 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret); 1638 return ret; 1639 } 1640 1641 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf)); 1642 if (state.options & DPNI_LINK_OPT_PAUSE) { 1643 /* DPNI_LINK_OPT_PAUSE set 1644 * if ASYM_PAUSE not set, 1645 * RX Side flow control (handle received Pause frame) 1646 * TX side flow control (send Pause frame) 1647 * if ASYM_PAUSE set, 1648 * RX Side flow control (handle received Pause frame) 1649 * No TX side flow control (send Pause frame disabled) 1650 */ 1651 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE)) 1652 fc_conf->mode = RTE_FC_FULL; 1653 else 1654 fc_conf->mode = RTE_FC_RX_PAUSE; 1655 } else { 1656 /* DPNI_LINK_OPT_PAUSE not set 1657 * if ASYM_PAUSE set, 1658 * TX side flow control (send Pause frame) 1659 * No RX side flow control (No action on pause frame rx) 1660 * if ASYM_PAUSE not set, 1661 * Flow control disabled 1662 */ 1663 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE) 1664 fc_conf->mode = RTE_FC_TX_PAUSE; 1665 else 1666 fc_conf->mode = RTE_FC_NONE; 1667 } 1668 1669 return ret; 1670 } 1671 1672 static int 1673 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1674 { 1675 int ret = -EINVAL; 1676 struct dpaa2_dev_priv *priv; 1677 struct fsl_mc_io *dpni; 1678 struct dpni_link_state state = {0}; 1679 struct dpni_link_cfg cfg = {0}; 1680 1681 PMD_INIT_FUNC_TRACE(); 1682 1683 priv = dev->data->dev_private; 1684 dpni = (struct fsl_mc_io *)priv->hw; 1685 1686 if (dpni == NULL) { 1687 DPAA2_PMD_ERR("dpni is NULL"); 1688 return ret; 1689 } 1690 1691 /* It is necessary to obtain the current state before setting fc_conf 1692 * as MC would return error in case rate, autoneg or duplex values are 1693 * different. 1694 */ 1695 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1696 if (ret) { 1697 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret); 1698 return -1; 1699 } 1700 1701 /* Disable link before setting configuration */ 1702 dpaa2_dev_set_link_down(dev); 1703 1704 /* Based on fc_conf, update cfg */ 1705 cfg.rate = state.rate; 1706 cfg.options = state.options; 1707 1708 /* update cfg with fc_conf */ 1709 switch (fc_conf->mode) { 1710 case RTE_FC_FULL: 1711 /* Full flow control; 1712 * OPT_PAUSE set, ASYM_PAUSE not set 1713 */ 1714 cfg.options |= DPNI_LINK_OPT_PAUSE; 1715 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE; 1716 break; 1717 case RTE_FC_TX_PAUSE: 1718 /* Enable RX flow control 1719 * OPT_PAUSE not set; 1720 * ASYM_PAUSE set; 1721 */ 1722 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE; 1723 cfg.options &= ~DPNI_LINK_OPT_PAUSE; 1724 break; 1725 case RTE_FC_RX_PAUSE: 1726 /* Enable TX Flow control 1727 * OPT_PAUSE set 1728 * ASYM_PAUSE set 1729 */ 1730 cfg.options |= DPNI_LINK_OPT_PAUSE; 1731 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE; 1732 break; 1733 case RTE_FC_NONE: 1734 /* Disable Flow control 1735 * OPT_PAUSE not set 1736 * ASYM_PAUSE not set 1737 */ 1738 cfg.options &= ~DPNI_LINK_OPT_PAUSE; 1739 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE; 1740 break; 1741 default: 1742 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)", 1743 fc_conf->mode); 1744 return -1; 1745 } 1746 1747 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg); 1748 if (ret) 1749 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)", 1750 ret); 1751 1752 /* Enable link */ 1753 dpaa2_dev_set_link_up(dev); 1754 1755 return ret; 1756 } 1757 1758 static int 1759 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev, 1760 struct rte_eth_rss_conf *rss_conf) 1761 { 1762 struct rte_eth_dev_data *data = dev->data; 1763 struct rte_eth_conf *eth_conf = &data->dev_conf; 1764 int ret; 1765 1766 PMD_INIT_FUNC_TRACE(); 1767 1768 if (rss_conf->rss_hf) { 1769 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf); 1770 if (ret) { 1771 DPAA2_PMD_ERR("Unable to set flow dist"); 1772 return ret; 1773 } 1774 } else { 1775 ret = dpaa2_remove_flow_dist(dev, 0); 1776 if (ret) { 1777 DPAA2_PMD_ERR("Unable to remove flow dist"); 1778 return ret; 1779 } 1780 } 1781 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf; 1782 return 0; 1783 } 1784 1785 static int 1786 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1787 struct rte_eth_rss_conf *rss_conf) 1788 { 1789 struct rte_eth_dev_data *data = dev->data; 1790 struct rte_eth_conf *eth_conf = &data->dev_conf; 1791 1792 /* dpaa2 does not support rss_key, so length should be 0*/ 1793 rss_conf->rss_key_len = 0; 1794 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf; 1795 return 0; 1796 } 1797 1798 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev, 1799 int eth_rx_queue_id, 1800 uint16_t dpcon_id, 1801 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf) 1802 { 1803 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; 1804 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw; 1805 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; 1806 uint8_t flow_id = dpaa2_ethq->flow_id; 1807 struct dpni_queue cfg; 1808 uint8_t options; 1809 int ret; 1810 1811 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL) 1812 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event; 1813 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) 1814 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event; 1815 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED) 1816 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event; 1817 else 1818 return -EINVAL; 1819 1820 memset(&cfg, 0, sizeof(struct dpni_queue)); 1821 options = DPNI_QUEUE_OPT_DEST; 1822 cfg.destination.type = DPNI_DEST_DPCON; 1823 cfg.destination.id = dpcon_id; 1824 cfg.destination.priority = queue_conf->ev.priority; 1825 1826 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) { 1827 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE; 1828 cfg.destination.hold_active = 1; 1829 } 1830 1831 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED && 1832 !eth_priv->en_ordered) { 1833 struct opr_cfg ocfg; 1834 1835 /* Restoration window size = 256 frames */ 1836 ocfg.oprrws = 3; 1837 /* Restoration window size = 512 frames for LX2 */ 1838 if (dpaa2_svr_family == SVR_LX2160A) 1839 ocfg.oprrws = 4; 1840 /* Auto advance NESN window enabled */ 1841 ocfg.oa = 1; 1842 /* Late arrival window size disabled */ 1843 ocfg.olws = 0; 1844 /* ORL resource exhaustaion advance NESN disabled */ 1845 ocfg.oeane = 0; 1846 /* Loose ordering enabled */ 1847 ocfg.oloe = 1; 1848 eth_priv->en_loose_ordered = 1; 1849 /* Strict ordering enabled if explicitly set */ 1850 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) { 1851 ocfg.oloe = 0; 1852 eth_priv->en_loose_ordered = 0; 1853 } 1854 1855 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token, 1856 dpaa2_ethq->tc_index, flow_id, 1857 OPR_OPT_CREATE, &ocfg); 1858 if (ret) { 1859 DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret); 1860 return ret; 1861 } 1862 1863 eth_priv->en_ordered = 1; 1864 } 1865 1866 options |= DPNI_QUEUE_OPT_USER_CTX; 1867 cfg.user_context = (size_t)(dpaa2_ethq); 1868 1869 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX, 1870 dpaa2_ethq->tc_index, flow_id, options, &cfg); 1871 if (ret) { 1872 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret); 1873 return ret; 1874 } 1875 1876 memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event)); 1877 1878 return 0; 1879 } 1880 1881 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev, 1882 int eth_rx_queue_id) 1883 { 1884 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; 1885 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw; 1886 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; 1887 uint8_t flow_id = dpaa2_ethq->flow_id; 1888 struct dpni_queue cfg; 1889 uint8_t options; 1890 int ret; 1891 1892 memset(&cfg, 0, sizeof(struct dpni_queue)); 1893 options = DPNI_QUEUE_OPT_DEST; 1894 cfg.destination.type = DPNI_DEST_NONE; 1895 1896 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX, 1897 dpaa2_ethq->tc_index, flow_id, options, &cfg); 1898 if (ret) 1899 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret); 1900 1901 return ret; 1902 } 1903 1904 static inline int 1905 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op) 1906 { 1907 unsigned int i; 1908 1909 for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) { 1910 if (dpaa2_supported_filter_ops[i] == filter_op) 1911 return 0; 1912 } 1913 return -ENOTSUP; 1914 } 1915 1916 static int 1917 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev, 1918 enum rte_filter_type filter_type, 1919 enum rte_filter_op filter_op, 1920 void *arg) 1921 { 1922 int ret = 0; 1923 1924 if (!dev) 1925 return -ENODEV; 1926 1927 switch (filter_type) { 1928 case RTE_ETH_FILTER_GENERIC: 1929 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) { 1930 ret = -ENOTSUP; 1931 break; 1932 } 1933 *(const void **)arg = &dpaa2_flow_ops; 1934 dpaa2_filter_type |= filter_type; 1935 break; 1936 default: 1937 RTE_LOG(ERR, PMD, "Filter type (%d) not supported", 1938 filter_type); 1939 ret = -ENOTSUP; 1940 break; 1941 } 1942 return ret; 1943 } 1944 1945 static struct eth_dev_ops dpaa2_ethdev_ops = { 1946 .dev_configure = dpaa2_eth_dev_configure, 1947 .dev_start = dpaa2_dev_start, 1948 .dev_stop = dpaa2_dev_stop, 1949 .dev_close = dpaa2_dev_close, 1950 .promiscuous_enable = dpaa2_dev_promiscuous_enable, 1951 .promiscuous_disable = dpaa2_dev_promiscuous_disable, 1952 .allmulticast_enable = dpaa2_dev_allmulticast_enable, 1953 .allmulticast_disable = dpaa2_dev_allmulticast_disable, 1954 .dev_set_link_up = dpaa2_dev_set_link_up, 1955 .dev_set_link_down = dpaa2_dev_set_link_down, 1956 .link_update = dpaa2_dev_link_update, 1957 .stats_get = dpaa2_dev_stats_get, 1958 .xstats_get = dpaa2_dev_xstats_get, 1959 .xstats_get_by_id = dpaa2_xstats_get_by_id, 1960 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id, 1961 .xstats_get_names = dpaa2_xstats_get_names, 1962 .stats_reset = dpaa2_dev_stats_reset, 1963 .xstats_reset = dpaa2_dev_stats_reset, 1964 .fw_version_get = dpaa2_fw_version_get, 1965 .dev_infos_get = dpaa2_dev_info_get, 1966 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get, 1967 .mtu_set = dpaa2_dev_mtu_set, 1968 .vlan_filter_set = dpaa2_vlan_filter_set, 1969 .vlan_offload_set = dpaa2_vlan_offload_set, 1970 .vlan_tpid_set = dpaa2_vlan_tpid_set, 1971 .rx_queue_setup = dpaa2_dev_rx_queue_setup, 1972 .rx_queue_release = dpaa2_dev_rx_queue_release, 1973 .tx_queue_setup = dpaa2_dev_tx_queue_setup, 1974 .tx_queue_release = dpaa2_dev_tx_queue_release, 1975 .rx_queue_count = dpaa2_dev_rx_queue_count, 1976 .flow_ctrl_get = dpaa2_flow_ctrl_get, 1977 .flow_ctrl_set = dpaa2_flow_ctrl_set, 1978 .mac_addr_add = dpaa2_dev_add_mac_addr, 1979 .mac_addr_remove = dpaa2_dev_remove_mac_addr, 1980 .mac_addr_set = dpaa2_dev_set_mac_addr, 1981 .rss_hash_update = dpaa2_dev_rss_hash_update, 1982 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get, 1983 .filter_ctrl = dpaa2_dev_flow_ctrl, 1984 }; 1985 1986 /* Populate the mac address from physically available (u-boot/firmware) and/or 1987 * one set by higher layers like MC (restool) etc. 1988 * Returns the table of MAC entries (multiple entries) 1989 */ 1990 static int 1991 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv, 1992 struct ether_addr *mac_entry) 1993 { 1994 int ret; 1995 struct ether_addr phy_mac, prime_mac; 1996 1997 memset(&phy_mac, 0, sizeof(struct ether_addr)); 1998 memset(&prime_mac, 0, sizeof(struct ether_addr)); 1999 2000 /* Get the physical device MAC address */ 2001 ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token, 2002 phy_mac.addr_bytes); 2003 if (ret) { 2004 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret); 2005 goto cleanup; 2006 } 2007 2008 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token, 2009 prime_mac.addr_bytes); 2010 if (ret) { 2011 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret); 2012 goto cleanup; 2013 } 2014 2015 /* Now that both MAC have been obtained, do: 2016 * if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy 2017 * and return phy 2018 * If empty_mac(phy), return prime. 2019 * if both are empty, create random MAC, set as prime and return 2020 */ 2021 if (!is_zero_ether_addr(&phy_mac)) { 2022 /* If the addresses are not same, overwrite prime */ 2023 if (!is_same_ether_addr(&phy_mac, &prime_mac)) { 2024 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW, 2025 priv->token, 2026 phy_mac.addr_bytes); 2027 if (ret) { 2028 DPAA2_PMD_ERR("Unable to set MAC Address: %d", 2029 ret); 2030 goto cleanup; 2031 } 2032 memcpy(&prime_mac, &phy_mac, sizeof(struct ether_addr)); 2033 } 2034 } else if (is_zero_ether_addr(&prime_mac)) { 2035 /* In case phys and prime, both are zero, create random MAC */ 2036 eth_random_addr(prime_mac.addr_bytes); 2037 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW, 2038 priv->token, 2039 prime_mac.addr_bytes); 2040 if (ret) { 2041 DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret); 2042 goto cleanup; 2043 } 2044 } 2045 2046 /* prime_mac the final MAC address */ 2047 memcpy(mac_entry, &prime_mac, sizeof(struct ether_addr)); 2048 return 0; 2049 2050 cleanup: 2051 return -1; 2052 } 2053 2054 static int 2055 check_devargs_handler(__rte_unused const char *key, const char *value, 2056 __rte_unused void *opaque) 2057 { 2058 if (strcmp(value, "1")) 2059 return -1; 2060 2061 return 0; 2062 } 2063 2064 static int 2065 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key) 2066 { 2067 struct rte_kvargs *kvlist; 2068 2069 if (!devargs) 2070 return 0; 2071 2072 kvlist = rte_kvargs_parse(devargs->args, NULL); 2073 if (!kvlist) 2074 return 0; 2075 2076 if (!rte_kvargs_count(kvlist, key)) { 2077 rte_kvargs_free(kvlist); 2078 return 0; 2079 } 2080 2081 if (rte_kvargs_process(kvlist, key, 2082 check_devargs_handler, NULL) < 0) { 2083 rte_kvargs_free(kvlist); 2084 return 0; 2085 } 2086 rte_kvargs_free(kvlist); 2087 2088 return 1; 2089 } 2090 2091 static int 2092 dpaa2_dev_init(struct rte_eth_dev *eth_dev) 2093 { 2094 struct rte_device *dev = eth_dev->device; 2095 struct rte_dpaa2_device *dpaa2_dev; 2096 struct fsl_mc_io *dpni_dev; 2097 struct dpni_attr attr; 2098 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 2099 struct dpni_buffer_layout layout; 2100 int ret, hw_id, i; 2101 2102 PMD_INIT_FUNC_TRACE(); 2103 2104 /* For secondary processes, the primary has done all the work */ 2105 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 2106 /* In case of secondary, only burst and ops API need to be 2107 * plugged. 2108 */ 2109 eth_dev->dev_ops = &dpaa2_ethdev_ops; 2110 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) 2111 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx; 2112 else 2113 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx; 2114 eth_dev->tx_pkt_burst = dpaa2_dev_tx; 2115 return 0; 2116 } 2117 2118 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device); 2119 2120 hw_id = dpaa2_dev->object_id; 2121 2122 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0); 2123 if (!dpni_dev) { 2124 DPAA2_PMD_ERR("Memory allocation failed for dpni device"); 2125 return -1; 2126 } 2127 2128 dpni_dev->regs = rte_mcp_ptr_list[0]; 2129 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token); 2130 if (ret) { 2131 DPAA2_PMD_ERR( 2132 "Failure in opening dpni@%d with err code %d", 2133 hw_id, ret); 2134 rte_free(dpni_dev); 2135 return -1; 2136 } 2137 2138 /* Clean the device first */ 2139 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token); 2140 if (ret) { 2141 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d", 2142 hw_id, ret); 2143 goto init_err; 2144 } 2145 2146 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr); 2147 if (ret) { 2148 DPAA2_PMD_ERR( 2149 "Failure in get dpni@%d attribute, err code %d", 2150 hw_id, ret); 2151 goto init_err; 2152 } 2153 2154 priv->num_rx_tc = attr.num_rx_tcs; 2155 2156 for (i = 0; i < attr.num_rx_tcs; i++) 2157 priv->nb_rx_queues += attr.num_queues; 2158 2159 /* Using number of TX queues as number of TX TCs */ 2160 priv->nb_tx_queues = attr.num_tx_tcs; 2161 2162 DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d", 2163 priv->num_rx_tc, priv->nb_rx_queues, 2164 priv->nb_tx_queues); 2165 2166 priv->hw = dpni_dev; 2167 priv->hw_id = hw_id; 2168 priv->options = attr.options; 2169 priv->max_mac_filters = attr.mac_filter_entries; 2170 priv->max_vlan_filters = attr.vlan_filter_entries; 2171 priv->flags = 0; 2172 2173 /* Allocate memory for hardware structure for queues */ 2174 ret = dpaa2_alloc_rx_tx_queues(eth_dev); 2175 if (ret) { 2176 DPAA2_PMD_ERR("Queue allocation Failed"); 2177 goto init_err; 2178 } 2179 2180 /* Allocate memory for storing MAC addresses. 2181 * Table of mac_filter_entries size is allocated so that RTE ether lib 2182 * can add MAC entries when rte_eth_dev_mac_addr_add is called. 2183 */ 2184 eth_dev->data->mac_addrs = rte_zmalloc("dpni", 2185 ETHER_ADDR_LEN * attr.mac_filter_entries, 0); 2186 if (eth_dev->data->mac_addrs == NULL) { 2187 DPAA2_PMD_ERR( 2188 "Failed to allocate %d bytes needed to store MAC addresses", 2189 ETHER_ADDR_LEN * attr.mac_filter_entries); 2190 ret = -ENOMEM; 2191 goto init_err; 2192 } 2193 2194 ret = populate_mac_addr(dpni_dev, priv, ð_dev->data->mac_addrs[0]); 2195 if (ret) { 2196 DPAA2_PMD_ERR("Unable to fetch MAC Address for device"); 2197 rte_free(eth_dev->data->mac_addrs); 2198 eth_dev->data->mac_addrs = NULL; 2199 goto init_err; 2200 } 2201 2202 /* ... tx buffer layout ... */ 2203 memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 2204 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 2205 layout.pass_frame_status = 1; 2206 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 2207 DPNI_QUEUE_TX, &layout); 2208 if (ret) { 2209 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret); 2210 goto init_err; 2211 } 2212 2213 /* ... tx-conf and error buffer layout ... */ 2214 memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 2215 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 2216 layout.pass_frame_status = 1; 2217 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 2218 DPNI_QUEUE_TX_CONFIRM, &layout); 2219 if (ret) { 2220 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout", 2221 ret); 2222 goto init_err; 2223 } 2224 2225 eth_dev->dev_ops = &dpaa2_ethdev_ops; 2226 2227 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) { 2228 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx; 2229 DPAA2_PMD_INFO("Loopback mode"); 2230 } else { 2231 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx; 2232 } 2233 eth_dev->tx_pkt_burst = dpaa2_dev_tx; 2234 2235 /*Init fields w.r.t. classficaition*/ 2236 memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg)); 2237 priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64); 2238 if (!priv->extract.qos_extract_param) { 2239 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow " 2240 " classificaiton ", ret); 2241 goto init_err; 2242 } 2243 for (i = 0; i < MAX_TCS; i++) { 2244 memset(&priv->extract.fs_key_cfg[i], 0, 2245 sizeof(struct dpkg_profile_cfg)); 2246 priv->extract.fs_extract_param[i] = 2247 (size_t)rte_malloc(NULL, 256, 64); 2248 if (!priv->extract.fs_extract_param[i]) { 2249 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton", 2250 ret); 2251 goto init_err; 2252 } 2253 } 2254 2255 RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name); 2256 return 0; 2257 init_err: 2258 dpaa2_dev_uninit(eth_dev); 2259 return ret; 2260 } 2261 2262 static int 2263 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev) 2264 { 2265 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 2266 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 2267 int i, ret; 2268 2269 PMD_INIT_FUNC_TRACE(); 2270 2271 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2272 return 0; 2273 2274 if (!dpni) { 2275 DPAA2_PMD_WARN("Already closed or not started"); 2276 return -1; 2277 } 2278 2279 dpaa2_dev_close(eth_dev); 2280 2281 dpaa2_free_rx_tx_queues(eth_dev); 2282 2283 /* Close the device at underlying layer*/ 2284 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token); 2285 if (ret) { 2286 DPAA2_PMD_ERR( 2287 "Failure closing dpni device with err code %d", 2288 ret); 2289 } 2290 2291 /* Free the allocated memory for ethernet private data and dpni*/ 2292 priv->hw = NULL; 2293 rte_free(dpni); 2294 2295 for (i = 0; i < MAX_TCS; i++) { 2296 if (priv->extract.fs_extract_param[i]) 2297 rte_free((void *)(size_t)priv->extract.fs_extract_param[i]); 2298 } 2299 2300 if (priv->extract.qos_extract_param) 2301 rte_free((void *)(size_t)priv->extract.qos_extract_param); 2302 2303 eth_dev->dev_ops = NULL; 2304 eth_dev->rx_pkt_burst = NULL; 2305 eth_dev->tx_pkt_burst = NULL; 2306 2307 DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name); 2308 return 0; 2309 } 2310 2311 static int 2312 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv, 2313 struct rte_dpaa2_device *dpaa2_dev) 2314 { 2315 struct rte_eth_dev *eth_dev; 2316 int diag; 2317 2318 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2319 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name); 2320 if (!eth_dev) 2321 return -ENODEV; 2322 eth_dev->data->dev_private = rte_zmalloc( 2323 "ethdev private structure", 2324 sizeof(struct dpaa2_dev_priv), 2325 RTE_CACHE_LINE_SIZE); 2326 if (eth_dev->data->dev_private == NULL) { 2327 DPAA2_PMD_CRIT( 2328 "Unable to allocate memory for private data"); 2329 rte_eth_dev_release_port(eth_dev); 2330 return -ENOMEM; 2331 } 2332 } else { 2333 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name); 2334 if (!eth_dev) 2335 return -ENODEV; 2336 } 2337 2338 eth_dev->device = &dpaa2_dev->device; 2339 2340 dpaa2_dev->eth_dev = eth_dev; 2341 eth_dev->data->rx_mbuf_alloc_failed = 0; 2342 2343 if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC) 2344 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2345 2346 /* Invoke PMD device initialization function */ 2347 diag = dpaa2_dev_init(eth_dev); 2348 if (diag == 0) { 2349 rte_eth_dev_probing_finish(eth_dev); 2350 return 0; 2351 } 2352 2353 rte_eth_dev_release_port(eth_dev); 2354 return diag; 2355 } 2356 2357 static int 2358 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev) 2359 { 2360 struct rte_eth_dev *eth_dev; 2361 2362 eth_dev = dpaa2_dev->eth_dev; 2363 dpaa2_dev_uninit(eth_dev); 2364 2365 rte_eth_dev_release_port(eth_dev); 2366 2367 return 0; 2368 } 2369 2370 static struct rte_dpaa2_driver rte_dpaa2_pmd = { 2371 .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA, 2372 .drv_type = DPAA2_ETH, 2373 .probe = rte_dpaa2_probe, 2374 .remove = rte_dpaa2_remove, 2375 }; 2376 2377 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd); 2378 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2, 2379 DRIVER_LOOPBACK_MODE "=<int>"); 2380 RTE_INIT(dpaa2_pmd_init_log) 2381 { 2382 dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2"); 2383 if (dpaa2_logtype_pmd >= 0) 2384 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE); 2385 } 2386