1 /* * SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved. 4 * Copyright 2016 NXP 5 * 6 */ 7 8 #include <time.h> 9 #include <net/if.h> 10 11 #include <rte_mbuf.h> 12 #include <rte_ethdev_driver.h> 13 #include <rte_malloc.h> 14 #include <rte_memcpy.h> 15 #include <rte_string_fns.h> 16 #include <rte_cycles.h> 17 #include <rte_kvargs.h> 18 #include <rte_dev.h> 19 #include <rte_fslmc.h> 20 #include <rte_flow_driver.h> 21 22 #include "dpaa2_pmd_logs.h" 23 #include <fslmc_vfio.h> 24 #include <dpaa2_hw_pvt.h> 25 #include <dpaa2_hw_mempool.h> 26 #include <dpaa2_hw_dpio.h> 27 #include <mc/fsl_dpmng.h> 28 #include "dpaa2_ethdev.h" 29 #include <fsl_qbman_debug.h> 30 31 #define DRIVER_LOOPBACK_MODE "drv_looback" 32 33 /* Supported Rx offloads */ 34 static uint64_t dev_rx_offloads_sup = 35 DEV_RX_OFFLOAD_VLAN_STRIP | 36 DEV_RX_OFFLOAD_IPV4_CKSUM | 37 DEV_RX_OFFLOAD_UDP_CKSUM | 38 DEV_RX_OFFLOAD_TCP_CKSUM | 39 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 40 DEV_RX_OFFLOAD_VLAN_FILTER | 41 DEV_RX_OFFLOAD_JUMBO_FRAME; 42 43 /* Rx offloads which cannot be disabled */ 44 static uint64_t dev_rx_offloads_nodis = 45 DEV_RX_OFFLOAD_SCATTER; 46 47 /* Supported Tx offloads */ 48 static uint64_t dev_tx_offloads_sup = 49 DEV_TX_OFFLOAD_VLAN_INSERT | 50 DEV_TX_OFFLOAD_IPV4_CKSUM | 51 DEV_TX_OFFLOAD_UDP_CKSUM | 52 DEV_TX_OFFLOAD_TCP_CKSUM | 53 DEV_TX_OFFLOAD_SCTP_CKSUM | 54 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM; 55 56 /* Tx offloads which cannot be disabled */ 57 static uint64_t dev_tx_offloads_nodis = 58 DEV_TX_OFFLOAD_MULTI_SEGS | 59 DEV_TX_OFFLOAD_MT_LOCKFREE | 60 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 61 62 /* enable timestamp in mbuf */ 63 enum pmd_dpaa2_ts dpaa2_enable_ts; 64 65 struct rte_dpaa2_xstats_name_off { 66 char name[RTE_ETH_XSTATS_NAME_SIZE]; 67 uint8_t page_id; /* dpni statistics page id */ 68 uint8_t stats_id; /* stats id in the given page */ 69 }; 70 71 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = { 72 {"ingress_multicast_frames", 0, 2}, 73 {"ingress_multicast_bytes", 0, 3}, 74 {"ingress_broadcast_frames", 0, 4}, 75 {"ingress_broadcast_bytes", 0, 5}, 76 {"egress_multicast_frames", 1, 2}, 77 {"egress_multicast_bytes", 1, 3}, 78 {"egress_broadcast_frames", 1, 4}, 79 {"egress_broadcast_bytes", 1, 5}, 80 {"ingress_filtered_frames", 2, 0}, 81 {"ingress_discarded_frames", 2, 1}, 82 {"ingress_nobuffer_discards", 2, 2}, 83 {"egress_discarded_frames", 2, 3}, 84 {"egress_confirmed_frames", 2, 4}, 85 }; 86 87 static const enum rte_filter_op dpaa2_supported_filter_ops[] = { 88 RTE_ETH_FILTER_ADD, 89 RTE_ETH_FILTER_DELETE, 90 RTE_ETH_FILTER_UPDATE, 91 RTE_ETH_FILTER_FLUSH, 92 RTE_ETH_FILTER_GET 93 }; 94 95 static struct rte_dpaa2_driver rte_dpaa2_pmd; 96 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev); 97 static int dpaa2_dev_link_update(struct rte_eth_dev *dev, 98 int wait_to_complete); 99 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev); 100 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev); 101 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 102 103 int dpaa2_logtype_pmd; 104 105 __rte_experimental void 106 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable) 107 { 108 dpaa2_enable_ts = enable; 109 } 110 111 static int 112 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 113 { 114 int ret; 115 struct dpaa2_dev_priv *priv = dev->data->dev_private; 116 struct fsl_mc_io *dpni = priv->hw; 117 118 PMD_INIT_FUNC_TRACE(); 119 120 if (dpni == NULL) { 121 DPAA2_PMD_ERR("dpni is NULL"); 122 return -1; 123 } 124 125 if (on) 126 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, 127 priv->token, vlan_id); 128 else 129 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW, 130 priv->token, vlan_id); 131 132 if (ret < 0) 133 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d", 134 ret, vlan_id, priv->hw_id); 135 136 return ret; 137 } 138 139 static int 140 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask) 141 { 142 struct dpaa2_dev_priv *priv = dev->data->dev_private; 143 struct fsl_mc_io *dpni = priv->hw; 144 int ret; 145 146 PMD_INIT_FUNC_TRACE(); 147 148 if (mask & ETH_VLAN_FILTER_MASK) { 149 /* VLAN Filter not avaialble */ 150 if (!priv->max_vlan_filters) { 151 DPAA2_PMD_INFO("VLAN filter not available"); 152 goto next_mask; 153 } 154 155 if (dev->data->dev_conf.rxmode.offloads & 156 DEV_RX_OFFLOAD_VLAN_FILTER) 157 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW, 158 priv->token, true); 159 else 160 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW, 161 priv->token, false); 162 if (ret < 0) 163 DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret); 164 } 165 next_mask: 166 if (mask & ETH_VLAN_EXTEND_MASK) { 167 if (dev->data->dev_conf.rxmode.offloads & 168 DEV_RX_OFFLOAD_VLAN_EXTEND) 169 DPAA2_PMD_INFO("VLAN extend offload not supported"); 170 } 171 172 return 0; 173 } 174 175 static int 176 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev, 177 enum rte_vlan_type vlan_type __rte_unused, 178 uint16_t tpid) 179 { 180 struct dpaa2_dev_priv *priv = dev->data->dev_private; 181 struct fsl_mc_io *dpni = priv->hw; 182 int ret = -ENOTSUP; 183 184 PMD_INIT_FUNC_TRACE(); 185 186 /* nothing to be done for standard vlan tpids */ 187 if (tpid == 0x8100 || tpid == 0x88A8) 188 return 0; 189 190 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW, 191 priv->token, tpid); 192 if (ret < 0) 193 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret); 194 /* if already configured tpids, remove them first */ 195 if (ret == -EBUSY) { 196 struct dpni_custom_tpid_cfg tpid_list = {0}; 197 198 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW, 199 priv->token, &tpid_list); 200 if (ret < 0) 201 goto fail; 202 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW, 203 priv->token, tpid_list.tpid1); 204 if (ret < 0) 205 goto fail; 206 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW, 207 priv->token, tpid); 208 } 209 fail: 210 return ret; 211 } 212 213 static int 214 dpaa2_fw_version_get(struct rte_eth_dev *dev, 215 char *fw_version, 216 size_t fw_size) 217 { 218 int ret; 219 struct dpaa2_dev_priv *priv = dev->data->dev_private; 220 struct fsl_mc_io *dpni = priv->hw; 221 struct mc_soc_version mc_plat_info = {0}; 222 struct mc_version mc_ver_info = {0}; 223 224 PMD_INIT_FUNC_TRACE(); 225 226 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info)) 227 DPAA2_PMD_WARN("\tmc_get_soc_version failed"); 228 229 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info)) 230 DPAA2_PMD_WARN("\tmc_get_version failed"); 231 232 ret = snprintf(fw_version, fw_size, 233 "%x-%d.%d.%d", 234 mc_plat_info.svr, 235 mc_ver_info.major, 236 mc_ver_info.minor, 237 mc_ver_info.revision); 238 239 ret += 1; /* add the size of '\0' */ 240 if (fw_size < (uint32_t)ret) 241 return ret; 242 else 243 return 0; 244 } 245 246 static void 247 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 248 { 249 struct dpaa2_dev_priv *priv = dev->data->dev_private; 250 251 PMD_INIT_FUNC_TRACE(); 252 253 dev_info->if_index = priv->hw_id; 254 255 dev_info->max_mac_addrs = priv->max_mac_filters; 256 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN; 257 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE; 258 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues; 259 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues; 260 dev_info->rx_offload_capa = dev_rx_offloads_sup | 261 dev_rx_offloads_nodis; 262 dev_info->tx_offload_capa = dev_tx_offloads_sup | 263 dev_tx_offloads_nodis; 264 dev_info->speed_capa = ETH_LINK_SPEED_1G | 265 ETH_LINK_SPEED_2_5G | 266 ETH_LINK_SPEED_10G; 267 268 dev_info->max_hash_mac_addrs = 0; 269 dev_info->max_vfs = 0; 270 dev_info->max_vmdq_pools = ETH_16_POOLS; 271 dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL; 272 } 273 274 static int 275 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev) 276 { 277 struct dpaa2_dev_priv *priv = dev->data->dev_private; 278 uint16_t dist_idx; 279 uint32_t vq_id; 280 uint8_t num_rxqueue_per_tc; 281 struct dpaa2_queue *mc_q, *mcq; 282 uint32_t tot_queues; 283 int i; 284 struct dpaa2_queue *dpaa2_q; 285 286 PMD_INIT_FUNC_TRACE(); 287 288 num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc); 289 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues; 290 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues, 291 RTE_CACHE_LINE_SIZE); 292 if (!mc_q) { 293 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues"); 294 return -1; 295 } 296 297 for (i = 0; i < priv->nb_rx_queues; i++) { 298 mc_q->eth_data = dev->data; 299 priv->rx_vq[i] = mc_q++; 300 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 301 dpaa2_q->q_storage = rte_malloc("dq_storage", 302 sizeof(struct queue_storage_info_t), 303 RTE_CACHE_LINE_SIZE); 304 if (!dpaa2_q->q_storage) 305 goto fail; 306 307 memset(dpaa2_q->q_storage, 0, 308 sizeof(struct queue_storage_info_t)); 309 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage)) 310 goto fail; 311 } 312 313 for (i = 0; i < priv->nb_tx_queues; i++) { 314 mc_q->eth_data = dev->data; 315 mc_q->flow_id = 0xffff; 316 priv->tx_vq[i] = mc_q++; 317 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 318 dpaa2_q->cscn = rte_malloc(NULL, 319 sizeof(struct qbman_result), 16); 320 if (!dpaa2_q->cscn) 321 goto fail_tx; 322 } 323 324 vq_id = 0; 325 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) { 326 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id]; 327 mcq->tc_index = dist_idx / num_rxqueue_per_tc; 328 mcq->flow_id = dist_idx % num_rxqueue_per_tc; 329 vq_id++; 330 } 331 332 return 0; 333 fail_tx: 334 i -= 1; 335 while (i >= 0) { 336 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 337 rte_free(dpaa2_q->cscn); 338 priv->tx_vq[i--] = NULL; 339 } 340 i = priv->nb_rx_queues; 341 fail: 342 i -= 1; 343 mc_q = priv->rx_vq[0]; 344 while (i >= 0) { 345 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 346 dpaa2_free_dq_storage(dpaa2_q->q_storage); 347 rte_free(dpaa2_q->q_storage); 348 priv->rx_vq[i--] = NULL; 349 } 350 rte_free(mc_q); 351 return -1; 352 } 353 354 static void 355 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev) 356 { 357 struct dpaa2_dev_priv *priv = dev->data->dev_private; 358 struct dpaa2_queue *dpaa2_q; 359 int i; 360 361 PMD_INIT_FUNC_TRACE(); 362 363 /* Queue allocation base */ 364 if (priv->rx_vq[0]) { 365 /* cleaning up queue storage */ 366 for (i = 0; i < priv->nb_rx_queues; i++) { 367 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 368 if (dpaa2_q->q_storage) 369 rte_free(dpaa2_q->q_storage); 370 } 371 /* cleanup tx queue cscn */ 372 for (i = 0; i < priv->nb_tx_queues; i++) { 373 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 374 rte_free(dpaa2_q->cscn); 375 } 376 /*free memory for all queues (RX+TX) */ 377 rte_free(priv->rx_vq[0]); 378 priv->rx_vq[0] = NULL; 379 } 380 } 381 382 static int 383 dpaa2_eth_dev_configure(struct rte_eth_dev *dev) 384 { 385 struct dpaa2_dev_priv *priv = dev->data->dev_private; 386 struct fsl_mc_io *dpni = priv->hw; 387 struct rte_eth_conf *eth_conf = &dev->data->dev_conf; 388 uint64_t rx_offloads = eth_conf->rxmode.offloads; 389 uint64_t tx_offloads = eth_conf->txmode.offloads; 390 int rx_l3_csum_offload = false; 391 int rx_l4_csum_offload = false; 392 int tx_l3_csum_offload = false; 393 int tx_l4_csum_offload = false; 394 int ret; 395 396 PMD_INIT_FUNC_TRACE(); 397 398 /* Rx offloads validation */ 399 if (dev_rx_offloads_nodis & ~rx_offloads) { 400 DPAA2_PMD_WARN( 401 "Rx offloads non configurable - requested 0x%" PRIx64 402 " ignored 0x%" PRIx64, 403 rx_offloads, dev_rx_offloads_nodis); 404 } 405 406 /* Tx offloads validation */ 407 if (dev_tx_offloads_nodis & ~tx_offloads) { 408 DPAA2_PMD_WARN( 409 "Tx offloads non configurable - requested 0x%" PRIx64 410 " ignored 0x%" PRIx64, 411 tx_offloads, dev_tx_offloads_nodis); 412 } 413 414 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 415 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) { 416 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, 417 priv->token, eth_conf->rxmode.max_rx_pkt_len); 418 if (ret) { 419 DPAA2_PMD_ERR( 420 "Unable to set mtu. check config"); 421 return ret; 422 } 423 } else { 424 return -1; 425 } 426 } 427 428 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) { 429 ret = dpaa2_setup_flow_dist(dev, 430 eth_conf->rx_adv_conf.rss_conf.rss_hf); 431 if (ret) { 432 DPAA2_PMD_ERR("Unable to set flow distribution." 433 "Check queue config"); 434 return ret; 435 } 436 } 437 438 if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM) 439 rx_l3_csum_offload = true; 440 441 if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) || 442 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM)) 443 rx_l4_csum_offload = true; 444 445 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 446 DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload); 447 if (ret) { 448 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret); 449 return ret; 450 } 451 452 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 453 DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload); 454 if (ret) { 455 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret); 456 return ret; 457 } 458 459 if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM) 460 tx_l3_csum_offload = true; 461 462 if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) || 463 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) || 464 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM)) 465 tx_l4_csum_offload = true; 466 467 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 468 DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload); 469 if (ret) { 470 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret); 471 return ret; 472 } 473 474 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 475 DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload); 476 if (ret) { 477 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret); 478 return ret; 479 } 480 481 /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in 482 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC] 483 * to 0 for LS2 in the hardware thus disabling data/annotation 484 * stashing. For LX2 this is fixed in hardware and thus hash result and 485 * parse results can be received in FD using this option. 486 */ 487 if (dpaa2_svr_family == SVR_LX2160A) { 488 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 489 DPNI_FLCTYPE_HASH, true); 490 if (ret) { 491 DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret); 492 return ret; 493 } 494 } 495 496 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER) 497 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK); 498 499 /* update the current status */ 500 dpaa2_dev_link_update(dev, 0); 501 502 return 0; 503 } 504 505 /* Function to setup RX flow information. It contains traffic class ID, 506 * flow ID, destination configuration etc. 507 */ 508 static int 509 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, 510 uint16_t rx_queue_id, 511 uint16_t nb_rx_desc __rte_unused, 512 unsigned int socket_id __rte_unused, 513 const struct rte_eth_rxconf *rx_conf __rte_unused, 514 struct rte_mempool *mb_pool) 515 { 516 struct dpaa2_dev_priv *priv = dev->data->dev_private; 517 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 518 struct dpaa2_queue *dpaa2_q; 519 struct dpni_queue cfg; 520 uint8_t options = 0; 521 uint8_t flow_id; 522 uint32_t bpid; 523 int ret; 524 525 PMD_INIT_FUNC_TRACE(); 526 527 DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p", 528 dev, rx_queue_id, mb_pool, rx_conf); 529 530 if (!priv->bp_list || priv->bp_list->mp != mb_pool) { 531 bpid = mempool_to_bpid(mb_pool); 532 ret = dpaa2_attach_bp_list(priv, 533 rte_dpaa2_bpid_info[bpid].bp_list); 534 if (ret) 535 return ret; 536 } 537 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 538 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */ 539 dpaa2_q->bp_array = rte_dpaa2_bpid_info; 540 541 /*Get the flow id from given VQ id*/ 542 flow_id = rx_queue_id % priv->nb_rx_queues; 543 memset(&cfg, 0, sizeof(struct dpni_queue)); 544 545 options = options | DPNI_QUEUE_OPT_USER_CTX; 546 cfg.user_context = (size_t)(dpaa2_q); 547 548 /*if ls2088 or rev2 device, enable the stashing */ 549 550 if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) { 551 options |= DPNI_QUEUE_OPT_FLC; 552 cfg.flc.stash_control = true; 553 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0; 554 /* 00 00 00 - last 6 bit represent annotation, context stashing, 555 * data stashing setting 01 01 00 (0x14) 556 * (in following order ->DS AS CS) 557 * to enable 1 line data, 1 line annotation. 558 * For LX2, this setting should be 01 00 00 (0x10) 559 */ 560 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A) 561 cfg.flc.value |= 0x10; 562 else 563 cfg.flc.value |= 0x14; 564 } 565 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX, 566 dpaa2_q->tc_index, flow_id, options, &cfg); 567 if (ret) { 568 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret); 569 return -1; 570 } 571 572 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) { 573 struct dpni_taildrop taildrop; 574 575 taildrop.enable = 1; 576 /*enabling per rx queue congestion control */ 577 taildrop.threshold = CONG_THRESHOLD_RX_Q; 578 taildrop.units = DPNI_CONGESTION_UNIT_BYTES; 579 taildrop.oal = CONG_RX_OAL; 580 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d", 581 rx_queue_id); 582 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token, 583 DPNI_CP_QUEUE, DPNI_QUEUE_RX, 584 dpaa2_q->tc_index, flow_id, &taildrop); 585 if (ret) { 586 DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)", 587 ret); 588 return -1; 589 } 590 } 591 592 dev->data->rx_queues[rx_queue_id] = dpaa2_q; 593 return 0; 594 } 595 596 static int 597 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, 598 uint16_t tx_queue_id, 599 uint16_t nb_tx_desc __rte_unused, 600 unsigned int socket_id __rte_unused, 601 const struct rte_eth_txconf *tx_conf __rte_unused) 602 { 603 struct dpaa2_dev_priv *priv = dev->data->dev_private; 604 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *) 605 priv->tx_vq[tx_queue_id]; 606 struct fsl_mc_io *dpni = priv->hw; 607 struct dpni_queue tx_conf_cfg; 608 struct dpni_queue tx_flow_cfg; 609 uint8_t options = 0, flow_id; 610 uint32_t tc_id; 611 int ret; 612 613 PMD_INIT_FUNC_TRACE(); 614 615 /* Return if queue already configured */ 616 if (dpaa2_q->flow_id != 0xffff) { 617 dev->data->tx_queues[tx_queue_id] = dpaa2_q; 618 return 0; 619 } 620 621 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue)); 622 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue)); 623 624 tc_id = tx_queue_id; 625 flow_id = 0; 626 627 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX, 628 tc_id, flow_id, options, &tx_flow_cfg); 629 if (ret) { 630 DPAA2_PMD_ERR("Error in setting the tx flow: " 631 "tc_id=%d, flow=%d err=%d", 632 tc_id, flow_id, ret); 633 return -1; 634 } 635 636 dpaa2_q->flow_id = flow_id; 637 638 if (tx_queue_id == 0) { 639 /*Set tx-conf and error configuration*/ 640 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW, 641 priv->token, 642 DPNI_CONF_DISABLE); 643 if (ret) { 644 DPAA2_PMD_ERR("Error in set tx conf mode settings: " 645 "err=%d", ret); 646 return -1; 647 } 648 } 649 dpaa2_q->tc_index = tc_id; 650 651 if (!(priv->flags & DPAA2_TX_CGR_OFF)) { 652 struct dpni_congestion_notification_cfg cong_notif_cfg; 653 654 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES; 655 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD; 656 /* Notify that the queue is not congested when the data in 657 * the queue is below this thershold. 658 */ 659 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD; 660 cong_notif_cfg.message_ctx = 0; 661 cong_notif_cfg.message_iova = 662 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn); 663 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE; 664 cong_notif_cfg.notification_mode = 665 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER | 666 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT | 667 DPNI_CONG_OPT_COHERENT_WRITE; 668 669 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW, 670 priv->token, 671 DPNI_QUEUE_TX, 672 tc_id, 673 &cong_notif_cfg); 674 if (ret) { 675 DPAA2_PMD_ERR( 676 "Error in setting tx congestion notification: " 677 "err=%d", ret); 678 return -ret; 679 } 680 } 681 dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf; 682 dev->data->tx_queues[tx_queue_id] = dpaa2_q; 683 return 0; 684 } 685 686 static void 687 dpaa2_dev_rx_queue_release(void *q __rte_unused) 688 { 689 PMD_INIT_FUNC_TRACE(); 690 } 691 692 static void 693 dpaa2_dev_tx_queue_release(void *q __rte_unused) 694 { 695 PMD_INIT_FUNC_TRACE(); 696 } 697 698 static uint32_t 699 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 700 { 701 int32_t ret; 702 struct dpaa2_dev_priv *priv = dev->data->dev_private; 703 struct dpaa2_queue *dpaa2_q; 704 struct qbman_swp *swp; 705 struct qbman_fq_query_np_rslt state; 706 uint32_t frame_cnt = 0; 707 708 PMD_INIT_FUNC_TRACE(); 709 710 if (unlikely(!DPAA2_PER_LCORE_DPIO)) { 711 ret = dpaa2_affine_qbman_swp(); 712 if (ret) { 713 DPAA2_PMD_ERR("Failure in affining portal"); 714 return -EINVAL; 715 } 716 } 717 swp = DPAA2_PER_LCORE_PORTAL; 718 719 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 720 721 if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) { 722 frame_cnt = qbman_fq_state_frame_count(&state); 723 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u", 724 rx_queue_id, frame_cnt); 725 } 726 return frame_cnt; 727 } 728 729 static const uint32_t * 730 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev) 731 { 732 static const uint32_t ptypes[] = { 733 /*todo -= add more types */ 734 RTE_PTYPE_L2_ETHER, 735 RTE_PTYPE_L3_IPV4, 736 RTE_PTYPE_L3_IPV4_EXT, 737 RTE_PTYPE_L3_IPV6, 738 RTE_PTYPE_L3_IPV6_EXT, 739 RTE_PTYPE_L4_TCP, 740 RTE_PTYPE_L4_UDP, 741 RTE_PTYPE_L4_SCTP, 742 RTE_PTYPE_L4_ICMP, 743 RTE_PTYPE_UNKNOWN 744 }; 745 746 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx || 747 dev->rx_pkt_burst == dpaa2_dev_loopback_rx) 748 return ptypes; 749 return NULL; 750 } 751 752 /** 753 * Dpaa2 link Interrupt handler 754 * 755 * @param param 756 * The address of parameter (struct rte_eth_dev *) regsitered before. 757 * 758 * @return 759 * void 760 */ 761 static void 762 dpaa2_interrupt_handler(void *param) 763 { 764 struct rte_eth_dev *dev = param; 765 struct dpaa2_dev_priv *priv = dev->data->dev_private; 766 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 767 int ret; 768 int irq_index = DPNI_IRQ_INDEX; 769 unsigned int status = 0, clear = 0; 770 771 PMD_INIT_FUNC_TRACE(); 772 773 if (dpni == NULL) { 774 DPAA2_PMD_ERR("dpni is NULL"); 775 return; 776 } 777 778 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token, 779 irq_index, &status); 780 if (unlikely(ret)) { 781 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret); 782 clear = 0xffffffff; 783 goto out; 784 } 785 786 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) { 787 clear = DPNI_IRQ_EVENT_LINK_CHANGED; 788 dpaa2_dev_link_update(dev, 0); 789 /* calling all the apps registered for link status event */ 790 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, 791 NULL); 792 } 793 out: 794 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token, 795 irq_index, clear); 796 if (unlikely(ret)) 797 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret); 798 } 799 800 static int 801 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable) 802 { 803 int err = 0; 804 struct dpaa2_dev_priv *priv = dev->data->dev_private; 805 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 806 int irq_index = DPNI_IRQ_INDEX; 807 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED; 808 809 PMD_INIT_FUNC_TRACE(); 810 811 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token, 812 irq_index, mask); 813 if (err < 0) { 814 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err, 815 strerror(-err)); 816 return err; 817 } 818 819 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token, 820 irq_index, enable); 821 if (err < 0) 822 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err, 823 strerror(-err)); 824 825 return err; 826 } 827 828 static int 829 dpaa2_dev_start(struct rte_eth_dev *dev) 830 { 831 struct rte_device *rdev = dev->device; 832 struct rte_dpaa2_device *dpaa2_dev; 833 struct rte_eth_dev_data *data = dev->data; 834 struct dpaa2_dev_priv *priv = data->dev_private; 835 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 836 struct dpni_queue cfg; 837 struct dpni_error_cfg err_cfg; 838 uint16_t qdid; 839 struct dpni_queue_id qid; 840 struct dpaa2_queue *dpaa2_q; 841 int ret, i; 842 struct rte_intr_handle *intr_handle; 843 844 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device); 845 intr_handle = &dpaa2_dev->intr_handle; 846 847 PMD_INIT_FUNC_TRACE(); 848 849 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 850 if (ret) { 851 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d", 852 priv->hw_id, ret); 853 return ret; 854 } 855 856 /* Power up the phy. Needed to make the link go UP */ 857 dpaa2_dev_set_link_up(dev); 858 859 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token, 860 DPNI_QUEUE_TX, &qdid); 861 if (ret) { 862 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret); 863 return ret; 864 } 865 priv->qdid = qdid; 866 867 for (i = 0; i < data->nb_rx_queues; i++) { 868 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i]; 869 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token, 870 DPNI_QUEUE_RX, dpaa2_q->tc_index, 871 dpaa2_q->flow_id, &cfg, &qid); 872 if (ret) { 873 DPAA2_PMD_ERR("Error in getting flow information: " 874 "err=%d", ret); 875 return ret; 876 } 877 dpaa2_q->fqid = qid.fqid; 878 } 879 880 /*checksum errors, send them to normal path and set it in annotation */ 881 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE; 882 err_cfg.errors |= DPNI_ERROR_PHE; 883 884 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE; 885 err_cfg.set_frame_annotation = true; 886 887 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW, 888 priv->token, &err_cfg); 889 if (ret) { 890 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d", 891 ret); 892 return ret; 893 } 894 895 /* if the interrupts were configured on this devices*/ 896 if (intr_handle && (intr_handle->fd) && 897 (dev->data->dev_conf.intr_conf.lsc != 0)) { 898 /* Registering LSC interrupt handler */ 899 rte_intr_callback_register(intr_handle, 900 dpaa2_interrupt_handler, 901 (void *)dev); 902 903 /* enable vfio intr/eventfd mapping 904 * Interrupt index 0 is required, so we can not use 905 * rte_intr_enable. 906 */ 907 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX); 908 909 /* enable dpni_irqs */ 910 dpaa2_eth_setup_irqs(dev, 1); 911 } 912 913 /* Change the tx burst function if ordered queues are used */ 914 if (priv->en_ordered) 915 dev->tx_pkt_burst = dpaa2_dev_tx_ordered; 916 917 return 0; 918 } 919 920 /** 921 * This routine disables all traffic on the adapter by issuing a 922 * global reset on the MAC. 923 */ 924 static void 925 dpaa2_dev_stop(struct rte_eth_dev *dev) 926 { 927 struct dpaa2_dev_priv *priv = dev->data->dev_private; 928 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 929 int ret; 930 struct rte_eth_link link; 931 struct rte_intr_handle *intr_handle = dev->intr_handle; 932 933 PMD_INIT_FUNC_TRACE(); 934 935 /* reset interrupt callback */ 936 if (intr_handle && (intr_handle->fd) && 937 (dev->data->dev_conf.intr_conf.lsc != 0)) { 938 /*disable dpni irqs */ 939 dpaa2_eth_setup_irqs(dev, 0); 940 941 /* disable vfio intr before callback unregister */ 942 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX); 943 944 /* Unregistering LSC interrupt handler */ 945 rte_intr_callback_unregister(intr_handle, 946 dpaa2_interrupt_handler, 947 (void *)dev); 948 } 949 950 dpaa2_dev_set_link_down(dev); 951 952 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token); 953 if (ret) { 954 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev", 955 ret, priv->hw_id); 956 return; 957 } 958 959 /* clear the recorded link status */ 960 memset(&link, 0, sizeof(link)); 961 rte_eth_linkstatus_set(dev, &link); 962 } 963 964 static void 965 dpaa2_dev_close(struct rte_eth_dev *dev) 966 { 967 struct dpaa2_dev_priv *priv = dev->data->dev_private; 968 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 969 int ret; 970 struct rte_eth_link link; 971 972 PMD_INIT_FUNC_TRACE(); 973 974 /* Clean the device first */ 975 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token); 976 if (ret) { 977 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret); 978 return; 979 } 980 981 memset(&link, 0, sizeof(link)); 982 rte_eth_linkstatus_set(dev, &link); 983 } 984 985 static void 986 dpaa2_dev_promiscuous_enable( 987 struct rte_eth_dev *dev) 988 { 989 int ret; 990 struct dpaa2_dev_priv *priv = dev->data->dev_private; 991 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 992 993 PMD_INIT_FUNC_TRACE(); 994 995 if (dpni == NULL) { 996 DPAA2_PMD_ERR("dpni is NULL"); 997 return; 998 } 999 1000 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 1001 if (ret < 0) 1002 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret); 1003 1004 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 1005 if (ret < 0) 1006 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret); 1007 } 1008 1009 static void 1010 dpaa2_dev_promiscuous_disable( 1011 struct rte_eth_dev *dev) 1012 { 1013 int ret; 1014 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1015 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1016 1017 PMD_INIT_FUNC_TRACE(); 1018 1019 if (dpni == NULL) { 1020 DPAA2_PMD_ERR("dpni is NULL"); 1021 return; 1022 } 1023 1024 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 1025 if (ret < 0) 1026 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret); 1027 1028 if (dev->data->all_multicast == 0) { 1029 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, 1030 priv->token, false); 1031 if (ret < 0) 1032 DPAA2_PMD_ERR("Unable to disable M promisc mode %d", 1033 ret); 1034 } 1035 } 1036 1037 static void 1038 dpaa2_dev_allmulticast_enable( 1039 struct rte_eth_dev *dev) 1040 { 1041 int ret; 1042 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1043 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1044 1045 PMD_INIT_FUNC_TRACE(); 1046 1047 if (dpni == NULL) { 1048 DPAA2_PMD_ERR("dpni is NULL"); 1049 return; 1050 } 1051 1052 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 1053 if (ret < 0) 1054 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret); 1055 } 1056 1057 static void 1058 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev) 1059 { 1060 int ret; 1061 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1062 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1063 1064 PMD_INIT_FUNC_TRACE(); 1065 1066 if (dpni == NULL) { 1067 DPAA2_PMD_ERR("dpni is NULL"); 1068 return; 1069 } 1070 1071 /* must remain on for all promiscuous */ 1072 if (dev->data->promiscuous == 1) 1073 return; 1074 1075 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 1076 if (ret < 0) 1077 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret); 1078 } 1079 1080 static int 1081 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 1082 { 1083 int ret; 1084 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1085 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1086 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN 1087 + VLAN_TAG_SIZE; 1088 1089 PMD_INIT_FUNC_TRACE(); 1090 1091 if (dpni == NULL) { 1092 DPAA2_PMD_ERR("dpni is NULL"); 1093 return -EINVAL; 1094 } 1095 1096 /* check that mtu is within the allowed range */ 1097 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN)) 1098 return -EINVAL; 1099 1100 if (frame_size > ETHER_MAX_LEN) 1101 dev->data->dev_conf.rxmode.offloads &= 1102 DEV_RX_OFFLOAD_JUMBO_FRAME; 1103 else 1104 dev->data->dev_conf.rxmode.offloads &= 1105 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1106 1107 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 1108 1109 /* Set the Max Rx frame length as 'mtu' + 1110 * Maximum Ethernet header length 1111 */ 1112 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token, 1113 frame_size); 1114 if (ret) { 1115 DPAA2_PMD_ERR("Setting the max frame length failed"); 1116 return -1; 1117 } 1118 DPAA2_PMD_INFO("MTU configured for the device: %d", mtu); 1119 return 0; 1120 } 1121 1122 static int 1123 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev, 1124 struct ether_addr *addr, 1125 __rte_unused uint32_t index, 1126 __rte_unused uint32_t pool) 1127 { 1128 int ret; 1129 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1130 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1131 1132 PMD_INIT_FUNC_TRACE(); 1133 1134 if (dpni == NULL) { 1135 DPAA2_PMD_ERR("dpni is NULL"); 1136 return -1; 1137 } 1138 1139 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW, 1140 priv->token, addr->addr_bytes); 1141 if (ret) 1142 DPAA2_PMD_ERR( 1143 "error: Adding the MAC ADDR failed: err = %d", ret); 1144 return 0; 1145 } 1146 1147 static void 1148 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev, 1149 uint32_t index) 1150 { 1151 int ret; 1152 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1153 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1154 struct rte_eth_dev_data *data = dev->data; 1155 struct ether_addr *macaddr; 1156 1157 PMD_INIT_FUNC_TRACE(); 1158 1159 macaddr = &data->mac_addrs[index]; 1160 1161 if (dpni == NULL) { 1162 DPAA2_PMD_ERR("dpni is NULL"); 1163 return; 1164 } 1165 1166 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW, 1167 priv->token, macaddr->addr_bytes); 1168 if (ret) 1169 DPAA2_PMD_ERR( 1170 "error: Removing the MAC ADDR failed: err = %d", ret); 1171 } 1172 1173 static int 1174 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev, 1175 struct ether_addr *addr) 1176 { 1177 int ret; 1178 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1179 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1180 1181 PMD_INIT_FUNC_TRACE(); 1182 1183 if (dpni == NULL) { 1184 DPAA2_PMD_ERR("dpni is NULL"); 1185 return -EINVAL; 1186 } 1187 1188 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW, 1189 priv->token, addr->addr_bytes); 1190 1191 if (ret) 1192 DPAA2_PMD_ERR( 1193 "error: Setting the MAC ADDR failed %d", ret); 1194 1195 return ret; 1196 } 1197 1198 static 1199 int dpaa2_dev_stats_get(struct rte_eth_dev *dev, 1200 struct rte_eth_stats *stats) 1201 { 1202 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1203 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1204 int32_t retcode; 1205 uint8_t page0 = 0, page1 = 1, page2 = 2; 1206 union dpni_statistics value; 1207 int i; 1208 struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq; 1209 1210 memset(&value, 0, sizeof(union dpni_statistics)); 1211 1212 PMD_INIT_FUNC_TRACE(); 1213 1214 if (!dpni) { 1215 DPAA2_PMD_ERR("dpni is NULL"); 1216 return -EINVAL; 1217 } 1218 1219 if (!stats) { 1220 DPAA2_PMD_ERR("stats is NULL"); 1221 return -EINVAL; 1222 } 1223 1224 /*Get Counters from page_0*/ 1225 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1226 page0, 0, &value); 1227 if (retcode) 1228 goto err; 1229 1230 stats->ipackets = value.page_0.ingress_all_frames; 1231 stats->ibytes = value.page_0.ingress_all_bytes; 1232 1233 /*Get Counters from page_1*/ 1234 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1235 page1, 0, &value); 1236 if (retcode) 1237 goto err; 1238 1239 stats->opackets = value.page_1.egress_all_frames; 1240 stats->obytes = value.page_1.egress_all_bytes; 1241 1242 /*Get Counters from page_2*/ 1243 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1244 page2, 0, &value); 1245 if (retcode) 1246 goto err; 1247 1248 /* Ingress drop frame count due to configured rules */ 1249 stats->ierrors = value.page_2.ingress_filtered_frames; 1250 /* Ingress drop frame count due to error */ 1251 stats->ierrors += value.page_2.ingress_discarded_frames; 1252 1253 stats->oerrors = value.page_2.egress_discarded_frames; 1254 stats->imissed = value.page_2.ingress_nobuffer_discards; 1255 1256 /* Fill in per queue stats */ 1257 for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) && 1258 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) { 1259 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i]; 1260 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i]; 1261 if (dpaa2_rxq) 1262 stats->q_ipackets[i] = dpaa2_rxq->rx_pkts; 1263 if (dpaa2_txq) 1264 stats->q_opackets[i] = dpaa2_txq->tx_pkts; 1265 1266 /* Byte counting is not implemented */ 1267 stats->q_ibytes[i] = 0; 1268 stats->q_obytes[i] = 0; 1269 } 1270 1271 return 0; 1272 1273 err: 1274 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode); 1275 return retcode; 1276 }; 1277 1278 static int 1279 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 1280 unsigned int n) 1281 { 1282 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1283 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1284 int32_t retcode; 1285 union dpni_statistics value[3] = {}; 1286 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings); 1287 1288 if (n < num) 1289 return num; 1290 1291 if (xstats == NULL) 1292 return 0; 1293 1294 /* Get Counters from page_0*/ 1295 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1296 0, 0, &value[0]); 1297 if (retcode) 1298 goto err; 1299 1300 /* Get Counters from page_1*/ 1301 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1302 1, 0, &value[1]); 1303 if (retcode) 1304 goto err; 1305 1306 /* Get Counters from page_2*/ 1307 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1308 2, 0, &value[2]); 1309 if (retcode) 1310 goto err; 1311 1312 for (i = 0; i < num; i++) { 1313 xstats[i].id = i; 1314 xstats[i].value = value[dpaa2_xstats_strings[i].page_id]. 1315 raw.counter[dpaa2_xstats_strings[i].stats_id]; 1316 } 1317 return i; 1318 err: 1319 DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode); 1320 return retcode; 1321 } 1322 1323 static int 1324 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 1325 struct rte_eth_xstat_name *xstats_names, 1326 unsigned int limit) 1327 { 1328 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1329 1330 if (limit < stat_cnt) 1331 return stat_cnt; 1332 1333 if (xstats_names != NULL) 1334 for (i = 0; i < stat_cnt; i++) 1335 snprintf(xstats_names[i].name, 1336 sizeof(xstats_names[i].name), 1337 "%s", 1338 dpaa2_xstats_strings[i].name); 1339 1340 return stat_cnt; 1341 } 1342 1343 static int 1344 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 1345 uint64_t *values, unsigned int n) 1346 { 1347 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1348 uint64_t values_copy[stat_cnt]; 1349 1350 if (!ids) { 1351 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1352 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1353 int32_t retcode; 1354 union dpni_statistics value[3] = {}; 1355 1356 if (n < stat_cnt) 1357 return stat_cnt; 1358 1359 if (!values) 1360 return 0; 1361 1362 /* Get Counters from page_0*/ 1363 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1364 0, 0, &value[0]); 1365 if (retcode) 1366 return 0; 1367 1368 /* Get Counters from page_1*/ 1369 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1370 1, 0, &value[1]); 1371 if (retcode) 1372 return 0; 1373 1374 /* Get Counters from page_2*/ 1375 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1376 2, 0, &value[2]); 1377 if (retcode) 1378 return 0; 1379 1380 for (i = 0; i < stat_cnt; i++) { 1381 values[i] = value[dpaa2_xstats_strings[i].page_id]. 1382 raw.counter[dpaa2_xstats_strings[i].stats_id]; 1383 } 1384 return stat_cnt; 1385 } 1386 1387 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt); 1388 1389 for (i = 0; i < n; i++) { 1390 if (ids[i] >= stat_cnt) { 1391 DPAA2_PMD_ERR("xstats id value isn't valid"); 1392 return -1; 1393 } 1394 values[i] = values_copy[ids[i]]; 1395 } 1396 return n; 1397 } 1398 1399 static int 1400 dpaa2_xstats_get_names_by_id( 1401 struct rte_eth_dev *dev, 1402 struct rte_eth_xstat_name *xstats_names, 1403 const uint64_t *ids, 1404 unsigned int limit) 1405 { 1406 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1407 struct rte_eth_xstat_name xstats_names_copy[stat_cnt]; 1408 1409 if (!ids) 1410 return dpaa2_xstats_get_names(dev, xstats_names, limit); 1411 1412 dpaa2_xstats_get_names(dev, xstats_names_copy, limit); 1413 1414 for (i = 0; i < limit; i++) { 1415 if (ids[i] >= stat_cnt) { 1416 DPAA2_PMD_ERR("xstats id value isn't valid"); 1417 return -1; 1418 } 1419 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 1420 } 1421 return limit; 1422 } 1423 1424 static void 1425 dpaa2_dev_stats_reset(struct rte_eth_dev *dev) 1426 { 1427 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1428 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1429 int32_t retcode; 1430 int i; 1431 struct dpaa2_queue *dpaa2_q; 1432 1433 PMD_INIT_FUNC_TRACE(); 1434 1435 if (dpni == NULL) { 1436 DPAA2_PMD_ERR("dpni is NULL"); 1437 return; 1438 } 1439 1440 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token); 1441 if (retcode) 1442 goto error; 1443 1444 /* Reset the per queue stats in dpaa2_queue structure */ 1445 for (i = 0; i < priv->nb_rx_queues; i++) { 1446 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 1447 if (dpaa2_q) 1448 dpaa2_q->rx_pkts = 0; 1449 } 1450 1451 for (i = 0; i < priv->nb_tx_queues; i++) { 1452 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 1453 if (dpaa2_q) 1454 dpaa2_q->tx_pkts = 0; 1455 } 1456 1457 return; 1458 1459 error: 1460 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode); 1461 return; 1462 }; 1463 1464 /* return 0 means link status changed, -1 means not changed */ 1465 static int 1466 dpaa2_dev_link_update(struct rte_eth_dev *dev, 1467 int wait_to_complete __rte_unused) 1468 { 1469 int ret; 1470 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1471 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1472 struct rte_eth_link link; 1473 struct dpni_link_state state = {0}; 1474 1475 if (dpni == NULL) { 1476 DPAA2_PMD_ERR("dpni is NULL"); 1477 return 0; 1478 } 1479 1480 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1481 if (ret < 0) { 1482 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret); 1483 return -1; 1484 } 1485 1486 memset(&link, 0, sizeof(struct rte_eth_link)); 1487 link.link_status = state.up; 1488 link.link_speed = state.rate; 1489 1490 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX) 1491 link.link_duplex = ETH_LINK_HALF_DUPLEX; 1492 else 1493 link.link_duplex = ETH_LINK_FULL_DUPLEX; 1494 1495 ret = rte_eth_linkstatus_set(dev, &link); 1496 if (ret == -1) 1497 DPAA2_PMD_DEBUG("No change in status"); 1498 else 1499 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id, 1500 link.link_status ? "Up" : "Down"); 1501 1502 return ret; 1503 } 1504 1505 /** 1506 * Toggle the DPNI to enable, if not already enabled. 1507 * This is not strictly PHY up/down - it is more of logical toggling. 1508 */ 1509 static int 1510 dpaa2_dev_set_link_up(struct rte_eth_dev *dev) 1511 { 1512 int ret = -EINVAL; 1513 struct dpaa2_dev_priv *priv; 1514 struct fsl_mc_io *dpni; 1515 int en = 0; 1516 struct dpni_link_state state = {0}; 1517 1518 priv = dev->data->dev_private; 1519 dpni = (struct fsl_mc_io *)priv->hw; 1520 1521 if (dpni == NULL) { 1522 DPAA2_PMD_ERR("dpni is NULL"); 1523 return ret; 1524 } 1525 1526 /* Check if DPNI is currently enabled */ 1527 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en); 1528 if (ret) { 1529 /* Unable to obtain dpni status; Not continuing */ 1530 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret); 1531 return -EINVAL; 1532 } 1533 1534 /* Enable link if not already enabled */ 1535 if (!en) { 1536 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 1537 if (ret) { 1538 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret); 1539 return -EINVAL; 1540 } 1541 } 1542 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1543 if (ret < 0) { 1544 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret); 1545 return -1; 1546 } 1547 1548 /* changing tx burst function to start enqueues */ 1549 dev->tx_pkt_burst = dpaa2_dev_tx; 1550 dev->data->dev_link.link_status = state.up; 1551 1552 if (state.up) 1553 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id); 1554 else 1555 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id); 1556 return ret; 1557 } 1558 1559 /** 1560 * Toggle the DPNI to disable, if not already disabled. 1561 * This is not strictly PHY up/down - it is more of logical toggling. 1562 */ 1563 static int 1564 dpaa2_dev_set_link_down(struct rte_eth_dev *dev) 1565 { 1566 int ret = -EINVAL; 1567 struct dpaa2_dev_priv *priv; 1568 struct fsl_mc_io *dpni; 1569 int dpni_enabled = 0; 1570 int retries = 10; 1571 1572 PMD_INIT_FUNC_TRACE(); 1573 1574 priv = dev->data->dev_private; 1575 dpni = (struct fsl_mc_io *)priv->hw; 1576 1577 if (dpni == NULL) { 1578 DPAA2_PMD_ERR("Device has not yet been configured"); 1579 return ret; 1580 } 1581 1582 /*changing tx burst function to avoid any more enqueues */ 1583 dev->tx_pkt_burst = dummy_dev_tx; 1584 1585 /* Loop while dpni_disable() attempts to drain the egress FQs 1586 * and confirm them back to us. 1587 */ 1588 do { 1589 ret = dpni_disable(dpni, 0, priv->token); 1590 if (ret) { 1591 DPAA2_PMD_ERR("dpni disable failed (%d)", ret); 1592 return ret; 1593 } 1594 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled); 1595 if (ret) { 1596 DPAA2_PMD_ERR("dpni enable check failed (%d)", ret); 1597 return ret; 1598 } 1599 if (dpni_enabled) 1600 /* Allow the MC some slack */ 1601 rte_delay_us(100 * 1000); 1602 } while (dpni_enabled && --retries); 1603 1604 if (!retries) { 1605 DPAA2_PMD_WARN("Retry count exceeded disabling dpni"); 1606 /* todo- we may have to manually cleanup queues. 1607 */ 1608 } else { 1609 DPAA2_PMD_INFO("Port %d Link DOWN successful", 1610 dev->data->port_id); 1611 } 1612 1613 dev->data->dev_link.link_status = 0; 1614 1615 return ret; 1616 } 1617 1618 static int 1619 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1620 { 1621 int ret = -EINVAL; 1622 struct dpaa2_dev_priv *priv; 1623 struct fsl_mc_io *dpni; 1624 struct dpni_link_state state = {0}; 1625 1626 PMD_INIT_FUNC_TRACE(); 1627 1628 priv = dev->data->dev_private; 1629 dpni = (struct fsl_mc_io *)priv->hw; 1630 1631 if (dpni == NULL || fc_conf == NULL) { 1632 DPAA2_PMD_ERR("device not configured"); 1633 return ret; 1634 } 1635 1636 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1637 if (ret) { 1638 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret); 1639 return ret; 1640 } 1641 1642 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf)); 1643 if (state.options & DPNI_LINK_OPT_PAUSE) { 1644 /* DPNI_LINK_OPT_PAUSE set 1645 * if ASYM_PAUSE not set, 1646 * RX Side flow control (handle received Pause frame) 1647 * TX side flow control (send Pause frame) 1648 * if ASYM_PAUSE set, 1649 * RX Side flow control (handle received Pause frame) 1650 * No TX side flow control (send Pause frame disabled) 1651 */ 1652 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE)) 1653 fc_conf->mode = RTE_FC_FULL; 1654 else 1655 fc_conf->mode = RTE_FC_RX_PAUSE; 1656 } else { 1657 /* DPNI_LINK_OPT_PAUSE not set 1658 * if ASYM_PAUSE set, 1659 * TX side flow control (send Pause frame) 1660 * No RX side flow control (No action on pause frame rx) 1661 * if ASYM_PAUSE not set, 1662 * Flow control disabled 1663 */ 1664 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE) 1665 fc_conf->mode = RTE_FC_TX_PAUSE; 1666 else 1667 fc_conf->mode = RTE_FC_NONE; 1668 } 1669 1670 return ret; 1671 } 1672 1673 static int 1674 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1675 { 1676 int ret = -EINVAL; 1677 struct dpaa2_dev_priv *priv; 1678 struct fsl_mc_io *dpni; 1679 struct dpni_link_state state = {0}; 1680 struct dpni_link_cfg cfg = {0}; 1681 1682 PMD_INIT_FUNC_TRACE(); 1683 1684 priv = dev->data->dev_private; 1685 dpni = (struct fsl_mc_io *)priv->hw; 1686 1687 if (dpni == NULL) { 1688 DPAA2_PMD_ERR("dpni is NULL"); 1689 return ret; 1690 } 1691 1692 /* It is necessary to obtain the current state before setting fc_conf 1693 * as MC would return error in case rate, autoneg or duplex values are 1694 * different. 1695 */ 1696 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1697 if (ret) { 1698 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret); 1699 return -1; 1700 } 1701 1702 /* Disable link before setting configuration */ 1703 dpaa2_dev_set_link_down(dev); 1704 1705 /* Based on fc_conf, update cfg */ 1706 cfg.rate = state.rate; 1707 cfg.options = state.options; 1708 1709 /* update cfg with fc_conf */ 1710 switch (fc_conf->mode) { 1711 case RTE_FC_FULL: 1712 /* Full flow control; 1713 * OPT_PAUSE set, ASYM_PAUSE not set 1714 */ 1715 cfg.options |= DPNI_LINK_OPT_PAUSE; 1716 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE; 1717 break; 1718 case RTE_FC_TX_PAUSE: 1719 /* Enable RX flow control 1720 * OPT_PAUSE not set; 1721 * ASYM_PAUSE set; 1722 */ 1723 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE; 1724 cfg.options &= ~DPNI_LINK_OPT_PAUSE; 1725 break; 1726 case RTE_FC_RX_PAUSE: 1727 /* Enable TX Flow control 1728 * OPT_PAUSE set 1729 * ASYM_PAUSE set 1730 */ 1731 cfg.options |= DPNI_LINK_OPT_PAUSE; 1732 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE; 1733 break; 1734 case RTE_FC_NONE: 1735 /* Disable Flow control 1736 * OPT_PAUSE not set 1737 * ASYM_PAUSE not set 1738 */ 1739 cfg.options &= ~DPNI_LINK_OPT_PAUSE; 1740 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE; 1741 break; 1742 default: 1743 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)", 1744 fc_conf->mode); 1745 return -1; 1746 } 1747 1748 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg); 1749 if (ret) 1750 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)", 1751 ret); 1752 1753 /* Enable link */ 1754 dpaa2_dev_set_link_up(dev); 1755 1756 return ret; 1757 } 1758 1759 static int 1760 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev, 1761 struct rte_eth_rss_conf *rss_conf) 1762 { 1763 struct rte_eth_dev_data *data = dev->data; 1764 struct rte_eth_conf *eth_conf = &data->dev_conf; 1765 int ret; 1766 1767 PMD_INIT_FUNC_TRACE(); 1768 1769 if (rss_conf->rss_hf) { 1770 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf); 1771 if (ret) { 1772 DPAA2_PMD_ERR("Unable to set flow dist"); 1773 return ret; 1774 } 1775 } else { 1776 ret = dpaa2_remove_flow_dist(dev, 0); 1777 if (ret) { 1778 DPAA2_PMD_ERR("Unable to remove flow dist"); 1779 return ret; 1780 } 1781 } 1782 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf; 1783 return 0; 1784 } 1785 1786 static int 1787 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1788 struct rte_eth_rss_conf *rss_conf) 1789 { 1790 struct rte_eth_dev_data *data = dev->data; 1791 struct rte_eth_conf *eth_conf = &data->dev_conf; 1792 1793 /* dpaa2 does not support rss_key, so length should be 0*/ 1794 rss_conf->rss_key_len = 0; 1795 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf; 1796 return 0; 1797 } 1798 1799 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev, 1800 int eth_rx_queue_id, 1801 uint16_t dpcon_id, 1802 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf) 1803 { 1804 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; 1805 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw; 1806 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; 1807 uint8_t flow_id = dpaa2_ethq->flow_id; 1808 struct dpni_queue cfg; 1809 uint8_t options; 1810 int ret; 1811 1812 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL) 1813 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event; 1814 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) 1815 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event; 1816 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED) 1817 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event; 1818 else 1819 return -EINVAL; 1820 1821 memset(&cfg, 0, sizeof(struct dpni_queue)); 1822 options = DPNI_QUEUE_OPT_DEST; 1823 cfg.destination.type = DPNI_DEST_DPCON; 1824 cfg.destination.id = dpcon_id; 1825 cfg.destination.priority = queue_conf->ev.priority; 1826 1827 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) { 1828 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE; 1829 cfg.destination.hold_active = 1; 1830 } 1831 1832 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED && 1833 !eth_priv->en_ordered) { 1834 struct opr_cfg ocfg; 1835 1836 /* Restoration window size = 256 frames */ 1837 ocfg.oprrws = 3; 1838 /* Restoration window size = 512 frames for LX2 */ 1839 if (dpaa2_svr_family == SVR_LX2160A) 1840 ocfg.oprrws = 4; 1841 /* Auto advance NESN window enabled */ 1842 ocfg.oa = 1; 1843 /* Late arrival window size disabled */ 1844 ocfg.olws = 0; 1845 /* ORL resource exhaustaion advance NESN disabled */ 1846 ocfg.oeane = 0; 1847 /* Loose ordering enabled */ 1848 ocfg.oloe = 1; 1849 eth_priv->en_loose_ordered = 1; 1850 /* Strict ordering enabled if explicitly set */ 1851 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) { 1852 ocfg.oloe = 0; 1853 eth_priv->en_loose_ordered = 0; 1854 } 1855 1856 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token, 1857 dpaa2_ethq->tc_index, flow_id, 1858 OPR_OPT_CREATE, &ocfg); 1859 if (ret) { 1860 DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret); 1861 return ret; 1862 } 1863 1864 eth_priv->en_ordered = 1; 1865 } 1866 1867 options |= DPNI_QUEUE_OPT_USER_CTX; 1868 cfg.user_context = (size_t)(dpaa2_ethq); 1869 1870 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX, 1871 dpaa2_ethq->tc_index, flow_id, options, &cfg); 1872 if (ret) { 1873 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret); 1874 return ret; 1875 } 1876 1877 memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event)); 1878 1879 return 0; 1880 } 1881 1882 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev, 1883 int eth_rx_queue_id) 1884 { 1885 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; 1886 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw; 1887 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; 1888 uint8_t flow_id = dpaa2_ethq->flow_id; 1889 struct dpni_queue cfg; 1890 uint8_t options; 1891 int ret; 1892 1893 memset(&cfg, 0, sizeof(struct dpni_queue)); 1894 options = DPNI_QUEUE_OPT_DEST; 1895 cfg.destination.type = DPNI_DEST_NONE; 1896 1897 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX, 1898 dpaa2_ethq->tc_index, flow_id, options, &cfg); 1899 if (ret) 1900 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret); 1901 1902 return ret; 1903 } 1904 1905 static inline int 1906 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op) 1907 { 1908 unsigned int i; 1909 1910 for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) { 1911 if (dpaa2_supported_filter_ops[i] == filter_op) 1912 return 0; 1913 } 1914 return -ENOTSUP; 1915 } 1916 1917 static int 1918 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev, 1919 enum rte_filter_type filter_type, 1920 enum rte_filter_op filter_op, 1921 void *arg) 1922 { 1923 int ret = 0; 1924 1925 if (!dev) 1926 return -ENODEV; 1927 1928 switch (filter_type) { 1929 case RTE_ETH_FILTER_GENERIC: 1930 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) { 1931 ret = -ENOTSUP; 1932 break; 1933 } 1934 *(const void **)arg = &dpaa2_flow_ops; 1935 dpaa2_filter_type |= filter_type; 1936 break; 1937 default: 1938 RTE_LOG(ERR, PMD, "Filter type (%d) not supported", 1939 filter_type); 1940 ret = -ENOTSUP; 1941 break; 1942 } 1943 return ret; 1944 } 1945 1946 static struct eth_dev_ops dpaa2_ethdev_ops = { 1947 .dev_configure = dpaa2_eth_dev_configure, 1948 .dev_start = dpaa2_dev_start, 1949 .dev_stop = dpaa2_dev_stop, 1950 .dev_close = dpaa2_dev_close, 1951 .promiscuous_enable = dpaa2_dev_promiscuous_enable, 1952 .promiscuous_disable = dpaa2_dev_promiscuous_disable, 1953 .allmulticast_enable = dpaa2_dev_allmulticast_enable, 1954 .allmulticast_disable = dpaa2_dev_allmulticast_disable, 1955 .dev_set_link_up = dpaa2_dev_set_link_up, 1956 .dev_set_link_down = dpaa2_dev_set_link_down, 1957 .link_update = dpaa2_dev_link_update, 1958 .stats_get = dpaa2_dev_stats_get, 1959 .xstats_get = dpaa2_dev_xstats_get, 1960 .xstats_get_by_id = dpaa2_xstats_get_by_id, 1961 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id, 1962 .xstats_get_names = dpaa2_xstats_get_names, 1963 .stats_reset = dpaa2_dev_stats_reset, 1964 .xstats_reset = dpaa2_dev_stats_reset, 1965 .fw_version_get = dpaa2_fw_version_get, 1966 .dev_infos_get = dpaa2_dev_info_get, 1967 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get, 1968 .mtu_set = dpaa2_dev_mtu_set, 1969 .vlan_filter_set = dpaa2_vlan_filter_set, 1970 .vlan_offload_set = dpaa2_vlan_offload_set, 1971 .vlan_tpid_set = dpaa2_vlan_tpid_set, 1972 .rx_queue_setup = dpaa2_dev_rx_queue_setup, 1973 .rx_queue_release = dpaa2_dev_rx_queue_release, 1974 .tx_queue_setup = dpaa2_dev_tx_queue_setup, 1975 .tx_queue_release = dpaa2_dev_tx_queue_release, 1976 .rx_queue_count = dpaa2_dev_rx_queue_count, 1977 .flow_ctrl_get = dpaa2_flow_ctrl_get, 1978 .flow_ctrl_set = dpaa2_flow_ctrl_set, 1979 .mac_addr_add = dpaa2_dev_add_mac_addr, 1980 .mac_addr_remove = dpaa2_dev_remove_mac_addr, 1981 .mac_addr_set = dpaa2_dev_set_mac_addr, 1982 .rss_hash_update = dpaa2_dev_rss_hash_update, 1983 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get, 1984 .filter_ctrl = dpaa2_dev_flow_ctrl, 1985 }; 1986 1987 /* Populate the mac address from physically available (u-boot/firmware) and/or 1988 * one set by higher layers like MC (restool) etc. 1989 * Returns the table of MAC entries (multiple entries) 1990 */ 1991 static int 1992 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv, 1993 struct ether_addr *mac_entry) 1994 { 1995 int ret; 1996 struct ether_addr phy_mac, prime_mac; 1997 1998 memset(&phy_mac, 0, sizeof(struct ether_addr)); 1999 memset(&prime_mac, 0, sizeof(struct ether_addr)); 2000 2001 /* Get the physical device MAC address */ 2002 ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token, 2003 phy_mac.addr_bytes); 2004 if (ret) { 2005 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret); 2006 goto cleanup; 2007 } 2008 2009 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token, 2010 prime_mac.addr_bytes); 2011 if (ret) { 2012 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret); 2013 goto cleanup; 2014 } 2015 2016 /* Now that both MAC have been obtained, do: 2017 * if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy 2018 * and return phy 2019 * If empty_mac(phy), return prime. 2020 * if both are empty, create random MAC, set as prime and return 2021 */ 2022 if (!is_zero_ether_addr(&phy_mac)) { 2023 /* If the addresses are not same, overwrite prime */ 2024 if (!is_same_ether_addr(&phy_mac, &prime_mac)) { 2025 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW, 2026 priv->token, 2027 phy_mac.addr_bytes); 2028 if (ret) { 2029 DPAA2_PMD_ERR("Unable to set MAC Address: %d", 2030 ret); 2031 goto cleanup; 2032 } 2033 memcpy(&prime_mac, &phy_mac, sizeof(struct ether_addr)); 2034 } 2035 } else if (is_zero_ether_addr(&prime_mac)) { 2036 /* In case phys and prime, both are zero, create random MAC */ 2037 eth_random_addr(prime_mac.addr_bytes); 2038 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW, 2039 priv->token, 2040 prime_mac.addr_bytes); 2041 if (ret) { 2042 DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret); 2043 goto cleanup; 2044 } 2045 } 2046 2047 /* prime_mac the final MAC address */ 2048 memcpy(mac_entry, &prime_mac, sizeof(struct ether_addr)); 2049 return 0; 2050 2051 cleanup: 2052 return -1; 2053 } 2054 2055 static int 2056 check_devargs_handler(__rte_unused const char *key, const char *value, 2057 __rte_unused void *opaque) 2058 { 2059 if (strcmp(value, "1")) 2060 return -1; 2061 2062 return 0; 2063 } 2064 2065 static int 2066 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key) 2067 { 2068 struct rte_kvargs *kvlist; 2069 2070 if (!devargs) 2071 return 0; 2072 2073 kvlist = rte_kvargs_parse(devargs->args, NULL); 2074 if (!kvlist) 2075 return 0; 2076 2077 if (!rte_kvargs_count(kvlist, key)) { 2078 rte_kvargs_free(kvlist); 2079 return 0; 2080 } 2081 2082 if (rte_kvargs_process(kvlist, key, 2083 check_devargs_handler, NULL) < 0) { 2084 rte_kvargs_free(kvlist); 2085 return 0; 2086 } 2087 rte_kvargs_free(kvlist); 2088 2089 return 1; 2090 } 2091 2092 static int 2093 dpaa2_dev_init(struct rte_eth_dev *eth_dev) 2094 { 2095 struct rte_device *dev = eth_dev->device; 2096 struct rte_dpaa2_device *dpaa2_dev; 2097 struct fsl_mc_io *dpni_dev; 2098 struct dpni_attr attr; 2099 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 2100 struct dpni_buffer_layout layout; 2101 int ret, hw_id, i; 2102 2103 PMD_INIT_FUNC_TRACE(); 2104 2105 /* For secondary processes, the primary has done all the work */ 2106 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 2107 /* In case of secondary, only burst and ops API need to be 2108 * plugged. 2109 */ 2110 eth_dev->dev_ops = &dpaa2_ethdev_ops; 2111 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) 2112 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx; 2113 else 2114 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx; 2115 eth_dev->tx_pkt_burst = dpaa2_dev_tx; 2116 return 0; 2117 } 2118 2119 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device); 2120 2121 hw_id = dpaa2_dev->object_id; 2122 2123 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0); 2124 if (!dpni_dev) { 2125 DPAA2_PMD_ERR("Memory allocation failed for dpni device"); 2126 return -1; 2127 } 2128 2129 dpni_dev->regs = rte_mcp_ptr_list[0]; 2130 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token); 2131 if (ret) { 2132 DPAA2_PMD_ERR( 2133 "Failure in opening dpni@%d with err code %d", 2134 hw_id, ret); 2135 rte_free(dpni_dev); 2136 return -1; 2137 } 2138 2139 /* Clean the device first */ 2140 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token); 2141 if (ret) { 2142 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d", 2143 hw_id, ret); 2144 goto init_err; 2145 } 2146 2147 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr); 2148 if (ret) { 2149 DPAA2_PMD_ERR( 2150 "Failure in get dpni@%d attribute, err code %d", 2151 hw_id, ret); 2152 goto init_err; 2153 } 2154 2155 priv->num_rx_tc = attr.num_rx_tcs; 2156 2157 for (i = 0; i < attr.num_rx_tcs; i++) 2158 priv->nb_rx_queues += attr.num_queues; 2159 2160 /* Using number of TX queues as number of TX TCs */ 2161 priv->nb_tx_queues = attr.num_tx_tcs; 2162 2163 DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d", 2164 priv->num_rx_tc, priv->nb_rx_queues, 2165 priv->nb_tx_queues); 2166 2167 priv->hw = dpni_dev; 2168 priv->hw_id = hw_id; 2169 priv->options = attr.options; 2170 priv->max_mac_filters = attr.mac_filter_entries; 2171 priv->max_vlan_filters = attr.vlan_filter_entries; 2172 priv->flags = 0; 2173 2174 /* Allocate memory for hardware structure for queues */ 2175 ret = dpaa2_alloc_rx_tx_queues(eth_dev); 2176 if (ret) { 2177 DPAA2_PMD_ERR("Queue allocation Failed"); 2178 goto init_err; 2179 } 2180 2181 /* Allocate memory for storing MAC addresses. 2182 * Table of mac_filter_entries size is allocated so that RTE ether lib 2183 * can add MAC entries when rte_eth_dev_mac_addr_add is called. 2184 */ 2185 eth_dev->data->mac_addrs = rte_zmalloc("dpni", 2186 ETHER_ADDR_LEN * attr.mac_filter_entries, 0); 2187 if (eth_dev->data->mac_addrs == NULL) { 2188 DPAA2_PMD_ERR( 2189 "Failed to allocate %d bytes needed to store MAC addresses", 2190 ETHER_ADDR_LEN * attr.mac_filter_entries); 2191 ret = -ENOMEM; 2192 goto init_err; 2193 } 2194 2195 ret = populate_mac_addr(dpni_dev, priv, ð_dev->data->mac_addrs[0]); 2196 if (ret) { 2197 DPAA2_PMD_ERR("Unable to fetch MAC Address for device"); 2198 rte_free(eth_dev->data->mac_addrs); 2199 eth_dev->data->mac_addrs = NULL; 2200 goto init_err; 2201 } 2202 2203 /* ... tx buffer layout ... */ 2204 memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 2205 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 2206 layout.pass_frame_status = 1; 2207 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 2208 DPNI_QUEUE_TX, &layout); 2209 if (ret) { 2210 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret); 2211 goto init_err; 2212 } 2213 2214 /* ... tx-conf and error buffer layout ... */ 2215 memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 2216 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 2217 layout.pass_frame_status = 1; 2218 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 2219 DPNI_QUEUE_TX_CONFIRM, &layout); 2220 if (ret) { 2221 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout", 2222 ret); 2223 goto init_err; 2224 } 2225 2226 eth_dev->dev_ops = &dpaa2_ethdev_ops; 2227 2228 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) { 2229 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx; 2230 DPAA2_PMD_INFO("Loopback mode"); 2231 } else { 2232 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx; 2233 } 2234 eth_dev->tx_pkt_burst = dpaa2_dev_tx; 2235 2236 /*Init fields w.r.t. classficaition*/ 2237 memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg)); 2238 priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64); 2239 if (!priv->extract.qos_extract_param) { 2240 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow " 2241 " classificaiton ", ret); 2242 goto init_err; 2243 } 2244 for (i = 0; i < MAX_TCS; i++) { 2245 memset(&priv->extract.fs_key_cfg[i], 0, 2246 sizeof(struct dpkg_profile_cfg)); 2247 priv->extract.fs_extract_param[i] = 2248 (size_t)rte_malloc(NULL, 256, 64); 2249 if (!priv->extract.fs_extract_param[i]) { 2250 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton", 2251 ret); 2252 goto init_err; 2253 } 2254 } 2255 2256 RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name); 2257 return 0; 2258 init_err: 2259 dpaa2_dev_uninit(eth_dev); 2260 return ret; 2261 } 2262 2263 static int 2264 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev) 2265 { 2266 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 2267 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 2268 int i, ret; 2269 2270 PMD_INIT_FUNC_TRACE(); 2271 2272 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2273 return 0; 2274 2275 if (!dpni) { 2276 DPAA2_PMD_WARN("Already closed or not started"); 2277 return -1; 2278 } 2279 2280 dpaa2_dev_close(eth_dev); 2281 2282 dpaa2_free_rx_tx_queues(eth_dev); 2283 2284 /* Close the device at underlying layer*/ 2285 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token); 2286 if (ret) { 2287 DPAA2_PMD_ERR( 2288 "Failure closing dpni device with err code %d", 2289 ret); 2290 } 2291 2292 /* Free the allocated memory for ethernet private data and dpni*/ 2293 priv->hw = NULL; 2294 rte_free(dpni); 2295 2296 for (i = 0; i < MAX_TCS; i++) { 2297 if (priv->extract.fs_extract_param[i]) 2298 rte_free((void *)(size_t)priv->extract.fs_extract_param[i]); 2299 } 2300 2301 if (priv->extract.qos_extract_param) 2302 rte_free((void *)(size_t)priv->extract.qos_extract_param); 2303 2304 eth_dev->dev_ops = NULL; 2305 eth_dev->rx_pkt_burst = NULL; 2306 eth_dev->tx_pkt_burst = NULL; 2307 2308 DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name); 2309 return 0; 2310 } 2311 2312 static int 2313 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv, 2314 struct rte_dpaa2_device *dpaa2_dev) 2315 { 2316 struct rte_eth_dev *eth_dev; 2317 int diag; 2318 2319 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2320 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name); 2321 if (!eth_dev) 2322 return -ENODEV; 2323 eth_dev->data->dev_private = rte_zmalloc( 2324 "ethdev private structure", 2325 sizeof(struct dpaa2_dev_priv), 2326 RTE_CACHE_LINE_SIZE); 2327 if (eth_dev->data->dev_private == NULL) { 2328 DPAA2_PMD_CRIT( 2329 "Unable to allocate memory for private data"); 2330 rte_eth_dev_release_port(eth_dev); 2331 return -ENOMEM; 2332 } 2333 } else { 2334 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name); 2335 if (!eth_dev) 2336 return -ENODEV; 2337 } 2338 2339 eth_dev->device = &dpaa2_dev->device; 2340 2341 dpaa2_dev->eth_dev = eth_dev; 2342 eth_dev->data->rx_mbuf_alloc_failed = 0; 2343 2344 if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC) 2345 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2346 2347 /* Invoke PMD device initialization function */ 2348 diag = dpaa2_dev_init(eth_dev); 2349 if (diag == 0) { 2350 rte_eth_dev_probing_finish(eth_dev); 2351 return 0; 2352 } 2353 2354 rte_eth_dev_release_port(eth_dev); 2355 return diag; 2356 } 2357 2358 static int 2359 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev) 2360 { 2361 struct rte_eth_dev *eth_dev; 2362 2363 eth_dev = dpaa2_dev->eth_dev; 2364 dpaa2_dev_uninit(eth_dev); 2365 2366 rte_eth_dev_release_port(eth_dev); 2367 2368 return 0; 2369 } 2370 2371 static struct rte_dpaa2_driver rte_dpaa2_pmd = { 2372 .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA, 2373 .drv_type = DPAA2_ETH, 2374 .probe = rte_dpaa2_probe, 2375 .remove = rte_dpaa2_remove, 2376 }; 2377 2378 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd); 2379 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2, 2380 DRIVER_LOOPBACK_MODE "=<int>"); 2381 RTE_INIT(dpaa2_pmd_init_log) 2382 { 2383 dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2"); 2384 if (dpaa2_logtype_pmd >= 0) 2385 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE); 2386 } 2387