1 /* * SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved. 4 * Copyright 2016 NXP 5 * 6 */ 7 8 #include <time.h> 9 #include <net/if.h> 10 11 #include <rte_mbuf.h> 12 #include <rte_ethdev_driver.h> 13 #include <rte_malloc.h> 14 #include <rte_memcpy.h> 15 #include <rte_string_fns.h> 16 #include <rte_cycles.h> 17 #include <rte_kvargs.h> 18 #include <rte_dev.h> 19 #include <rte_fslmc.h> 20 21 #include "dpaa2_pmd_logs.h" 22 #include <fslmc_vfio.h> 23 #include <dpaa2_hw_pvt.h> 24 #include <dpaa2_hw_mempool.h> 25 #include <dpaa2_hw_dpio.h> 26 #include <mc/fsl_dpmng.h> 27 #include "dpaa2_ethdev.h" 28 #include <fsl_qbman_debug.h> 29 30 /* Supported Rx offloads */ 31 static uint64_t dev_rx_offloads_sup = 32 DEV_RX_OFFLOAD_VLAN_STRIP | 33 DEV_RX_OFFLOAD_IPV4_CKSUM | 34 DEV_RX_OFFLOAD_UDP_CKSUM | 35 DEV_RX_OFFLOAD_TCP_CKSUM | 36 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 37 DEV_RX_OFFLOAD_VLAN_FILTER | 38 DEV_RX_OFFLOAD_JUMBO_FRAME; 39 40 /* Rx offloads which cannot be disabled */ 41 static uint64_t dev_rx_offloads_nodis = 42 DEV_RX_OFFLOAD_SCATTER; 43 44 /* Supported Tx offloads */ 45 static uint64_t dev_tx_offloads_sup = 46 DEV_TX_OFFLOAD_VLAN_INSERT | 47 DEV_TX_OFFLOAD_IPV4_CKSUM | 48 DEV_TX_OFFLOAD_UDP_CKSUM | 49 DEV_TX_OFFLOAD_TCP_CKSUM | 50 DEV_TX_OFFLOAD_SCTP_CKSUM | 51 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM; 52 53 /* Tx offloads which cannot be disabled */ 54 static uint64_t dev_tx_offloads_nodis = 55 DEV_TX_OFFLOAD_MULTI_SEGS | 56 DEV_TX_OFFLOAD_MT_LOCKFREE | 57 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 58 59 struct rte_dpaa2_xstats_name_off { 60 char name[RTE_ETH_XSTATS_NAME_SIZE]; 61 uint8_t page_id; /* dpni statistics page id */ 62 uint8_t stats_id; /* stats id in the given page */ 63 }; 64 65 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = { 66 {"ingress_multicast_frames", 0, 2}, 67 {"ingress_multicast_bytes", 0, 3}, 68 {"ingress_broadcast_frames", 0, 4}, 69 {"ingress_broadcast_bytes", 0, 5}, 70 {"egress_multicast_frames", 1, 2}, 71 {"egress_multicast_bytes", 1, 3}, 72 {"egress_broadcast_frames", 1, 4}, 73 {"egress_broadcast_bytes", 1, 5}, 74 {"ingress_filtered_frames", 2, 0}, 75 {"ingress_discarded_frames", 2, 1}, 76 {"ingress_nobuffer_discards", 2, 2}, 77 {"egress_discarded_frames", 2, 3}, 78 {"egress_confirmed_frames", 2, 4}, 79 }; 80 81 static struct rte_dpaa2_driver rte_dpaa2_pmd; 82 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev); 83 static int dpaa2_dev_link_update(struct rte_eth_dev *dev, 84 int wait_to_complete); 85 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev); 86 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev); 87 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 88 89 int dpaa2_logtype_pmd; 90 91 static int 92 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 93 { 94 int ret; 95 struct dpaa2_dev_priv *priv = dev->data->dev_private; 96 struct fsl_mc_io *dpni = priv->hw; 97 98 PMD_INIT_FUNC_TRACE(); 99 100 if (dpni == NULL) { 101 DPAA2_PMD_ERR("dpni is NULL"); 102 return -1; 103 } 104 105 if (on) 106 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, 107 priv->token, vlan_id); 108 else 109 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW, 110 priv->token, vlan_id); 111 112 if (ret < 0) 113 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d", 114 ret, vlan_id, priv->hw_id); 115 116 return ret; 117 } 118 119 static int 120 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask) 121 { 122 struct dpaa2_dev_priv *priv = dev->data->dev_private; 123 struct fsl_mc_io *dpni = priv->hw; 124 int ret; 125 126 PMD_INIT_FUNC_TRACE(); 127 128 if (mask & ETH_VLAN_FILTER_MASK) { 129 /* VLAN Filter not avaialble */ 130 if (!priv->max_vlan_filters) { 131 DPAA2_PMD_INFO("VLAN filter not available"); 132 goto next_mask; 133 } 134 135 if (dev->data->dev_conf.rxmode.offloads & 136 DEV_RX_OFFLOAD_VLAN_FILTER) 137 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW, 138 priv->token, true); 139 else 140 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW, 141 priv->token, false); 142 if (ret < 0) 143 DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret); 144 } 145 next_mask: 146 if (mask & ETH_VLAN_EXTEND_MASK) { 147 if (dev->data->dev_conf.rxmode.offloads & 148 DEV_RX_OFFLOAD_VLAN_EXTEND) 149 DPAA2_PMD_INFO("VLAN extend offload not supported"); 150 } 151 152 return 0; 153 } 154 155 static int 156 dpaa2_fw_version_get(struct rte_eth_dev *dev, 157 char *fw_version, 158 size_t fw_size) 159 { 160 int ret; 161 struct dpaa2_dev_priv *priv = dev->data->dev_private; 162 struct fsl_mc_io *dpni = priv->hw; 163 struct mc_soc_version mc_plat_info = {0}; 164 struct mc_version mc_ver_info = {0}; 165 166 PMD_INIT_FUNC_TRACE(); 167 168 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info)) 169 DPAA2_PMD_WARN("\tmc_get_soc_version failed"); 170 171 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info)) 172 DPAA2_PMD_WARN("\tmc_get_version failed"); 173 174 ret = snprintf(fw_version, fw_size, 175 "%x-%d.%d.%d", 176 mc_plat_info.svr, 177 mc_ver_info.major, 178 mc_ver_info.minor, 179 mc_ver_info.revision); 180 181 ret += 1; /* add the size of '\0' */ 182 if (fw_size < (uint32_t)ret) 183 return ret; 184 else 185 return 0; 186 } 187 188 static void 189 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 190 { 191 struct dpaa2_dev_priv *priv = dev->data->dev_private; 192 193 PMD_INIT_FUNC_TRACE(); 194 195 dev_info->if_index = priv->hw_id; 196 197 dev_info->max_mac_addrs = priv->max_mac_filters; 198 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN; 199 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE; 200 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues; 201 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues; 202 dev_info->rx_offload_capa = dev_rx_offloads_sup | 203 dev_rx_offloads_nodis; 204 dev_info->tx_offload_capa = dev_tx_offloads_sup | 205 dev_tx_offloads_nodis; 206 dev_info->speed_capa = ETH_LINK_SPEED_1G | 207 ETH_LINK_SPEED_2_5G | 208 ETH_LINK_SPEED_10G; 209 210 dev_info->max_hash_mac_addrs = 0; 211 dev_info->max_vfs = 0; 212 dev_info->max_vmdq_pools = ETH_16_POOLS; 213 dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL; 214 } 215 216 static int 217 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev) 218 { 219 struct dpaa2_dev_priv *priv = dev->data->dev_private; 220 uint16_t dist_idx; 221 uint32_t vq_id; 222 struct dpaa2_queue *mc_q, *mcq; 223 uint32_t tot_queues; 224 int i; 225 struct dpaa2_queue *dpaa2_q; 226 227 PMD_INIT_FUNC_TRACE(); 228 229 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues; 230 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues, 231 RTE_CACHE_LINE_SIZE); 232 if (!mc_q) { 233 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues"); 234 return -1; 235 } 236 237 for (i = 0; i < priv->nb_rx_queues; i++) { 238 mc_q->dev = dev; 239 priv->rx_vq[i] = mc_q++; 240 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 241 dpaa2_q->q_storage = rte_malloc("dq_storage", 242 sizeof(struct queue_storage_info_t), 243 RTE_CACHE_LINE_SIZE); 244 if (!dpaa2_q->q_storage) 245 goto fail; 246 247 memset(dpaa2_q->q_storage, 0, 248 sizeof(struct queue_storage_info_t)); 249 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage)) 250 goto fail; 251 } 252 253 for (i = 0; i < priv->nb_tx_queues; i++) { 254 mc_q->dev = dev; 255 mc_q->flow_id = 0xffff; 256 priv->tx_vq[i] = mc_q++; 257 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 258 dpaa2_q->cscn = rte_malloc(NULL, 259 sizeof(struct qbman_result), 16); 260 if (!dpaa2_q->cscn) 261 goto fail_tx; 262 } 263 264 vq_id = 0; 265 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) { 266 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id]; 267 mcq->tc_index = DPAA2_DEF_TC; 268 mcq->flow_id = dist_idx; 269 vq_id++; 270 } 271 272 return 0; 273 fail_tx: 274 i -= 1; 275 while (i >= 0) { 276 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 277 rte_free(dpaa2_q->cscn); 278 priv->tx_vq[i--] = NULL; 279 } 280 i = priv->nb_rx_queues; 281 fail: 282 i -= 1; 283 mc_q = priv->rx_vq[0]; 284 while (i >= 0) { 285 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 286 dpaa2_free_dq_storage(dpaa2_q->q_storage); 287 rte_free(dpaa2_q->q_storage); 288 priv->rx_vq[i--] = NULL; 289 } 290 rte_free(mc_q); 291 return -1; 292 } 293 294 static int 295 dpaa2_eth_dev_configure(struct rte_eth_dev *dev) 296 { 297 struct dpaa2_dev_priv *priv = dev->data->dev_private; 298 struct fsl_mc_io *dpni = priv->hw; 299 struct rte_eth_conf *eth_conf = &dev->data->dev_conf; 300 uint64_t rx_offloads = eth_conf->rxmode.offloads; 301 uint64_t tx_offloads = eth_conf->txmode.offloads; 302 int rx_l3_csum_offload = false; 303 int rx_l4_csum_offload = false; 304 int tx_l3_csum_offload = false; 305 int tx_l4_csum_offload = false; 306 int ret; 307 308 PMD_INIT_FUNC_TRACE(); 309 310 /* Rx offloads validation */ 311 if (dev_rx_offloads_nodis & ~rx_offloads) { 312 DPAA2_PMD_WARN( 313 "Rx offloads non configurable - requested 0x%" PRIx64 314 " ignored 0x%" PRIx64, 315 rx_offloads, dev_rx_offloads_nodis); 316 } 317 318 /* Tx offloads validation */ 319 if (dev_tx_offloads_nodis & ~tx_offloads) { 320 DPAA2_PMD_WARN( 321 "Tx offloads non configurable - requested 0x%" PRIx64 322 " ignored 0x%" PRIx64, 323 tx_offloads, dev_tx_offloads_nodis); 324 } 325 326 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 327 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) { 328 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, 329 priv->token, eth_conf->rxmode.max_rx_pkt_len); 330 if (ret) { 331 DPAA2_PMD_ERR( 332 "Unable to set mtu. check config"); 333 return ret; 334 } 335 } else { 336 return -1; 337 } 338 } 339 340 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) { 341 ret = dpaa2_setup_flow_dist(dev, 342 eth_conf->rx_adv_conf.rss_conf.rss_hf); 343 if (ret) { 344 DPAA2_PMD_ERR("Unable to set flow distribution." 345 "Check queue config"); 346 return ret; 347 } 348 } 349 350 if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM) 351 rx_l3_csum_offload = true; 352 353 if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) || 354 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM)) 355 rx_l4_csum_offload = true; 356 357 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 358 DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload); 359 if (ret) { 360 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret); 361 return ret; 362 } 363 364 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 365 DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload); 366 if (ret) { 367 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret); 368 return ret; 369 } 370 371 if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM) 372 tx_l3_csum_offload = true; 373 374 if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) || 375 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) || 376 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM)) 377 tx_l4_csum_offload = true; 378 379 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 380 DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload); 381 if (ret) { 382 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret); 383 return ret; 384 } 385 386 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 387 DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload); 388 if (ret) { 389 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret); 390 return ret; 391 } 392 393 /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in 394 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC] 395 * to 0 for LS2 in the hardware thus disabling data/annotation 396 * stashing. For LX2 this is fixed in hardware and thus hash result and 397 * parse results can be received in FD using this option. 398 */ 399 if (dpaa2_svr_family == SVR_LX2160A) { 400 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 401 DPNI_FLCTYPE_HASH, true); 402 if (ret) { 403 DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret); 404 return ret; 405 } 406 } 407 408 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK); 409 410 /* update the current status */ 411 dpaa2_dev_link_update(dev, 0); 412 413 return 0; 414 } 415 416 /* Function to setup RX flow information. It contains traffic class ID, 417 * flow ID, destination configuration etc. 418 */ 419 static int 420 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, 421 uint16_t rx_queue_id, 422 uint16_t nb_rx_desc __rte_unused, 423 unsigned int socket_id __rte_unused, 424 const struct rte_eth_rxconf *rx_conf __rte_unused, 425 struct rte_mempool *mb_pool) 426 { 427 struct dpaa2_dev_priv *priv = dev->data->dev_private; 428 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 429 struct dpaa2_queue *dpaa2_q; 430 struct dpni_queue cfg; 431 uint8_t options = 0; 432 uint8_t flow_id; 433 uint32_t bpid; 434 int ret; 435 436 PMD_INIT_FUNC_TRACE(); 437 438 DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p", 439 dev, rx_queue_id, mb_pool, rx_conf); 440 441 if (!priv->bp_list || priv->bp_list->mp != mb_pool) { 442 bpid = mempool_to_bpid(mb_pool); 443 ret = dpaa2_attach_bp_list(priv, 444 rte_dpaa2_bpid_info[bpid].bp_list); 445 if (ret) 446 return ret; 447 } 448 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 449 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */ 450 451 /*Get the flow id from given VQ id*/ 452 flow_id = rx_queue_id % priv->nb_rx_queues; 453 memset(&cfg, 0, sizeof(struct dpni_queue)); 454 455 options = options | DPNI_QUEUE_OPT_USER_CTX; 456 cfg.user_context = (size_t)(dpaa2_q); 457 458 /*if ls2088 or rev2 device, enable the stashing */ 459 460 if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) { 461 options |= DPNI_QUEUE_OPT_FLC; 462 cfg.flc.stash_control = true; 463 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0; 464 /* 00 00 00 - last 6 bit represent annotation, context stashing, 465 * data stashing setting 01 01 00 (0x14) 466 * (in following order ->DS AS CS) 467 * to enable 1 line data, 1 line annotation. 468 * For LX2, this setting should be 01 00 00 (0x10) 469 */ 470 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A) 471 cfg.flc.value |= 0x10; 472 else 473 cfg.flc.value |= 0x14; 474 } 475 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX, 476 dpaa2_q->tc_index, flow_id, options, &cfg); 477 if (ret) { 478 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret); 479 return -1; 480 } 481 482 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) { 483 struct dpni_taildrop taildrop; 484 485 taildrop.enable = 1; 486 /*enabling per rx queue congestion control */ 487 taildrop.threshold = CONG_THRESHOLD_RX_Q; 488 taildrop.units = DPNI_CONGESTION_UNIT_BYTES; 489 taildrop.oal = CONG_RX_OAL; 490 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d", 491 rx_queue_id); 492 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token, 493 DPNI_CP_QUEUE, DPNI_QUEUE_RX, 494 dpaa2_q->tc_index, flow_id, &taildrop); 495 if (ret) { 496 DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)", 497 ret); 498 return -1; 499 } 500 } 501 502 dev->data->rx_queues[rx_queue_id] = dpaa2_q; 503 return 0; 504 } 505 506 static int 507 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, 508 uint16_t tx_queue_id, 509 uint16_t nb_tx_desc __rte_unused, 510 unsigned int socket_id __rte_unused, 511 const struct rte_eth_txconf *tx_conf __rte_unused) 512 { 513 struct dpaa2_dev_priv *priv = dev->data->dev_private; 514 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *) 515 priv->tx_vq[tx_queue_id]; 516 struct fsl_mc_io *dpni = priv->hw; 517 struct dpni_queue tx_conf_cfg; 518 struct dpni_queue tx_flow_cfg; 519 uint8_t options = 0, flow_id; 520 uint32_t tc_id; 521 int ret; 522 523 PMD_INIT_FUNC_TRACE(); 524 525 /* Return if queue already configured */ 526 if (dpaa2_q->flow_id != 0xffff) { 527 dev->data->tx_queues[tx_queue_id] = dpaa2_q; 528 return 0; 529 } 530 531 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue)); 532 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue)); 533 534 tc_id = tx_queue_id; 535 flow_id = 0; 536 537 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX, 538 tc_id, flow_id, options, &tx_flow_cfg); 539 if (ret) { 540 DPAA2_PMD_ERR("Error in setting the tx flow: " 541 "tc_id=%d, flow=%d err=%d", 542 tc_id, flow_id, ret); 543 return -1; 544 } 545 546 dpaa2_q->flow_id = flow_id; 547 548 if (tx_queue_id == 0) { 549 /*Set tx-conf and error configuration*/ 550 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW, 551 priv->token, 552 DPNI_CONF_DISABLE); 553 if (ret) { 554 DPAA2_PMD_ERR("Error in set tx conf mode settings: " 555 "err=%d", ret); 556 return -1; 557 } 558 } 559 dpaa2_q->tc_index = tc_id; 560 561 if (!(priv->flags & DPAA2_TX_CGR_OFF)) { 562 struct dpni_congestion_notification_cfg cong_notif_cfg; 563 564 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES; 565 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD; 566 /* Notify that the queue is not congested when the data in 567 * the queue is below this thershold. 568 */ 569 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD; 570 cong_notif_cfg.message_ctx = 0; 571 cong_notif_cfg.message_iova = (size_t)dpaa2_q->cscn; 572 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE; 573 cong_notif_cfg.notification_mode = 574 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER | 575 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT | 576 DPNI_CONG_OPT_COHERENT_WRITE; 577 578 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW, 579 priv->token, 580 DPNI_QUEUE_TX, 581 tc_id, 582 &cong_notif_cfg); 583 if (ret) { 584 DPAA2_PMD_ERR( 585 "Error in setting tx congestion notification: " 586 "err=%d", ret); 587 return -ret; 588 } 589 } 590 dev->data->tx_queues[tx_queue_id] = dpaa2_q; 591 return 0; 592 } 593 594 static void 595 dpaa2_dev_rx_queue_release(void *q __rte_unused) 596 { 597 PMD_INIT_FUNC_TRACE(); 598 } 599 600 static void 601 dpaa2_dev_tx_queue_release(void *q __rte_unused) 602 { 603 PMD_INIT_FUNC_TRACE(); 604 } 605 606 static uint32_t 607 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 608 { 609 int32_t ret; 610 struct dpaa2_dev_priv *priv = dev->data->dev_private; 611 struct dpaa2_queue *dpaa2_q; 612 struct qbman_swp *swp; 613 struct qbman_fq_query_np_rslt state; 614 uint32_t frame_cnt = 0; 615 616 PMD_INIT_FUNC_TRACE(); 617 618 if (unlikely(!DPAA2_PER_LCORE_DPIO)) { 619 ret = dpaa2_affine_qbman_swp(); 620 if (ret) { 621 DPAA2_PMD_ERR("Failure in affining portal"); 622 return -EINVAL; 623 } 624 } 625 swp = DPAA2_PER_LCORE_PORTAL; 626 627 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 628 629 if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) { 630 frame_cnt = qbman_fq_state_frame_count(&state); 631 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u", 632 rx_queue_id, frame_cnt); 633 } 634 return frame_cnt; 635 } 636 637 static const uint32_t * 638 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev) 639 { 640 static const uint32_t ptypes[] = { 641 /*todo -= add more types */ 642 RTE_PTYPE_L2_ETHER, 643 RTE_PTYPE_L3_IPV4, 644 RTE_PTYPE_L3_IPV4_EXT, 645 RTE_PTYPE_L3_IPV6, 646 RTE_PTYPE_L3_IPV6_EXT, 647 RTE_PTYPE_L4_TCP, 648 RTE_PTYPE_L4_UDP, 649 RTE_PTYPE_L4_SCTP, 650 RTE_PTYPE_L4_ICMP, 651 RTE_PTYPE_UNKNOWN 652 }; 653 654 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx) 655 return ptypes; 656 return NULL; 657 } 658 659 /** 660 * Dpaa2 link Interrupt handler 661 * 662 * @param param 663 * The address of parameter (struct rte_eth_dev *) regsitered before. 664 * 665 * @return 666 * void 667 */ 668 static void 669 dpaa2_interrupt_handler(void *param) 670 { 671 struct rte_eth_dev *dev = param; 672 struct dpaa2_dev_priv *priv = dev->data->dev_private; 673 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 674 int ret; 675 int irq_index = DPNI_IRQ_INDEX; 676 unsigned int status = 0, clear = 0; 677 678 PMD_INIT_FUNC_TRACE(); 679 680 if (dpni == NULL) { 681 DPAA2_PMD_ERR("dpni is NULL"); 682 return; 683 } 684 685 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token, 686 irq_index, &status); 687 if (unlikely(ret)) { 688 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret); 689 clear = 0xffffffff; 690 goto out; 691 } 692 693 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) { 694 clear = DPNI_IRQ_EVENT_LINK_CHANGED; 695 dpaa2_dev_link_update(dev, 0); 696 /* calling all the apps registered for link status event */ 697 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, 698 NULL); 699 } 700 out: 701 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token, 702 irq_index, clear); 703 if (unlikely(ret)) 704 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret); 705 } 706 707 static int 708 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable) 709 { 710 int err = 0; 711 struct dpaa2_dev_priv *priv = dev->data->dev_private; 712 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 713 int irq_index = DPNI_IRQ_INDEX; 714 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED; 715 716 PMD_INIT_FUNC_TRACE(); 717 718 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token, 719 irq_index, mask); 720 if (err < 0) { 721 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err, 722 strerror(-err)); 723 return err; 724 } 725 726 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token, 727 irq_index, enable); 728 if (err < 0) 729 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err, 730 strerror(-err)); 731 732 return err; 733 } 734 735 static int 736 dpaa2_dev_start(struct rte_eth_dev *dev) 737 { 738 struct rte_device *rdev = dev->device; 739 struct rte_dpaa2_device *dpaa2_dev; 740 struct rte_eth_dev_data *data = dev->data; 741 struct dpaa2_dev_priv *priv = data->dev_private; 742 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 743 struct dpni_queue cfg; 744 struct dpni_error_cfg err_cfg; 745 uint16_t qdid; 746 struct dpni_queue_id qid; 747 struct dpaa2_queue *dpaa2_q; 748 int ret, i; 749 struct rte_intr_handle *intr_handle; 750 751 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device); 752 intr_handle = &dpaa2_dev->intr_handle; 753 754 PMD_INIT_FUNC_TRACE(); 755 756 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 757 if (ret) { 758 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d", 759 priv->hw_id, ret); 760 return ret; 761 } 762 763 /* Power up the phy. Needed to make the link go UP */ 764 dpaa2_dev_set_link_up(dev); 765 766 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token, 767 DPNI_QUEUE_TX, &qdid); 768 if (ret) { 769 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret); 770 return ret; 771 } 772 priv->qdid = qdid; 773 774 for (i = 0; i < data->nb_rx_queues; i++) { 775 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i]; 776 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token, 777 DPNI_QUEUE_RX, dpaa2_q->tc_index, 778 dpaa2_q->flow_id, &cfg, &qid); 779 if (ret) { 780 DPAA2_PMD_ERR("Error in getting flow information: " 781 "err=%d", ret); 782 return ret; 783 } 784 dpaa2_q->fqid = qid.fqid; 785 } 786 787 /*checksum errors, send them to normal path and set it in annotation */ 788 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE; 789 790 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE; 791 err_cfg.set_frame_annotation = true; 792 793 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW, 794 priv->token, &err_cfg); 795 if (ret) { 796 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d", 797 ret); 798 return ret; 799 } 800 801 /* if the interrupts were configured on this devices*/ 802 if (intr_handle && (intr_handle->fd) && 803 (dev->data->dev_conf.intr_conf.lsc != 0)) { 804 /* Registering LSC interrupt handler */ 805 rte_intr_callback_register(intr_handle, 806 dpaa2_interrupt_handler, 807 (void *)dev); 808 809 /* enable vfio intr/eventfd mapping 810 * Interrupt index 0 is required, so we can not use 811 * rte_intr_enable. 812 */ 813 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX); 814 815 /* enable dpni_irqs */ 816 dpaa2_eth_setup_irqs(dev, 1); 817 } 818 819 return 0; 820 } 821 822 /** 823 * This routine disables all traffic on the adapter by issuing a 824 * global reset on the MAC. 825 */ 826 static void 827 dpaa2_dev_stop(struct rte_eth_dev *dev) 828 { 829 struct dpaa2_dev_priv *priv = dev->data->dev_private; 830 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 831 int ret; 832 struct rte_eth_link link; 833 struct rte_intr_handle *intr_handle = dev->intr_handle; 834 835 PMD_INIT_FUNC_TRACE(); 836 837 /* reset interrupt callback */ 838 if (intr_handle && (intr_handle->fd) && 839 (dev->data->dev_conf.intr_conf.lsc != 0)) { 840 /*disable dpni irqs */ 841 dpaa2_eth_setup_irqs(dev, 0); 842 843 /* disable vfio intr before callback unregister */ 844 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX); 845 846 /* Unregistering LSC interrupt handler */ 847 rte_intr_callback_unregister(intr_handle, 848 dpaa2_interrupt_handler, 849 (void *)dev); 850 } 851 852 dpaa2_dev_set_link_down(dev); 853 854 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token); 855 if (ret) { 856 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev", 857 ret, priv->hw_id); 858 return; 859 } 860 861 /* clear the recorded link status */ 862 memset(&link, 0, sizeof(link)); 863 rte_eth_linkstatus_set(dev, &link); 864 } 865 866 static void 867 dpaa2_dev_close(struct rte_eth_dev *dev) 868 { 869 struct rte_eth_dev_data *data = dev->data; 870 struct dpaa2_dev_priv *priv = dev->data->dev_private; 871 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 872 int i, ret; 873 struct rte_eth_link link; 874 struct dpaa2_queue *dpaa2_q; 875 876 PMD_INIT_FUNC_TRACE(); 877 878 for (i = 0; i < data->nb_tx_queues; i++) { 879 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i]; 880 if (!dpaa2_q->cscn) { 881 rte_free(dpaa2_q->cscn); 882 dpaa2_q->cscn = NULL; 883 } 884 } 885 886 /* Clean the device first */ 887 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token); 888 if (ret) { 889 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret); 890 return; 891 } 892 893 memset(&link, 0, sizeof(link)); 894 rte_eth_linkstatus_set(dev, &link); 895 } 896 897 static void 898 dpaa2_dev_promiscuous_enable( 899 struct rte_eth_dev *dev) 900 { 901 int ret; 902 struct dpaa2_dev_priv *priv = dev->data->dev_private; 903 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 904 905 PMD_INIT_FUNC_TRACE(); 906 907 if (dpni == NULL) { 908 DPAA2_PMD_ERR("dpni is NULL"); 909 return; 910 } 911 912 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 913 if (ret < 0) 914 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret); 915 916 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 917 if (ret < 0) 918 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret); 919 } 920 921 static void 922 dpaa2_dev_promiscuous_disable( 923 struct rte_eth_dev *dev) 924 { 925 int ret; 926 struct dpaa2_dev_priv *priv = dev->data->dev_private; 927 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 928 929 PMD_INIT_FUNC_TRACE(); 930 931 if (dpni == NULL) { 932 DPAA2_PMD_ERR("dpni is NULL"); 933 return; 934 } 935 936 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 937 if (ret < 0) 938 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret); 939 940 if (dev->data->all_multicast == 0) { 941 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, 942 priv->token, false); 943 if (ret < 0) 944 DPAA2_PMD_ERR("Unable to disable M promisc mode %d", 945 ret); 946 } 947 } 948 949 static void 950 dpaa2_dev_allmulticast_enable( 951 struct rte_eth_dev *dev) 952 { 953 int ret; 954 struct dpaa2_dev_priv *priv = dev->data->dev_private; 955 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 956 957 PMD_INIT_FUNC_TRACE(); 958 959 if (dpni == NULL) { 960 DPAA2_PMD_ERR("dpni is NULL"); 961 return; 962 } 963 964 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 965 if (ret < 0) 966 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret); 967 } 968 969 static void 970 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev) 971 { 972 int ret; 973 struct dpaa2_dev_priv *priv = dev->data->dev_private; 974 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 975 976 PMD_INIT_FUNC_TRACE(); 977 978 if (dpni == NULL) { 979 DPAA2_PMD_ERR("dpni is NULL"); 980 return; 981 } 982 983 /* must remain on for all promiscuous */ 984 if (dev->data->promiscuous == 1) 985 return; 986 987 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 988 if (ret < 0) 989 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret); 990 } 991 992 static int 993 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 994 { 995 int ret; 996 struct dpaa2_dev_priv *priv = dev->data->dev_private; 997 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 998 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN 999 + VLAN_TAG_SIZE; 1000 1001 PMD_INIT_FUNC_TRACE(); 1002 1003 if (dpni == NULL) { 1004 DPAA2_PMD_ERR("dpni is NULL"); 1005 return -EINVAL; 1006 } 1007 1008 /* check that mtu is within the allowed range */ 1009 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN)) 1010 return -EINVAL; 1011 1012 if (frame_size > ETHER_MAX_LEN) 1013 dev->data->dev_conf.rxmode.offloads &= 1014 DEV_RX_OFFLOAD_JUMBO_FRAME; 1015 else 1016 dev->data->dev_conf.rxmode.offloads &= 1017 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1018 1019 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 1020 1021 /* Set the Max Rx frame length as 'mtu' + 1022 * Maximum Ethernet header length 1023 */ 1024 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token, 1025 frame_size); 1026 if (ret) { 1027 DPAA2_PMD_ERR("Setting the max frame length failed"); 1028 return -1; 1029 } 1030 DPAA2_PMD_INFO("MTU configured for the device: %d", mtu); 1031 return 0; 1032 } 1033 1034 static int 1035 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev, 1036 struct ether_addr *addr, 1037 __rte_unused uint32_t index, 1038 __rte_unused uint32_t pool) 1039 { 1040 int ret; 1041 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1042 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1043 1044 PMD_INIT_FUNC_TRACE(); 1045 1046 if (dpni == NULL) { 1047 DPAA2_PMD_ERR("dpni is NULL"); 1048 return -1; 1049 } 1050 1051 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW, 1052 priv->token, addr->addr_bytes); 1053 if (ret) 1054 DPAA2_PMD_ERR( 1055 "error: Adding the MAC ADDR failed: err = %d", ret); 1056 return 0; 1057 } 1058 1059 static void 1060 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev, 1061 uint32_t index) 1062 { 1063 int ret; 1064 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1065 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1066 struct rte_eth_dev_data *data = dev->data; 1067 struct ether_addr *macaddr; 1068 1069 PMD_INIT_FUNC_TRACE(); 1070 1071 macaddr = &data->mac_addrs[index]; 1072 1073 if (dpni == NULL) { 1074 DPAA2_PMD_ERR("dpni is NULL"); 1075 return; 1076 } 1077 1078 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW, 1079 priv->token, macaddr->addr_bytes); 1080 if (ret) 1081 DPAA2_PMD_ERR( 1082 "error: Removing the MAC ADDR failed: err = %d", ret); 1083 } 1084 1085 static int 1086 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev, 1087 struct ether_addr *addr) 1088 { 1089 int ret; 1090 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1091 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1092 1093 PMD_INIT_FUNC_TRACE(); 1094 1095 if (dpni == NULL) { 1096 DPAA2_PMD_ERR("dpni is NULL"); 1097 return -EINVAL; 1098 } 1099 1100 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW, 1101 priv->token, addr->addr_bytes); 1102 1103 if (ret) 1104 DPAA2_PMD_ERR( 1105 "error: Setting the MAC ADDR failed %d", ret); 1106 1107 return ret; 1108 } 1109 1110 static 1111 int dpaa2_dev_stats_get(struct rte_eth_dev *dev, 1112 struct rte_eth_stats *stats) 1113 { 1114 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1115 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1116 int32_t retcode; 1117 uint8_t page0 = 0, page1 = 1, page2 = 2; 1118 union dpni_statistics value; 1119 1120 memset(&value, 0, sizeof(union dpni_statistics)); 1121 1122 PMD_INIT_FUNC_TRACE(); 1123 1124 if (!dpni) { 1125 DPAA2_PMD_ERR("dpni is NULL"); 1126 return -EINVAL; 1127 } 1128 1129 if (!stats) { 1130 DPAA2_PMD_ERR("stats is NULL"); 1131 return -EINVAL; 1132 } 1133 1134 /*Get Counters from page_0*/ 1135 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1136 page0, 0, &value); 1137 if (retcode) 1138 goto err; 1139 1140 stats->ipackets = value.page_0.ingress_all_frames; 1141 stats->ibytes = value.page_0.ingress_all_bytes; 1142 1143 /*Get Counters from page_1*/ 1144 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1145 page1, 0, &value); 1146 if (retcode) 1147 goto err; 1148 1149 stats->opackets = value.page_1.egress_all_frames; 1150 stats->obytes = value.page_1.egress_all_bytes; 1151 1152 /*Get Counters from page_2*/ 1153 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1154 page2, 0, &value); 1155 if (retcode) 1156 goto err; 1157 1158 /* Ingress drop frame count due to configured rules */ 1159 stats->ierrors = value.page_2.ingress_filtered_frames; 1160 /* Ingress drop frame count due to error */ 1161 stats->ierrors += value.page_2.ingress_discarded_frames; 1162 1163 stats->oerrors = value.page_2.egress_discarded_frames; 1164 stats->imissed = value.page_2.ingress_nobuffer_discards; 1165 1166 return 0; 1167 1168 err: 1169 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode); 1170 return retcode; 1171 }; 1172 1173 static int 1174 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 1175 unsigned int n) 1176 { 1177 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1178 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1179 int32_t retcode; 1180 union dpni_statistics value[3] = {}; 1181 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings); 1182 1183 if (n < num) 1184 return num; 1185 1186 if (xstats == NULL) 1187 return 0; 1188 1189 /* Get Counters from page_0*/ 1190 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1191 0, 0, &value[0]); 1192 if (retcode) 1193 goto err; 1194 1195 /* Get Counters from page_1*/ 1196 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1197 1, 0, &value[1]); 1198 if (retcode) 1199 goto err; 1200 1201 /* Get Counters from page_2*/ 1202 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1203 2, 0, &value[2]); 1204 if (retcode) 1205 goto err; 1206 1207 for (i = 0; i < num; i++) { 1208 xstats[i].id = i; 1209 xstats[i].value = value[dpaa2_xstats_strings[i].page_id]. 1210 raw.counter[dpaa2_xstats_strings[i].stats_id]; 1211 } 1212 return i; 1213 err: 1214 DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode); 1215 return retcode; 1216 } 1217 1218 static int 1219 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 1220 struct rte_eth_xstat_name *xstats_names, 1221 unsigned int limit) 1222 { 1223 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1224 1225 if (limit < stat_cnt) 1226 return stat_cnt; 1227 1228 if (xstats_names != NULL) 1229 for (i = 0; i < stat_cnt; i++) 1230 snprintf(xstats_names[i].name, 1231 sizeof(xstats_names[i].name), 1232 "%s", 1233 dpaa2_xstats_strings[i].name); 1234 1235 return stat_cnt; 1236 } 1237 1238 static int 1239 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 1240 uint64_t *values, unsigned int n) 1241 { 1242 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1243 uint64_t values_copy[stat_cnt]; 1244 1245 if (!ids) { 1246 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1247 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1248 int32_t retcode; 1249 union dpni_statistics value[3] = {}; 1250 1251 if (n < stat_cnt) 1252 return stat_cnt; 1253 1254 if (!values) 1255 return 0; 1256 1257 /* Get Counters from page_0*/ 1258 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1259 0, 0, &value[0]); 1260 if (retcode) 1261 return 0; 1262 1263 /* Get Counters from page_1*/ 1264 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1265 1, 0, &value[1]); 1266 if (retcode) 1267 return 0; 1268 1269 /* Get Counters from page_2*/ 1270 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 1271 2, 0, &value[2]); 1272 if (retcode) 1273 return 0; 1274 1275 for (i = 0; i < stat_cnt; i++) { 1276 values[i] = value[dpaa2_xstats_strings[i].page_id]. 1277 raw.counter[dpaa2_xstats_strings[i].stats_id]; 1278 } 1279 return stat_cnt; 1280 } 1281 1282 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt); 1283 1284 for (i = 0; i < n; i++) { 1285 if (ids[i] >= stat_cnt) { 1286 DPAA2_PMD_ERR("xstats id value isn't valid"); 1287 return -1; 1288 } 1289 values[i] = values_copy[ids[i]]; 1290 } 1291 return n; 1292 } 1293 1294 static int 1295 dpaa2_xstats_get_names_by_id( 1296 struct rte_eth_dev *dev, 1297 struct rte_eth_xstat_name *xstats_names, 1298 const uint64_t *ids, 1299 unsigned int limit) 1300 { 1301 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 1302 struct rte_eth_xstat_name xstats_names_copy[stat_cnt]; 1303 1304 if (!ids) 1305 return dpaa2_xstats_get_names(dev, xstats_names, limit); 1306 1307 dpaa2_xstats_get_names(dev, xstats_names_copy, limit); 1308 1309 for (i = 0; i < limit; i++) { 1310 if (ids[i] >= stat_cnt) { 1311 DPAA2_PMD_ERR("xstats id value isn't valid"); 1312 return -1; 1313 } 1314 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 1315 } 1316 return limit; 1317 } 1318 1319 static void 1320 dpaa2_dev_stats_reset(struct rte_eth_dev *dev) 1321 { 1322 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1323 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1324 int32_t retcode; 1325 1326 PMD_INIT_FUNC_TRACE(); 1327 1328 if (dpni == NULL) { 1329 DPAA2_PMD_ERR("dpni is NULL"); 1330 return; 1331 } 1332 1333 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token); 1334 if (retcode) 1335 goto error; 1336 1337 return; 1338 1339 error: 1340 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode); 1341 return; 1342 }; 1343 1344 /* return 0 means link status changed, -1 means not changed */ 1345 static int 1346 dpaa2_dev_link_update(struct rte_eth_dev *dev, 1347 int wait_to_complete __rte_unused) 1348 { 1349 int ret; 1350 struct dpaa2_dev_priv *priv = dev->data->dev_private; 1351 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1352 struct rte_eth_link link; 1353 struct dpni_link_state state = {0}; 1354 1355 if (dpni == NULL) { 1356 DPAA2_PMD_ERR("dpni is NULL"); 1357 return 0; 1358 } 1359 1360 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1361 if (ret < 0) { 1362 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret); 1363 return -1; 1364 } 1365 1366 memset(&link, 0, sizeof(struct rte_eth_link)); 1367 link.link_status = state.up; 1368 link.link_speed = state.rate; 1369 1370 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX) 1371 link.link_duplex = ETH_LINK_HALF_DUPLEX; 1372 else 1373 link.link_duplex = ETH_LINK_FULL_DUPLEX; 1374 1375 ret = rte_eth_linkstatus_set(dev, &link); 1376 if (ret == -1) 1377 DPAA2_PMD_DEBUG("No change in status"); 1378 else 1379 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id, 1380 link.link_status ? "Up" : "Down"); 1381 1382 return ret; 1383 } 1384 1385 /** 1386 * Toggle the DPNI to enable, if not already enabled. 1387 * This is not strictly PHY up/down - it is more of logical toggling. 1388 */ 1389 static int 1390 dpaa2_dev_set_link_up(struct rte_eth_dev *dev) 1391 { 1392 int ret = -EINVAL; 1393 struct dpaa2_dev_priv *priv; 1394 struct fsl_mc_io *dpni; 1395 int en = 0; 1396 struct dpni_link_state state = {0}; 1397 1398 priv = dev->data->dev_private; 1399 dpni = (struct fsl_mc_io *)priv->hw; 1400 1401 if (dpni == NULL) { 1402 DPAA2_PMD_ERR("dpni is NULL"); 1403 return ret; 1404 } 1405 1406 /* Check if DPNI is currently enabled */ 1407 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en); 1408 if (ret) { 1409 /* Unable to obtain dpni status; Not continuing */ 1410 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret); 1411 return -EINVAL; 1412 } 1413 1414 /* Enable link if not already enabled */ 1415 if (!en) { 1416 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 1417 if (ret) { 1418 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret); 1419 return -EINVAL; 1420 } 1421 } 1422 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1423 if (ret < 0) { 1424 DPAA2_PMD_ERR("Unable to get link state (%d)", ret); 1425 return -1; 1426 } 1427 1428 /* changing tx burst function to start enqueues */ 1429 dev->tx_pkt_burst = dpaa2_dev_tx; 1430 dev->data->dev_link.link_status = state.up; 1431 1432 if (state.up) 1433 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id); 1434 else 1435 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id); 1436 return ret; 1437 } 1438 1439 /** 1440 * Toggle the DPNI to disable, if not already disabled. 1441 * This is not strictly PHY up/down - it is more of logical toggling. 1442 */ 1443 static int 1444 dpaa2_dev_set_link_down(struct rte_eth_dev *dev) 1445 { 1446 int ret = -EINVAL; 1447 struct dpaa2_dev_priv *priv; 1448 struct fsl_mc_io *dpni; 1449 int dpni_enabled = 0; 1450 int retries = 10; 1451 1452 PMD_INIT_FUNC_TRACE(); 1453 1454 priv = dev->data->dev_private; 1455 dpni = (struct fsl_mc_io *)priv->hw; 1456 1457 if (dpni == NULL) { 1458 DPAA2_PMD_ERR("Device has not yet been configured"); 1459 return ret; 1460 } 1461 1462 /*changing tx burst function to avoid any more enqueues */ 1463 dev->tx_pkt_burst = dummy_dev_tx; 1464 1465 /* Loop while dpni_disable() attempts to drain the egress FQs 1466 * and confirm them back to us. 1467 */ 1468 do { 1469 ret = dpni_disable(dpni, 0, priv->token); 1470 if (ret) { 1471 DPAA2_PMD_ERR("dpni disable failed (%d)", ret); 1472 return ret; 1473 } 1474 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled); 1475 if (ret) { 1476 DPAA2_PMD_ERR("dpni enable check failed (%d)", ret); 1477 return ret; 1478 } 1479 if (dpni_enabled) 1480 /* Allow the MC some slack */ 1481 rte_delay_us(100 * 1000); 1482 } while (dpni_enabled && --retries); 1483 1484 if (!retries) { 1485 DPAA2_PMD_WARN("Retry count exceeded disabling dpni"); 1486 /* todo- we may have to manually cleanup queues. 1487 */ 1488 } else { 1489 DPAA2_PMD_INFO("Port %d Link DOWN successful", 1490 dev->data->port_id); 1491 } 1492 1493 dev->data->dev_link.link_status = 0; 1494 1495 return ret; 1496 } 1497 1498 static int 1499 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1500 { 1501 int ret = -EINVAL; 1502 struct dpaa2_dev_priv *priv; 1503 struct fsl_mc_io *dpni; 1504 struct dpni_link_state state = {0}; 1505 1506 PMD_INIT_FUNC_TRACE(); 1507 1508 priv = dev->data->dev_private; 1509 dpni = (struct fsl_mc_io *)priv->hw; 1510 1511 if (dpni == NULL || fc_conf == NULL) { 1512 DPAA2_PMD_ERR("device not configured"); 1513 return ret; 1514 } 1515 1516 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1517 if (ret) { 1518 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret); 1519 return ret; 1520 } 1521 1522 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf)); 1523 if (state.options & DPNI_LINK_OPT_PAUSE) { 1524 /* DPNI_LINK_OPT_PAUSE set 1525 * if ASYM_PAUSE not set, 1526 * RX Side flow control (handle received Pause frame) 1527 * TX side flow control (send Pause frame) 1528 * if ASYM_PAUSE set, 1529 * RX Side flow control (handle received Pause frame) 1530 * No TX side flow control (send Pause frame disabled) 1531 */ 1532 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE)) 1533 fc_conf->mode = RTE_FC_FULL; 1534 else 1535 fc_conf->mode = RTE_FC_RX_PAUSE; 1536 } else { 1537 /* DPNI_LINK_OPT_PAUSE not set 1538 * if ASYM_PAUSE set, 1539 * TX side flow control (send Pause frame) 1540 * No RX side flow control (No action on pause frame rx) 1541 * if ASYM_PAUSE not set, 1542 * Flow control disabled 1543 */ 1544 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE) 1545 fc_conf->mode = RTE_FC_TX_PAUSE; 1546 else 1547 fc_conf->mode = RTE_FC_NONE; 1548 } 1549 1550 return ret; 1551 } 1552 1553 static int 1554 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1555 { 1556 int ret = -EINVAL; 1557 struct dpaa2_dev_priv *priv; 1558 struct fsl_mc_io *dpni; 1559 struct dpni_link_state state = {0}; 1560 struct dpni_link_cfg cfg = {0}; 1561 1562 PMD_INIT_FUNC_TRACE(); 1563 1564 priv = dev->data->dev_private; 1565 dpni = (struct fsl_mc_io *)priv->hw; 1566 1567 if (dpni == NULL) { 1568 DPAA2_PMD_ERR("dpni is NULL"); 1569 return ret; 1570 } 1571 1572 /* It is necessary to obtain the current state before setting fc_conf 1573 * as MC would return error in case rate, autoneg or duplex values are 1574 * different. 1575 */ 1576 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1577 if (ret) { 1578 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret); 1579 return -1; 1580 } 1581 1582 /* Disable link before setting configuration */ 1583 dpaa2_dev_set_link_down(dev); 1584 1585 /* Based on fc_conf, update cfg */ 1586 cfg.rate = state.rate; 1587 cfg.options = state.options; 1588 1589 /* update cfg with fc_conf */ 1590 switch (fc_conf->mode) { 1591 case RTE_FC_FULL: 1592 /* Full flow control; 1593 * OPT_PAUSE set, ASYM_PAUSE not set 1594 */ 1595 cfg.options |= DPNI_LINK_OPT_PAUSE; 1596 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE; 1597 break; 1598 case RTE_FC_TX_PAUSE: 1599 /* Enable RX flow control 1600 * OPT_PAUSE not set; 1601 * ASYM_PAUSE set; 1602 */ 1603 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE; 1604 cfg.options &= ~DPNI_LINK_OPT_PAUSE; 1605 break; 1606 case RTE_FC_RX_PAUSE: 1607 /* Enable TX Flow control 1608 * OPT_PAUSE set 1609 * ASYM_PAUSE set 1610 */ 1611 cfg.options |= DPNI_LINK_OPT_PAUSE; 1612 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE; 1613 break; 1614 case RTE_FC_NONE: 1615 /* Disable Flow control 1616 * OPT_PAUSE not set 1617 * ASYM_PAUSE not set 1618 */ 1619 cfg.options &= ~DPNI_LINK_OPT_PAUSE; 1620 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE; 1621 break; 1622 default: 1623 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)", 1624 fc_conf->mode); 1625 return -1; 1626 } 1627 1628 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg); 1629 if (ret) 1630 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)", 1631 ret); 1632 1633 /* Enable link */ 1634 dpaa2_dev_set_link_up(dev); 1635 1636 return ret; 1637 } 1638 1639 static int 1640 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev, 1641 struct rte_eth_rss_conf *rss_conf) 1642 { 1643 struct rte_eth_dev_data *data = dev->data; 1644 struct rte_eth_conf *eth_conf = &data->dev_conf; 1645 int ret; 1646 1647 PMD_INIT_FUNC_TRACE(); 1648 1649 if (rss_conf->rss_hf) { 1650 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf); 1651 if (ret) { 1652 DPAA2_PMD_ERR("Unable to set flow dist"); 1653 return ret; 1654 } 1655 } else { 1656 ret = dpaa2_remove_flow_dist(dev, 0); 1657 if (ret) { 1658 DPAA2_PMD_ERR("Unable to remove flow dist"); 1659 return ret; 1660 } 1661 } 1662 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf; 1663 return 0; 1664 } 1665 1666 static int 1667 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1668 struct rte_eth_rss_conf *rss_conf) 1669 { 1670 struct rte_eth_dev_data *data = dev->data; 1671 struct rte_eth_conf *eth_conf = &data->dev_conf; 1672 1673 /* dpaa2 does not support rss_key, so length should be 0*/ 1674 rss_conf->rss_key_len = 0; 1675 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf; 1676 return 0; 1677 } 1678 1679 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev, 1680 int eth_rx_queue_id, 1681 uint16_t dpcon_id, 1682 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf) 1683 { 1684 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; 1685 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw; 1686 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; 1687 uint8_t flow_id = dpaa2_ethq->flow_id; 1688 struct dpni_queue cfg; 1689 uint8_t options; 1690 int ret; 1691 1692 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL) 1693 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event; 1694 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) 1695 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event; 1696 else 1697 return -EINVAL; 1698 1699 memset(&cfg, 0, sizeof(struct dpni_queue)); 1700 options = DPNI_QUEUE_OPT_DEST; 1701 cfg.destination.type = DPNI_DEST_DPCON; 1702 cfg.destination.id = dpcon_id; 1703 cfg.destination.priority = queue_conf->ev.priority; 1704 1705 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) { 1706 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE; 1707 cfg.destination.hold_active = 1; 1708 } 1709 1710 options |= DPNI_QUEUE_OPT_USER_CTX; 1711 cfg.user_context = (size_t)(dpaa2_ethq); 1712 1713 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX, 1714 dpaa2_ethq->tc_index, flow_id, options, &cfg); 1715 if (ret) { 1716 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret); 1717 return ret; 1718 } 1719 1720 memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event)); 1721 1722 return 0; 1723 } 1724 1725 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev, 1726 int eth_rx_queue_id) 1727 { 1728 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; 1729 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw; 1730 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; 1731 uint8_t flow_id = dpaa2_ethq->flow_id; 1732 struct dpni_queue cfg; 1733 uint8_t options; 1734 int ret; 1735 1736 memset(&cfg, 0, sizeof(struct dpni_queue)); 1737 options = DPNI_QUEUE_OPT_DEST; 1738 cfg.destination.type = DPNI_DEST_NONE; 1739 1740 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX, 1741 dpaa2_ethq->tc_index, flow_id, options, &cfg); 1742 if (ret) 1743 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret); 1744 1745 return ret; 1746 } 1747 1748 static struct eth_dev_ops dpaa2_ethdev_ops = { 1749 .dev_configure = dpaa2_eth_dev_configure, 1750 .dev_start = dpaa2_dev_start, 1751 .dev_stop = dpaa2_dev_stop, 1752 .dev_close = dpaa2_dev_close, 1753 .promiscuous_enable = dpaa2_dev_promiscuous_enable, 1754 .promiscuous_disable = dpaa2_dev_promiscuous_disable, 1755 .allmulticast_enable = dpaa2_dev_allmulticast_enable, 1756 .allmulticast_disable = dpaa2_dev_allmulticast_disable, 1757 .dev_set_link_up = dpaa2_dev_set_link_up, 1758 .dev_set_link_down = dpaa2_dev_set_link_down, 1759 .link_update = dpaa2_dev_link_update, 1760 .stats_get = dpaa2_dev_stats_get, 1761 .xstats_get = dpaa2_dev_xstats_get, 1762 .xstats_get_by_id = dpaa2_xstats_get_by_id, 1763 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id, 1764 .xstats_get_names = dpaa2_xstats_get_names, 1765 .stats_reset = dpaa2_dev_stats_reset, 1766 .xstats_reset = dpaa2_dev_stats_reset, 1767 .fw_version_get = dpaa2_fw_version_get, 1768 .dev_infos_get = dpaa2_dev_info_get, 1769 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get, 1770 .mtu_set = dpaa2_dev_mtu_set, 1771 .vlan_filter_set = dpaa2_vlan_filter_set, 1772 .vlan_offload_set = dpaa2_vlan_offload_set, 1773 .rx_queue_setup = dpaa2_dev_rx_queue_setup, 1774 .rx_queue_release = dpaa2_dev_rx_queue_release, 1775 .tx_queue_setup = dpaa2_dev_tx_queue_setup, 1776 .tx_queue_release = dpaa2_dev_tx_queue_release, 1777 .rx_queue_count = dpaa2_dev_rx_queue_count, 1778 .flow_ctrl_get = dpaa2_flow_ctrl_get, 1779 .flow_ctrl_set = dpaa2_flow_ctrl_set, 1780 .mac_addr_add = dpaa2_dev_add_mac_addr, 1781 .mac_addr_remove = dpaa2_dev_remove_mac_addr, 1782 .mac_addr_set = dpaa2_dev_set_mac_addr, 1783 .rss_hash_update = dpaa2_dev_rss_hash_update, 1784 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get, 1785 }; 1786 1787 static int 1788 dpaa2_dev_init(struct rte_eth_dev *eth_dev) 1789 { 1790 struct rte_device *dev = eth_dev->device; 1791 struct rte_dpaa2_device *dpaa2_dev; 1792 struct fsl_mc_io *dpni_dev; 1793 struct dpni_attr attr; 1794 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 1795 struct dpni_buffer_layout layout; 1796 int ret, hw_id; 1797 1798 PMD_INIT_FUNC_TRACE(); 1799 1800 /* For secondary processes, the primary has done all the work */ 1801 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1802 return 0; 1803 1804 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device); 1805 1806 hw_id = dpaa2_dev->object_id; 1807 1808 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0); 1809 if (!dpni_dev) { 1810 DPAA2_PMD_ERR("Memory allocation failed for dpni device"); 1811 return -1; 1812 } 1813 1814 dpni_dev->regs = rte_mcp_ptr_list[0]; 1815 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token); 1816 if (ret) { 1817 DPAA2_PMD_ERR( 1818 "Failure in opening dpni@%d with err code %d", 1819 hw_id, ret); 1820 rte_free(dpni_dev); 1821 return -1; 1822 } 1823 1824 /* Clean the device first */ 1825 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token); 1826 if (ret) { 1827 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d", 1828 hw_id, ret); 1829 goto init_err; 1830 } 1831 1832 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr); 1833 if (ret) { 1834 DPAA2_PMD_ERR( 1835 "Failure in get dpni@%d attribute, err code %d", 1836 hw_id, ret); 1837 goto init_err; 1838 } 1839 1840 priv->num_rx_tc = attr.num_rx_tcs; 1841 1842 /* Resetting the "num_rx_queues" to equal number of queues in first TC 1843 * as only one TC is supported on Rx Side. Once Multiple TCs will be 1844 * in use for Rx processing then this will be changed or removed. 1845 */ 1846 priv->nb_rx_queues = attr.num_queues; 1847 1848 /* Using number of TX queues as number of TX TCs */ 1849 priv->nb_tx_queues = attr.num_tx_tcs; 1850 1851 DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d", 1852 priv->num_rx_tc, priv->nb_rx_queues, 1853 priv->nb_tx_queues); 1854 1855 priv->hw = dpni_dev; 1856 priv->hw_id = hw_id; 1857 priv->options = attr.options; 1858 priv->max_mac_filters = attr.mac_filter_entries; 1859 priv->max_vlan_filters = attr.vlan_filter_entries; 1860 priv->flags = 0; 1861 1862 /* Allocate memory for hardware structure for queues */ 1863 ret = dpaa2_alloc_rx_tx_queues(eth_dev); 1864 if (ret) { 1865 DPAA2_PMD_ERR("Queue allocation Failed"); 1866 goto init_err; 1867 } 1868 1869 /* Allocate memory for storing MAC addresses */ 1870 eth_dev->data->mac_addrs = rte_zmalloc("dpni", 1871 ETHER_ADDR_LEN * attr.mac_filter_entries, 0); 1872 if (eth_dev->data->mac_addrs == NULL) { 1873 DPAA2_PMD_ERR( 1874 "Failed to allocate %d bytes needed to store MAC addresses", 1875 ETHER_ADDR_LEN * attr.mac_filter_entries); 1876 ret = -ENOMEM; 1877 goto init_err; 1878 } 1879 1880 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, 1881 priv->token, 1882 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes)); 1883 if (ret) { 1884 DPAA2_PMD_ERR("DPNI get mac address failed:Err Code = %d", 1885 ret); 1886 goto init_err; 1887 } 1888 1889 /* ... tx buffer layout ... */ 1890 memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 1891 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 1892 layout.pass_frame_status = 1; 1893 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 1894 DPNI_QUEUE_TX, &layout); 1895 if (ret) { 1896 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret); 1897 goto init_err; 1898 } 1899 1900 /* ... tx-conf and error buffer layout ... */ 1901 memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 1902 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 1903 layout.pass_frame_status = 1; 1904 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 1905 DPNI_QUEUE_TX_CONFIRM, &layout); 1906 if (ret) { 1907 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout", 1908 ret); 1909 goto init_err; 1910 } 1911 1912 eth_dev->dev_ops = &dpaa2_ethdev_ops; 1913 1914 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx; 1915 eth_dev->tx_pkt_burst = dpaa2_dev_tx; 1916 1917 RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name); 1918 return 0; 1919 init_err: 1920 dpaa2_dev_uninit(eth_dev); 1921 return ret; 1922 } 1923 1924 static int 1925 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev) 1926 { 1927 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 1928 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1929 int i, ret; 1930 struct dpaa2_queue *dpaa2_q; 1931 1932 PMD_INIT_FUNC_TRACE(); 1933 1934 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1935 return 0; 1936 1937 if (!dpni) { 1938 DPAA2_PMD_WARN("Already closed or not started"); 1939 return -1; 1940 } 1941 1942 dpaa2_dev_close(eth_dev); 1943 1944 if (priv->rx_vq[0]) { 1945 /* cleaning up queue storage */ 1946 for (i = 0; i < priv->nb_rx_queues; i++) { 1947 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 1948 if (dpaa2_q->q_storage) 1949 rte_free(dpaa2_q->q_storage); 1950 } 1951 /*free the all queue memory */ 1952 rte_free(priv->rx_vq[0]); 1953 priv->rx_vq[0] = NULL; 1954 } 1955 1956 /* free memory for storing MAC addresses */ 1957 if (eth_dev->data->mac_addrs) { 1958 rte_free(eth_dev->data->mac_addrs); 1959 eth_dev->data->mac_addrs = NULL; 1960 } 1961 1962 /* Close the device at underlying layer*/ 1963 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token); 1964 if (ret) { 1965 DPAA2_PMD_ERR( 1966 "Failure closing dpni device with err code %d", 1967 ret); 1968 } 1969 1970 /* Free the allocated memory for ethernet private data and dpni*/ 1971 priv->hw = NULL; 1972 rte_free(dpni); 1973 1974 eth_dev->dev_ops = NULL; 1975 eth_dev->rx_pkt_burst = NULL; 1976 eth_dev->tx_pkt_burst = NULL; 1977 1978 DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name); 1979 return 0; 1980 } 1981 1982 static int 1983 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv, 1984 struct rte_dpaa2_device *dpaa2_dev) 1985 { 1986 struct rte_eth_dev *eth_dev; 1987 int diag; 1988 1989 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 1990 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name); 1991 if (!eth_dev) 1992 return -ENODEV; 1993 eth_dev->data->dev_private = rte_zmalloc( 1994 "ethdev private structure", 1995 sizeof(struct dpaa2_dev_priv), 1996 RTE_CACHE_LINE_SIZE); 1997 if (eth_dev->data->dev_private == NULL) { 1998 DPAA2_PMD_CRIT( 1999 "Unable to allocate memory for private data"); 2000 rte_eth_dev_release_port(eth_dev); 2001 return -ENOMEM; 2002 } 2003 } else { 2004 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name); 2005 if (!eth_dev) 2006 return -ENODEV; 2007 } 2008 2009 eth_dev->device = &dpaa2_dev->device; 2010 2011 dpaa2_dev->eth_dev = eth_dev; 2012 eth_dev->data->rx_mbuf_alloc_failed = 0; 2013 2014 if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC) 2015 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 2016 2017 /* Invoke PMD device initialization function */ 2018 diag = dpaa2_dev_init(eth_dev); 2019 if (diag == 0) { 2020 rte_eth_dev_probing_finish(eth_dev); 2021 return 0; 2022 } 2023 2024 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2025 rte_free(eth_dev->data->dev_private); 2026 rte_eth_dev_release_port(eth_dev); 2027 return diag; 2028 } 2029 2030 static int 2031 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev) 2032 { 2033 struct rte_eth_dev *eth_dev; 2034 2035 eth_dev = dpaa2_dev->eth_dev; 2036 dpaa2_dev_uninit(eth_dev); 2037 2038 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 2039 rte_free(eth_dev->data->dev_private); 2040 rte_eth_dev_release_port(eth_dev); 2041 2042 return 0; 2043 } 2044 2045 static struct rte_dpaa2_driver rte_dpaa2_pmd = { 2046 .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA, 2047 .drv_type = DPAA2_ETH, 2048 .probe = rte_dpaa2_probe, 2049 .remove = rte_dpaa2_remove, 2050 }; 2051 2052 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd); 2053 2054 RTE_INIT(dpaa2_pmd_init_log) 2055 { 2056 dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2"); 2057 if (dpaa2_logtype_pmd >= 0) 2058 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE); 2059 } 2060