1131a75b6SHemant Agrawal /* * SPDX-License-Identifier: BSD-3-Clause 2c147eae0SHemant Agrawal * 3c147eae0SHemant Agrawal * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved. 4131a75b6SHemant Agrawal * Copyright 2016 NXP 5c147eae0SHemant Agrawal * 6c147eae0SHemant Agrawal */ 7c147eae0SHemant Agrawal 8c147eae0SHemant Agrawal #include <time.h> 9c147eae0SHemant Agrawal #include <net/if.h> 10c147eae0SHemant Agrawal 11c147eae0SHemant Agrawal #include <rte_mbuf.h> 12ffc905f3SFerruh Yigit #include <rte_ethdev_driver.h> 13c147eae0SHemant Agrawal #include <rte_malloc.h> 14c147eae0SHemant Agrawal #include <rte_memcpy.h> 15c147eae0SHemant Agrawal #include <rte_string_fns.h> 16c147eae0SHemant Agrawal #include <rte_cycles.h> 17c147eae0SHemant Agrawal #include <rte_kvargs.h> 18c147eae0SHemant Agrawal #include <rte_dev.h> 19c147eae0SHemant Agrawal #include <rte_fslmc.h> 20c147eae0SHemant Agrawal 21a10a988aSShreyansh Jain #include "dpaa2_pmd_logs.h" 22c147eae0SHemant Agrawal #include <fslmc_vfio.h> 233e5a335dSHemant Agrawal #include <dpaa2_hw_pvt.h> 24bee61d86SHemant Agrawal #include <dpaa2_hw_mempool.h> 253cf50ff5SHemant Agrawal #include <dpaa2_hw_dpio.h> 26748eccb9SHemant Agrawal #include <mc/fsl_dpmng.h> 27c147eae0SHemant Agrawal #include "dpaa2_ethdev.h" 28f40adb40SHemant Agrawal #include <fsl_qbman_debug.h> 29c147eae0SHemant Agrawal 30175fe7d9SSunil Kumar Kori /* Supported Rx offloads */ 31175fe7d9SSunil Kumar Kori static uint64_t dev_rx_offloads_sup = 32175fe7d9SSunil Kumar Kori DEV_RX_OFFLOAD_VLAN_STRIP | 33175fe7d9SSunil Kumar Kori DEV_RX_OFFLOAD_IPV4_CKSUM | 34175fe7d9SSunil Kumar Kori DEV_RX_OFFLOAD_UDP_CKSUM | 35175fe7d9SSunil Kumar Kori DEV_RX_OFFLOAD_TCP_CKSUM | 36175fe7d9SSunil Kumar Kori DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 37175fe7d9SSunil Kumar Kori DEV_RX_OFFLOAD_VLAN_FILTER | 38175fe7d9SSunil Kumar Kori DEV_RX_OFFLOAD_JUMBO_FRAME; 39175fe7d9SSunil Kumar Kori 40175fe7d9SSunil Kumar Kori /* Rx offloads which cannot be disabled */ 41175fe7d9SSunil Kumar Kori static uint64_t dev_rx_offloads_nodis = 42175fe7d9SSunil Kumar Kori DEV_RX_OFFLOAD_SCATTER; 43175fe7d9SSunil Kumar Kori 44175fe7d9SSunil Kumar Kori /* Supported Tx offloads */ 45175fe7d9SSunil Kumar Kori static uint64_t dev_tx_offloads_sup = 46175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_VLAN_INSERT | 47175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_IPV4_CKSUM | 48175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_UDP_CKSUM | 49175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_TCP_CKSUM | 50175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_SCTP_CKSUM | 51175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM; 52175fe7d9SSunil Kumar Kori 53175fe7d9SSunil Kumar Kori /* Tx offloads which cannot be disabled */ 54175fe7d9SSunil Kumar Kori static uint64_t dev_tx_offloads_nodis = 55175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_MULTI_SEGS | 56175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_MT_LOCKFREE | 57175fe7d9SSunil Kumar Kori DEV_TX_OFFLOAD_MBUF_FAST_FREE; 58175fe7d9SSunil Kumar Kori 591d6329b2SHemant Agrawal struct rte_dpaa2_xstats_name_off { 601d6329b2SHemant Agrawal char name[RTE_ETH_XSTATS_NAME_SIZE]; 611d6329b2SHemant Agrawal uint8_t page_id; /* dpni statistics page id */ 621d6329b2SHemant Agrawal uint8_t stats_id; /* stats id in the given page */ 631d6329b2SHemant Agrawal }; 641d6329b2SHemant Agrawal 651d6329b2SHemant Agrawal static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = { 661d6329b2SHemant Agrawal {"ingress_multicast_frames", 0, 2}, 671d6329b2SHemant Agrawal {"ingress_multicast_bytes", 0, 3}, 681d6329b2SHemant Agrawal {"ingress_broadcast_frames", 0, 4}, 691d6329b2SHemant Agrawal {"ingress_broadcast_bytes", 0, 5}, 701d6329b2SHemant Agrawal {"egress_multicast_frames", 1, 2}, 711d6329b2SHemant Agrawal {"egress_multicast_bytes", 1, 3}, 721d6329b2SHemant Agrawal {"egress_broadcast_frames", 1, 4}, 731d6329b2SHemant Agrawal {"egress_broadcast_bytes", 1, 5}, 741d6329b2SHemant Agrawal {"ingress_filtered_frames", 2, 0}, 751d6329b2SHemant Agrawal {"ingress_discarded_frames", 2, 1}, 761d6329b2SHemant Agrawal {"ingress_nobuffer_discards", 2, 2}, 771d6329b2SHemant Agrawal {"egress_discarded_frames", 2, 3}, 781d6329b2SHemant Agrawal {"egress_confirmed_frames", 2, 4}, 791d6329b2SHemant Agrawal }; 801d6329b2SHemant Agrawal 81c147eae0SHemant Agrawal static struct rte_dpaa2_driver rte_dpaa2_pmd; 82d4984046SHemant Agrawal static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev); 83c5acbb5eSHemant Agrawal static int dpaa2_dev_link_update(struct rte_eth_dev *dev, 84c5acbb5eSHemant Agrawal int wait_to_complete); 85a1f3a12cSHemant Agrawal static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev); 86a1f3a12cSHemant Agrawal static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev); 87e1640849SHemant Agrawal static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 88c147eae0SHemant Agrawal 89a10a988aSShreyansh Jain int dpaa2_logtype_pmd; 90a10a988aSShreyansh Jain 913ce294f2SHemant Agrawal static int 923ce294f2SHemant Agrawal dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 933ce294f2SHemant Agrawal { 943ce294f2SHemant Agrawal int ret; 953ce294f2SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 963ce294f2SHemant Agrawal struct fsl_mc_io *dpni = priv->hw; 973ce294f2SHemant Agrawal 983ce294f2SHemant Agrawal PMD_INIT_FUNC_TRACE(); 993ce294f2SHemant Agrawal 1003ce294f2SHemant Agrawal if (dpni == NULL) { 101a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1023ce294f2SHemant Agrawal return -1; 1033ce294f2SHemant Agrawal } 1043ce294f2SHemant Agrawal 1053ce294f2SHemant Agrawal if (on) 1063ce294f2SHemant Agrawal ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, 1073ce294f2SHemant Agrawal priv->token, vlan_id); 1083ce294f2SHemant Agrawal else 1093ce294f2SHemant Agrawal ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW, 1103ce294f2SHemant Agrawal priv->token, vlan_id); 1113ce294f2SHemant Agrawal 1123ce294f2SHemant Agrawal if (ret < 0) 113a10a988aSShreyansh Jain DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d", 1143ce294f2SHemant Agrawal ret, vlan_id, priv->hw_id); 1153ce294f2SHemant Agrawal 1163ce294f2SHemant Agrawal return ret; 1173ce294f2SHemant Agrawal } 1183ce294f2SHemant Agrawal 119289ba0c0SDavid Harton static int 1203ce294f2SHemant Agrawal dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask) 1213ce294f2SHemant Agrawal { 1223ce294f2SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1233ce294f2SHemant Agrawal struct fsl_mc_io *dpni = priv->hw; 1243ce294f2SHemant Agrawal int ret; 1253ce294f2SHemant Agrawal 1263ce294f2SHemant Agrawal PMD_INIT_FUNC_TRACE(); 1273ce294f2SHemant Agrawal 1283ce294f2SHemant Agrawal if (mask & ETH_VLAN_FILTER_MASK) { 129c172f85eSHemant Agrawal /* VLAN Filter not avaialble */ 130c172f85eSHemant Agrawal if (!priv->max_vlan_filters) { 131a10a988aSShreyansh Jain DPAA2_PMD_INFO("VLAN filter not available"); 132c172f85eSHemant Agrawal goto next_mask; 133c172f85eSHemant Agrawal } 134c172f85eSHemant Agrawal 1350ebce612SSunil Kumar Kori if (dev->data->dev_conf.rxmode.offloads & 1360ebce612SSunil Kumar Kori DEV_RX_OFFLOAD_VLAN_FILTER) 1373ce294f2SHemant Agrawal ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW, 1383ce294f2SHemant Agrawal priv->token, true); 1393ce294f2SHemant Agrawal else 1403ce294f2SHemant Agrawal ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW, 1413ce294f2SHemant Agrawal priv->token, false); 1423ce294f2SHemant Agrawal if (ret < 0) 143a10a988aSShreyansh Jain DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret); 1443ce294f2SHemant Agrawal } 145c172f85eSHemant Agrawal next_mask: 146acb95928SHemant Agrawal if (mask & ETH_VLAN_EXTEND_MASK) { 1470ebce612SSunil Kumar Kori if (dev->data->dev_conf.rxmode.offloads & 1480ebce612SSunil Kumar Kori DEV_RX_OFFLOAD_VLAN_EXTEND) 149a10a988aSShreyansh Jain DPAA2_PMD_INFO("VLAN extend offload not supported"); 150acb95928SHemant Agrawal } 151289ba0c0SDavid Harton 152289ba0c0SDavid Harton return 0; 1533ce294f2SHemant Agrawal } 1543ce294f2SHemant Agrawal 155748eccb9SHemant Agrawal static int 156748eccb9SHemant Agrawal dpaa2_fw_version_get(struct rte_eth_dev *dev, 157748eccb9SHemant Agrawal char *fw_version, 158748eccb9SHemant Agrawal size_t fw_size) 159748eccb9SHemant Agrawal { 160748eccb9SHemant Agrawal int ret; 161748eccb9SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 162748eccb9SHemant Agrawal struct fsl_mc_io *dpni = priv->hw; 163748eccb9SHemant Agrawal struct mc_soc_version mc_plat_info = {0}; 164748eccb9SHemant Agrawal struct mc_version mc_ver_info = {0}; 165748eccb9SHemant Agrawal 166748eccb9SHemant Agrawal PMD_INIT_FUNC_TRACE(); 167748eccb9SHemant Agrawal 168748eccb9SHemant Agrawal if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info)) 169a10a988aSShreyansh Jain DPAA2_PMD_WARN("\tmc_get_soc_version failed"); 170748eccb9SHemant Agrawal 171748eccb9SHemant Agrawal if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info)) 172a10a988aSShreyansh Jain DPAA2_PMD_WARN("\tmc_get_version failed"); 173748eccb9SHemant Agrawal 174748eccb9SHemant Agrawal ret = snprintf(fw_version, fw_size, 175748eccb9SHemant Agrawal "%x-%d.%d.%d", 176748eccb9SHemant Agrawal mc_plat_info.svr, 177748eccb9SHemant Agrawal mc_ver_info.major, 178748eccb9SHemant Agrawal mc_ver_info.minor, 179748eccb9SHemant Agrawal mc_ver_info.revision); 180748eccb9SHemant Agrawal 181748eccb9SHemant Agrawal ret += 1; /* add the size of '\0' */ 182748eccb9SHemant Agrawal if (fw_size < (uint32_t)ret) 183748eccb9SHemant Agrawal return ret; 184748eccb9SHemant Agrawal else 185748eccb9SHemant Agrawal return 0; 186748eccb9SHemant Agrawal } 187748eccb9SHemant Agrawal 1883e5a335dSHemant Agrawal static void 1893e5a335dSHemant Agrawal dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 1903e5a335dSHemant Agrawal { 1913e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1923e5a335dSHemant Agrawal 1933e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 1943e5a335dSHemant Agrawal 1953e5a335dSHemant Agrawal dev_info->if_index = priv->hw_id; 1963e5a335dSHemant Agrawal 19733fad432SHemant Agrawal dev_info->max_mac_addrs = priv->max_mac_filters; 198bee61d86SHemant Agrawal dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN; 199bee61d86SHemant Agrawal dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE; 2003e5a335dSHemant Agrawal dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues; 2013e5a335dSHemant Agrawal dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues; 202175fe7d9SSunil Kumar Kori dev_info->rx_offload_capa = dev_rx_offloads_sup | 203175fe7d9SSunil Kumar Kori dev_rx_offloads_nodis; 204175fe7d9SSunil Kumar Kori dev_info->tx_offload_capa = dev_tx_offloads_sup | 205175fe7d9SSunil Kumar Kori dev_tx_offloads_nodis; 2063e5a335dSHemant Agrawal dev_info->speed_capa = ETH_LINK_SPEED_1G | 2073e5a335dSHemant Agrawal ETH_LINK_SPEED_2_5G | 2083e5a335dSHemant Agrawal ETH_LINK_SPEED_10G; 209762b275fSHemant Agrawal 210762b275fSHemant Agrawal dev_info->max_hash_mac_addrs = 0; 211762b275fSHemant Agrawal dev_info->max_vfs = 0; 212762b275fSHemant Agrawal dev_info->max_vmdq_pools = ETH_16_POOLS; 213762b275fSHemant Agrawal dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL; 2143e5a335dSHemant Agrawal } 2153e5a335dSHemant Agrawal 2163e5a335dSHemant Agrawal static int 2173e5a335dSHemant Agrawal dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev) 2183e5a335dSHemant Agrawal { 2193e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 2203e5a335dSHemant Agrawal uint16_t dist_idx; 2213e5a335dSHemant Agrawal uint32_t vq_id; 2223e5a335dSHemant Agrawal struct dpaa2_queue *mc_q, *mcq; 2233e5a335dSHemant Agrawal uint32_t tot_queues; 2243e5a335dSHemant Agrawal int i; 2253e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q; 2263e5a335dSHemant Agrawal 2273e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 2283e5a335dSHemant Agrawal 2293e5a335dSHemant Agrawal tot_queues = priv->nb_rx_queues + priv->nb_tx_queues; 2303e5a335dSHemant Agrawal mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues, 2313e5a335dSHemant Agrawal RTE_CACHE_LINE_SIZE); 2323e5a335dSHemant Agrawal if (!mc_q) { 233a10a988aSShreyansh Jain DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues"); 2343e5a335dSHemant Agrawal return -1; 2353e5a335dSHemant Agrawal } 2363e5a335dSHemant Agrawal 2373e5a335dSHemant Agrawal for (i = 0; i < priv->nb_rx_queues; i++) { 2383e5a335dSHemant Agrawal mc_q->dev = dev; 2393e5a335dSHemant Agrawal priv->rx_vq[i] = mc_q++; 2403e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 2413e5a335dSHemant Agrawal dpaa2_q->q_storage = rte_malloc("dq_storage", 2423e5a335dSHemant Agrawal sizeof(struct queue_storage_info_t), 2433e5a335dSHemant Agrawal RTE_CACHE_LINE_SIZE); 2443e5a335dSHemant Agrawal if (!dpaa2_q->q_storage) 2453e5a335dSHemant Agrawal goto fail; 2463e5a335dSHemant Agrawal 2473e5a335dSHemant Agrawal memset(dpaa2_q->q_storage, 0, 2483e5a335dSHemant Agrawal sizeof(struct queue_storage_info_t)); 2493cf50ff5SHemant Agrawal if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage)) 2503cf50ff5SHemant Agrawal goto fail; 2513e5a335dSHemant Agrawal } 2523e5a335dSHemant Agrawal 2533e5a335dSHemant Agrawal for (i = 0; i < priv->nb_tx_queues; i++) { 2543e5a335dSHemant Agrawal mc_q->dev = dev; 2557ae777d0SHemant Agrawal mc_q->flow_id = 0xffff; 2563e5a335dSHemant Agrawal priv->tx_vq[i] = mc_q++; 2577ae777d0SHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 2587ae777d0SHemant Agrawal dpaa2_q->cscn = rte_malloc(NULL, 2597ae777d0SHemant Agrawal sizeof(struct qbman_result), 16); 2607ae777d0SHemant Agrawal if (!dpaa2_q->cscn) 2617ae777d0SHemant Agrawal goto fail_tx; 2623e5a335dSHemant Agrawal } 2633e5a335dSHemant Agrawal 2643e5a335dSHemant Agrawal vq_id = 0; 265599017a2SHemant Agrawal for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) { 2663e5a335dSHemant Agrawal mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id]; 2673e5a335dSHemant Agrawal mcq->tc_index = DPAA2_DEF_TC; 2683e5a335dSHemant Agrawal mcq->flow_id = dist_idx; 2693e5a335dSHemant Agrawal vq_id++; 2703e5a335dSHemant Agrawal } 2713e5a335dSHemant Agrawal 2723e5a335dSHemant Agrawal return 0; 2737ae777d0SHemant Agrawal fail_tx: 2747ae777d0SHemant Agrawal i -= 1; 2757ae777d0SHemant Agrawal while (i >= 0) { 2767ae777d0SHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 2777ae777d0SHemant Agrawal rte_free(dpaa2_q->cscn); 2787ae777d0SHemant Agrawal priv->tx_vq[i--] = NULL; 2797ae777d0SHemant Agrawal } 2807ae777d0SHemant Agrawal i = priv->nb_rx_queues; 2813e5a335dSHemant Agrawal fail: 2823e5a335dSHemant Agrawal i -= 1; 2833e5a335dSHemant Agrawal mc_q = priv->rx_vq[0]; 2843e5a335dSHemant Agrawal while (i >= 0) { 2853e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 2863cf50ff5SHemant Agrawal dpaa2_free_dq_storage(dpaa2_q->q_storage); 2873e5a335dSHemant Agrawal rte_free(dpaa2_q->q_storage); 2883e5a335dSHemant Agrawal priv->rx_vq[i--] = NULL; 2893e5a335dSHemant Agrawal } 2903e5a335dSHemant Agrawal rte_free(mc_q); 2913e5a335dSHemant Agrawal return -1; 2923e5a335dSHemant Agrawal } 2933e5a335dSHemant Agrawal 2945d9a1e4dSHemant Agrawal static void 2955d9a1e4dSHemant Agrawal dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev) 2965d9a1e4dSHemant Agrawal { 2975d9a1e4dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 2985d9a1e4dSHemant Agrawal struct dpaa2_queue *dpaa2_q; 2995d9a1e4dSHemant Agrawal int i; 3005d9a1e4dSHemant Agrawal 3015d9a1e4dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 3025d9a1e4dSHemant Agrawal 3035d9a1e4dSHemant Agrawal /* Queue allocation base */ 3045d9a1e4dSHemant Agrawal if (priv->rx_vq[0]) { 3055d9a1e4dSHemant Agrawal /* cleaning up queue storage */ 3065d9a1e4dSHemant Agrawal for (i = 0; i < priv->nb_rx_queues; i++) { 3075d9a1e4dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 3085d9a1e4dSHemant Agrawal if (dpaa2_q->q_storage) 3095d9a1e4dSHemant Agrawal rte_free(dpaa2_q->q_storage); 3105d9a1e4dSHemant Agrawal } 3115d9a1e4dSHemant Agrawal /* cleanup tx queue cscn */ 3125d9a1e4dSHemant Agrawal for (i = 0; i < priv->nb_tx_queues; i++) { 3135d9a1e4dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 3145d9a1e4dSHemant Agrawal rte_free(dpaa2_q->cscn); 3155d9a1e4dSHemant Agrawal } 3165d9a1e4dSHemant Agrawal /*free memory for all queues (RX+TX) */ 3175d9a1e4dSHemant Agrawal rte_free(priv->rx_vq[0]); 3185d9a1e4dSHemant Agrawal priv->rx_vq[0] = NULL; 3195d9a1e4dSHemant Agrawal } 3205d9a1e4dSHemant Agrawal } 3215d9a1e4dSHemant Agrawal 3223e5a335dSHemant Agrawal static int 3233e5a335dSHemant Agrawal dpaa2_eth_dev_configure(struct rte_eth_dev *dev) 3243e5a335dSHemant Agrawal { 32521ce788cSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 32621ce788cSHemant Agrawal struct fsl_mc_io *dpni = priv->hw; 32721ce788cSHemant Agrawal struct rte_eth_conf *eth_conf = &dev->data->dev_conf; 3280ebce612SSunil Kumar Kori uint64_t rx_offloads = eth_conf->rxmode.offloads; 3290ebce612SSunil Kumar Kori uint64_t tx_offloads = eth_conf->txmode.offloads; 3300ebce612SSunil Kumar Kori int rx_l3_csum_offload = false; 3310ebce612SSunil Kumar Kori int rx_l4_csum_offload = false; 3320ebce612SSunil Kumar Kori int tx_l3_csum_offload = false; 3330ebce612SSunil Kumar Kori int tx_l4_csum_offload = false; 33489c2ea8fSHemant Agrawal int ret; 3353e5a335dSHemant Agrawal 3363e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 3373e5a335dSHemant Agrawal 338175fe7d9SSunil Kumar Kori /* Rx offloads validation */ 339175fe7d9SSunil Kumar Kori if (dev_rx_offloads_nodis & ~rx_offloads) { 340175fe7d9SSunil Kumar Kori DPAA2_PMD_WARN( 341175fe7d9SSunil Kumar Kori "Rx offloads non configurable - requested 0x%" PRIx64 342175fe7d9SSunil Kumar Kori " ignored 0x%" PRIx64, 343175fe7d9SSunil Kumar Kori rx_offloads, dev_rx_offloads_nodis); 344175fe7d9SSunil Kumar Kori } 3450ebce612SSunil Kumar Kori 346175fe7d9SSunil Kumar Kori /* Tx offloads validation */ 347175fe7d9SSunil Kumar Kori if (dev_tx_offloads_nodis & ~tx_offloads) { 348175fe7d9SSunil Kumar Kori DPAA2_PMD_WARN( 349175fe7d9SSunil Kumar Kori "Tx offloads non configurable - requested 0x%" PRIx64 350175fe7d9SSunil Kumar Kori " ignored 0x%" PRIx64, 351175fe7d9SSunil Kumar Kori tx_offloads, dev_tx_offloads_nodis); 352175fe7d9SSunil Kumar Kori } 3530ebce612SSunil Kumar Kori 3540ebce612SSunil Kumar Kori if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 355e1640849SHemant Agrawal if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) { 35644ea7355SAshish Jain ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, 35744ea7355SAshish Jain priv->token, eth_conf->rxmode.max_rx_pkt_len); 358e1640849SHemant Agrawal if (ret) { 359a10a988aSShreyansh Jain DPAA2_PMD_ERR( 360a10a988aSShreyansh Jain "Unable to set mtu. check config"); 361e1640849SHemant Agrawal return ret; 362e1640849SHemant Agrawal } 363e1640849SHemant Agrawal } else { 364e1640849SHemant Agrawal return -1; 365e1640849SHemant Agrawal } 366e1640849SHemant Agrawal } 367e1640849SHemant Agrawal 36889c2ea8fSHemant Agrawal if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) { 36989c2ea8fSHemant Agrawal ret = dpaa2_setup_flow_dist(dev, 37089c2ea8fSHemant Agrawal eth_conf->rx_adv_conf.rss_conf.rss_hf); 37189c2ea8fSHemant Agrawal if (ret) { 372a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to set flow distribution." 373a10a988aSShreyansh Jain "Check queue config"); 37489c2ea8fSHemant Agrawal return ret; 37589c2ea8fSHemant Agrawal } 37689c2ea8fSHemant Agrawal } 377c5acbb5eSHemant Agrawal 3780ebce612SSunil Kumar Kori if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM) 3790ebce612SSunil Kumar Kori rx_l3_csum_offload = true; 3800ebce612SSunil Kumar Kori 3810ebce612SSunil Kumar Kori if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) || 3820ebce612SSunil Kumar Kori (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM)) 3830ebce612SSunil Kumar Kori rx_l4_csum_offload = true; 38421ce788cSHemant Agrawal 38521ce788cSHemant Agrawal ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 3860ebce612SSunil Kumar Kori DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload); 38721ce788cSHemant Agrawal if (ret) { 388a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret); 38921ce788cSHemant Agrawal return ret; 39021ce788cSHemant Agrawal } 39121ce788cSHemant Agrawal 39221ce788cSHemant Agrawal ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 3930ebce612SSunil Kumar Kori DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload); 39421ce788cSHemant Agrawal if (ret) { 395a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret); 39621ce788cSHemant Agrawal return ret; 39721ce788cSHemant Agrawal } 39821ce788cSHemant Agrawal 3990ebce612SSunil Kumar Kori if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM) 4000ebce612SSunil Kumar Kori tx_l3_csum_offload = true; 4010ebce612SSunil Kumar Kori 4020ebce612SSunil Kumar Kori if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) || 4030ebce612SSunil Kumar Kori (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) || 4040ebce612SSunil Kumar Kori (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM)) 4050ebce612SSunil Kumar Kori tx_l4_csum_offload = true; 4060ebce612SSunil Kumar Kori 40721ce788cSHemant Agrawal ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 4080ebce612SSunil Kumar Kori DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload); 40921ce788cSHemant Agrawal if (ret) { 410a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret); 41121ce788cSHemant Agrawal return ret; 41221ce788cSHemant Agrawal } 41321ce788cSHemant Agrawal 41421ce788cSHemant Agrawal ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 4150ebce612SSunil Kumar Kori DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload); 41621ce788cSHemant Agrawal if (ret) { 417a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret); 41821ce788cSHemant Agrawal return ret; 41921ce788cSHemant Agrawal } 42021ce788cSHemant Agrawal 421ffb3389cSNipun Gupta /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in 422ffb3389cSNipun Gupta * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC] 423ffb3389cSNipun Gupta * to 0 for LS2 in the hardware thus disabling data/annotation 424ffb3389cSNipun Gupta * stashing. For LX2 this is fixed in hardware and thus hash result and 425ffb3389cSNipun Gupta * parse results can be received in FD using this option. 426ffb3389cSNipun Gupta */ 427ffb3389cSNipun Gupta if (dpaa2_svr_family == SVR_LX2160A) { 428ffb3389cSNipun Gupta ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 429ffb3389cSNipun Gupta DPNI_FLCTYPE_HASH, true); 430ffb3389cSNipun Gupta if (ret) { 431a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret); 432ffb3389cSNipun Gupta return ret; 433ffb3389cSNipun Gupta } 434ffb3389cSNipun Gupta } 435ffb3389cSNipun Gupta 43624f3c9a6SHemant Agrawal if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER) 437c172f85eSHemant Agrawal dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK); 438c172f85eSHemant Agrawal 439c5acbb5eSHemant Agrawal /* update the current status */ 440c5acbb5eSHemant Agrawal dpaa2_dev_link_update(dev, 0); 441c5acbb5eSHemant Agrawal 4423e5a335dSHemant Agrawal return 0; 4433e5a335dSHemant Agrawal } 4443e5a335dSHemant Agrawal 4453e5a335dSHemant Agrawal /* Function to setup RX flow information. It contains traffic class ID, 4463e5a335dSHemant Agrawal * flow ID, destination configuration etc. 4473e5a335dSHemant Agrawal */ 4483e5a335dSHemant Agrawal static int 4493e5a335dSHemant Agrawal dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, 4503e5a335dSHemant Agrawal uint16_t rx_queue_id, 4513e5a335dSHemant Agrawal uint16_t nb_rx_desc __rte_unused, 4523e5a335dSHemant Agrawal unsigned int socket_id __rte_unused, 4533e5a335dSHemant Agrawal const struct rte_eth_rxconf *rx_conf __rte_unused, 4543e5a335dSHemant Agrawal struct rte_mempool *mb_pool) 4553e5a335dSHemant Agrawal { 4563e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 4573e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 4583e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q; 4593e5a335dSHemant Agrawal struct dpni_queue cfg; 4603e5a335dSHemant Agrawal uint8_t options = 0; 4613e5a335dSHemant Agrawal uint8_t flow_id; 462bee61d86SHemant Agrawal uint32_t bpid; 4633e5a335dSHemant Agrawal int ret; 4643e5a335dSHemant Agrawal 4653e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 4663e5a335dSHemant Agrawal 467a10a988aSShreyansh Jain DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p", 4683e5a335dSHemant Agrawal dev, rx_queue_id, mb_pool, rx_conf); 4693e5a335dSHemant Agrawal 470bee61d86SHemant Agrawal if (!priv->bp_list || priv->bp_list->mp != mb_pool) { 471bee61d86SHemant Agrawal bpid = mempool_to_bpid(mb_pool); 472bee61d86SHemant Agrawal ret = dpaa2_attach_bp_list(priv, 473bee61d86SHemant Agrawal rte_dpaa2_bpid_info[bpid].bp_list); 474bee61d86SHemant Agrawal if (ret) 475bee61d86SHemant Agrawal return ret; 476bee61d86SHemant Agrawal } 4773e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 4783e5a335dSHemant Agrawal dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */ 4793e5a335dSHemant Agrawal 480599017a2SHemant Agrawal /*Get the flow id from given VQ id*/ 481599017a2SHemant Agrawal flow_id = rx_queue_id % priv->nb_rx_queues; 4823e5a335dSHemant Agrawal memset(&cfg, 0, sizeof(struct dpni_queue)); 4833e5a335dSHemant Agrawal 4843e5a335dSHemant Agrawal options = options | DPNI_QUEUE_OPT_USER_CTX; 4855ae1edffSHemant Agrawal cfg.user_context = (size_t)(dpaa2_q); 4863e5a335dSHemant Agrawal 48737529eceSHemant Agrawal /*if ls2088 or rev2 device, enable the stashing */ 48830db823eSHemant Agrawal 489e0ded73bSHemant Agrawal if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) { 49037529eceSHemant Agrawal options |= DPNI_QUEUE_OPT_FLC; 49137529eceSHemant Agrawal cfg.flc.stash_control = true; 49237529eceSHemant Agrawal cfg.flc.value &= 0xFFFFFFFFFFFFFFC0; 49337529eceSHemant Agrawal /* 00 00 00 - last 6 bit represent annotation, context stashing, 494e0ded73bSHemant Agrawal * data stashing setting 01 01 00 (0x14) 495e0ded73bSHemant Agrawal * (in following order ->DS AS CS) 496e0ded73bSHemant Agrawal * to enable 1 line data, 1 line annotation. 497e0ded73bSHemant Agrawal * For LX2, this setting should be 01 00 00 (0x10) 49837529eceSHemant Agrawal */ 499e0ded73bSHemant Agrawal if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A) 500e0ded73bSHemant Agrawal cfg.flc.value |= 0x10; 501e0ded73bSHemant Agrawal else 50237529eceSHemant Agrawal cfg.flc.value |= 0x14; 50337529eceSHemant Agrawal } 5043e5a335dSHemant Agrawal ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX, 5053e5a335dSHemant Agrawal dpaa2_q->tc_index, flow_id, options, &cfg); 5063e5a335dSHemant Agrawal if (ret) { 507a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret); 5083e5a335dSHemant Agrawal return -1; 5093e5a335dSHemant Agrawal } 5103e5a335dSHemant Agrawal 51123d6a87eSHemant Agrawal if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) { 51223d6a87eSHemant Agrawal struct dpni_taildrop taildrop; 51323d6a87eSHemant Agrawal 51423d6a87eSHemant Agrawal taildrop.enable = 1; 51523d6a87eSHemant Agrawal /*enabling per rx queue congestion control */ 51623d6a87eSHemant Agrawal taildrop.threshold = CONG_THRESHOLD_RX_Q; 51723d6a87eSHemant Agrawal taildrop.units = DPNI_CONGESTION_UNIT_BYTES; 518d47f0292SHemant Agrawal taildrop.oal = CONG_RX_OAL; 519a10a988aSShreyansh Jain DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d", 52023d6a87eSHemant Agrawal rx_queue_id); 52123d6a87eSHemant Agrawal ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token, 52223d6a87eSHemant Agrawal DPNI_CP_QUEUE, DPNI_QUEUE_RX, 52323d6a87eSHemant Agrawal dpaa2_q->tc_index, flow_id, &taildrop); 52423d6a87eSHemant Agrawal if (ret) { 525a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)", 526a10a988aSShreyansh Jain ret); 52723d6a87eSHemant Agrawal return -1; 52823d6a87eSHemant Agrawal } 52923d6a87eSHemant Agrawal } 53023d6a87eSHemant Agrawal 5313e5a335dSHemant Agrawal dev->data->rx_queues[rx_queue_id] = dpaa2_q; 5323e5a335dSHemant Agrawal return 0; 5333e5a335dSHemant Agrawal } 5343e5a335dSHemant Agrawal 5353e5a335dSHemant Agrawal static int 5363e5a335dSHemant Agrawal dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, 5373e5a335dSHemant Agrawal uint16_t tx_queue_id, 5383e5a335dSHemant Agrawal uint16_t nb_tx_desc __rte_unused, 5393e5a335dSHemant Agrawal unsigned int socket_id __rte_unused, 5403e5a335dSHemant Agrawal const struct rte_eth_txconf *tx_conf __rte_unused) 5413e5a335dSHemant Agrawal { 5423e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 5433e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *) 5443e5a335dSHemant Agrawal priv->tx_vq[tx_queue_id]; 5453e5a335dSHemant Agrawal struct fsl_mc_io *dpni = priv->hw; 5463e5a335dSHemant Agrawal struct dpni_queue tx_conf_cfg; 5473e5a335dSHemant Agrawal struct dpni_queue tx_flow_cfg; 5483e5a335dSHemant Agrawal uint8_t options = 0, flow_id; 5493e5a335dSHemant Agrawal uint32_t tc_id; 5503e5a335dSHemant Agrawal int ret; 5513e5a335dSHemant Agrawal 5523e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 5533e5a335dSHemant Agrawal 5543e5a335dSHemant Agrawal /* Return if queue already configured */ 555f9989673SAkhil Goyal if (dpaa2_q->flow_id != 0xffff) { 556f9989673SAkhil Goyal dev->data->tx_queues[tx_queue_id] = dpaa2_q; 5573e5a335dSHemant Agrawal return 0; 558f9989673SAkhil Goyal } 5593e5a335dSHemant Agrawal 5603e5a335dSHemant Agrawal memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue)); 5613e5a335dSHemant Agrawal memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue)); 5623e5a335dSHemant Agrawal 563ef18dafeSHemant Agrawal tc_id = tx_queue_id; 564ef18dafeSHemant Agrawal flow_id = 0; 5653e5a335dSHemant Agrawal 5663e5a335dSHemant Agrawal ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX, 5673e5a335dSHemant Agrawal tc_id, flow_id, options, &tx_flow_cfg); 5683e5a335dSHemant Agrawal if (ret) { 569a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in setting the tx flow: " 570a10a988aSShreyansh Jain "tc_id=%d, flow=%d err=%d", 571a10a988aSShreyansh Jain tc_id, flow_id, ret); 5723e5a335dSHemant Agrawal return -1; 5733e5a335dSHemant Agrawal } 5743e5a335dSHemant Agrawal 5753e5a335dSHemant Agrawal dpaa2_q->flow_id = flow_id; 5763e5a335dSHemant Agrawal 5773e5a335dSHemant Agrawal if (tx_queue_id == 0) { 5783e5a335dSHemant Agrawal /*Set tx-conf and error configuration*/ 5793e5a335dSHemant Agrawal ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW, 5803e5a335dSHemant Agrawal priv->token, 5813e5a335dSHemant Agrawal DPNI_CONF_DISABLE); 5823e5a335dSHemant Agrawal if (ret) { 583a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in set tx conf mode settings: " 584a10a988aSShreyansh Jain "err=%d", ret); 5853e5a335dSHemant Agrawal return -1; 5863e5a335dSHemant Agrawal } 5873e5a335dSHemant Agrawal } 5883e5a335dSHemant Agrawal dpaa2_q->tc_index = tc_id; 5893e5a335dSHemant Agrawal 590a0840963SHemant Agrawal if (!(priv->flags & DPAA2_TX_CGR_OFF)) { 5917ae777d0SHemant Agrawal struct dpni_congestion_notification_cfg cong_notif_cfg; 5927ae777d0SHemant Agrawal 59329dfa62fSHemant Agrawal cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES; 5947ae777d0SHemant Agrawal cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD; 5957ae777d0SHemant Agrawal /* Notify that the queue is not congested when the data in 5967ae777d0SHemant Agrawal * the queue is below this thershold. 5977ae777d0SHemant Agrawal */ 5987ae777d0SHemant Agrawal cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD; 5997ae777d0SHemant Agrawal cong_notif_cfg.message_ctx = 0; 600543dbfecSNipun Gupta cong_notif_cfg.message_iova = 601543dbfecSNipun Gupta (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn); 6027ae777d0SHemant Agrawal cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE; 6037ae777d0SHemant Agrawal cong_notif_cfg.notification_mode = 6047ae777d0SHemant Agrawal DPNI_CONG_OPT_WRITE_MEM_ON_ENTER | 6057ae777d0SHemant Agrawal DPNI_CONG_OPT_WRITE_MEM_ON_EXIT | 6067ae777d0SHemant Agrawal DPNI_CONG_OPT_COHERENT_WRITE; 6077ae777d0SHemant Agrawal 6087ae777d0SHemant Agrawal ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW, 6097ae777d0SHemant Agrawal priv->token, 6107ae777d0SHemant Agrawal DPNI_QUEUE_TX, 6117ae777d0SHemant Agrawal tc_id, 6127ae777d0SHemant Agrawal &cong_notif_cfg); 6137ae777d0SHemant Agrawal if (ret) { 614a10a988aSShreyansh Jain DPAA2_PMD_ERR( 615a10a988aSShreyansh Jain "Error in setting tx congestion notification: " 616a10a988aSShreyansh Jain "err=%d", ret); 6177ae777d0SHemant Agrawal return -ret; 6187ae777d0SHemant Agrawal } 6197ae777d0SHemant Agrawal } 6203e5a335dSHemant Agrawal dev->data->tx_queues[tx_queue_id] = dpaa2_q; 6213e5a335dSHemant Agrawal return 0; 6223e5a335dSHemant Agrawal } 6233e5a335dSHemant Agrawal 6243e5a335dSHemant Agrawal static void 6253e5a335dSHemant Agrawal dpaa2_dev_rx_queue_release(void *q __rte_unused) 6263e5a335dSHemant Agrawal { 6273e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 6283e5a335dSHemant Agrawal } 6293e5a335dSHemant Agrawal 6303e5a335dSHemant Agrawal static void 6313e5a335dSHemant Agrawal dpaa2_dev_tx_queue_release(void *q __rte_unused) 6323e5a335dSHemant Agrawal { 6333e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 6343e5a335dSHemant Agrawal } 6353e5a335dSHemant Agrawal 636f40adb40SHemant Agrawal static uint32_t 637f40adb40SHemant Agrawal dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) 638f40adb40SHemant Agrawal { 639f40adb40SHemant Agrawal int32_t ret; 640f40adb40SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 641f40adb40SHemant Agrawal struct dpaa2_queue *dpaa2_q; 642f40adb40SHemant Agrawal struct qbman_swp *swp; 643f40adb40SHemant Agrawal struct qbman_fq_query_np_rslt state; 644f40adb40SHemant Agrawal uint32_t frame_cnt = 0; 645f40adb40SHemant Agrawal 646f40adb40SHemant Agrawal PMD_INIT_FUNC_TRACE(); 647f40adb40SHemant Agrawal 648f40adb40SHemant Agrawal if (unlikely(!DPAA2_PER_LCORE_DPIO)) { 649f40adb40SHemant Agrawal ret = dpaa2_affine_qbman_swp(); 650f40adb40SHemant Agrawal if (ret) { 651a10a988aSShreyansh Jain DPAA2_PMD_ERR("Failure in affining portal"); 652f40adb40SHemant Agrawal return -EINVAL; 653f40adb40SHemant Agrawal } 654f40adb40SHemant Agrawal } 655f40adb40SHemant Agrawal swp = DPAA2_PER_LCORE_PORTAL; 656f40adb40SHemant Agrawal 657f40adb40SHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 658f40adb40SHemant Agrawal 659f40adb40SHemant Agrawal if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) { 660f40adb40SHemant Agrawal frame_cnt = qbman_fq_state_frame_count(&state); 661a10a988aSShreyansh Jain DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u", 662f40adb40SHemant Agrawal rx_queue_id, frame_cnt); 663f40adb40SHemant Agrawal } 664f40adb40SHemant Agrawal return frame_cnt; 665f40adb40SHemant Agrawal } 666f40adb40SHemant Agrawal 667a5fc38d4SHemant Agrawal static const uint32_t * 668a5fc38d4SHemant Agrawal dpaa2_supported_ptypes_get(struct rte_eth_dev *dev) 669a5fc38d4SHemant Agrawal { 670a5fc38d4SHemant Agrawal static const uint32_t ptypes[] = { 671a5fc38d4SHemant Agrawal /*todo -= add more types */ 672a5fc38d4SHemant Agrawal RTE_PTYPE_L2_ETHER, 673a5fc38d4SHemant Agrawal RTE_PTYPE_L3_IPV4, 674a5fc38d4SHemant Agrawal RTE_PTYPE_L3_IPV4_EXT, 675a5fc38d4SHemant Agrawal RTE_PTYPE_L3_IPV6, 676a5fc38d4SHemant Agrawal RTE_PTYPE_L3_IPV6_EXT, 677a5fc38d4SHemant Agrawal RTE_PTYPE_L4_TCP, 678a5fc38d4SHemant Agrawal RTE_PTYPE_L4_UDP, 679a5fc38d4SHemant Agrawal RTE_PTYPE_L4_SCTP, 680a5fc38d4SHemant Agrawal RTE_PTYPE_L4_ICMP, 681a5fc38d4SHemant Agrawal RTE_PTYPE_UNKNOWN 682a5fc38d4SHemant Agrawal }; 683a5fc38d4SHemant Agrawal 6845c6942fdSHemant Agrawal if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx) 685a5fc38d4SHemant Agrawal return ptypes; 686a5fc38d4SHemant Agrawal return NULL; 687a5fc38d4SHemant Agrawal } 688a5fc38d4SHemant Agrawal 689c5acbb5eSHemant Agrawal /** 690c5acbb5eSHemant Agrawal * Dpaa2 link Interrupt handler 691c5acbb5eSHemant Agrawal * 692c5acbb5eSHemant Agrawal * @param param 693c5acbb5eSHemant Agrawal * The address of parameter (struct rte_eth_dev *) regsitered before. 694c5acbb5eSHemant Agrawal * 695c5acbb5eSHemant Agrawal * @return 696c5acbb5eSHemant Agrawal * void 697c5acbb5eSHemant Agrawal */ 698c5acbb5eSHemant Agrawal static void 699c5acbb5eSHemant Agrawal dpaa2_interrupt_handler(void *param) 700c5acbb5eSHemant Agrawal { 701c5acbb5eSHemant Agrawal struct rte_eth_dev *dev = param; 702c5acbb5eSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 703c5acbb5eSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 704c5acbb5eSHemant Agrawal int ret; 705c5acbb5eSHemant Agrawal int irq_index = DPNI_IRQ_INDEX; 706c5acbb5eSHemant Agrawal unsigned int status = 0, clear = 0; 707c5acbb5eSHemant Agrawal 708c5acbb5eSHemant Agrawal PMD_INIT_FUNC_TRACE(); 709c5acbb5eSHemant Agrawal 710c5acbb5eSHemant Agrawal if (dpni == NULL) { 711a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 712c5acbb5eSHemant Agrawal return; 713c5acbb5eSHemant Agrawal } 714c5acbb5eSHemant Agrawal 715c5acbb5eSHemant Agrawal ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token, 716c5acbb5eSHemant Agrawal irq_index, &status); 717c5acbb5eSHemant Agrawal if (unlikely(ret)) { 718a10a988aSShreyansh Jain DPAA2_PMD_ERR("Can't get irq status (err %d)", ret); 719c5acbb5eSHemant Agrawal clear = 0xffffffff; 720c5acbb5eSHemant Agrawal goto out; 721c5acbb5eSHemant Agrawal } 722c5acbb5eSHemant Agrawal 723c5acbb5eSHemant Agrawal if (status & DPNI_IRQ_EVENT_LINK_CHANGED) { 724c5acbb5eSHemant Agrawal clear = DPNI_IRQ_EVENT_LINK_CHANGED; 725c5acbb5eSHemant Agrawal dpaa2_dev_link_update(dev, 0); 726c5acbb5eSHemant Agrawal /* calling all the apps registered for link status event */ 727c5acbb5eSHemant Agrawal _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, 728cebe3d7bSThomas Monjalon NULL); 729c5acbb5eSHemant Agrawal } 730c5acbb5eSHemant Agrawal out: 731c5acbb5eSHemant Agrawal ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token, 732c5acbb5eSHemant Agrawal irq_index, clear); 733c5acbb5eSHemant Agrawal if (unlikely(ret)) 734a10a988aSShreyansh Jain DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret); 735c5acbb5eSHemant Agrawal } 736c5acbb5eSHemant Agrawal 737c5acbb5eSHemant Agrawal static int 738c5acbb5eSHemant Agrawal dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable) 739c5acbb5eSHemant Agrawal { 740c5acbb5eSHemant Agrawal int err = 0; 741c5acbb5eSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 742c5acbb5eSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 743c5acbb5eSHemant Agrawal int irq_index = DPNI_IRQ_INDEX; 744c5acbb5eSHemant Agrawal unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED; 745c5acbb5eSHemant Agrawal 746c5acbb5eSHemant Agrawal PMD_INIT_FUNC_TRACE(); 747c5acbb5eSHemant Agrawal 748c5acbb5eSHemant Agrawal err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token, 749c5acbb5eSHemant Agrawal irq_index, mask); 750c5acbb5eSHemant Agrawal if (err < 0) { 751a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err, 752c5acbb5eSHemant Agrawal strerror(-err)); 753c5acbb5eSHemant Agrawal return err; 754c5acbb5eSHemant Agrawal } 755c5acbb5eSHemant Agrawal 756c5acbb5eSHemant Agrawal err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token, 757c5acbb5eSHemant Agrawal irq_index, enable); 758c5acbb5eSHemant Agrawal if (err < 0) 759a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err, 760c5acbb5eSHemant Agrawal strerror(-err)); 761c5acbb5eSHemant Agrawal 762c5acbb5eSHemant Agrawal return err; 763c5acbb5eSHemant Agrawal } 764c5acbb5eSHemant Agrawal 7653e5a335dSHemant Agrawal static int 7663e5a335dSHemant Agrawal dpaa2_dev_start(struct rte_eth_dev *dev) 7673e5a335dSHemant Agrawal { 768c5acbb5eSHemant Agrawal struct rte_device *rdev = dev->device; 769c5acbb5eSHemant Agrawal struct rte_dpaa2_device *dpaa2_dev; 7703e5a335dSHemant Agrawal struct rte_eth_dev_data *data = dev->data; 7713e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = data->dev_private; 7723e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 7733e5a335dSHemant Agrawal struct dpni_queue cfg; 774ef18dafeSHemant Agrawal struct dpni_error_cfg err_cfg; 7753e5a335dSHemant Agrawal uint16_t qdid; 7763e5a335dSHemant Agrawal struct dpni_queue_id qid; 7773e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q; 7783e5a335dSHemant Agrawal int ret, i; 779c5acbb5eSHemant Agrawal struct rte_intr_handle *intr_handle; 780c5acbb5eSHemant Agrawal 781c5acbb5eSHemant Agrawal dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device); 782c5acbb5eSHemant Agrawal intr_handle = &dpaa2_dev->intr_handle; 7833e5a335dSHemant Agrawal 7843e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 7853e5a335dSHemant Agrawal 7863e5a335dSHemant Agrawal ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 7873e5a335dSHemant Agrawal if (ret) { 788a10a988aSShreyansh Jain DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d", 789a10a988aSShreyansh Jain priv->hw_id, ret); 7903e5a335dSHemant Agrawal return ret; 7913e5a335dSHemant Agrawal } 7923e5a335dSHemant Agrawal 793aa8c595aSHemant Agrawal /* Power up the phy. Needed to make the link go UP */ 794a1f3a12cSHemant Agrawal dpaa2_dev_set_link_up(dev); 795a1f3a12cSHemant Agrawal 7963e5a335dSHemant Agrawal ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token, 7973e5a335dSHemant Agrawal DPNI_QUEUE_TX, &qdid); 7983e5a335dSHemant Agrawal if (ret) { 799a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret); 8003e5a335dSHemant Agrawal return ret; 8013e5a335dSHemant Agrawal } 8023e5a335dSHemant Agrawal priv->qdid = qdid; 8033e5a335dSHemant Agrawal 8043e5a335dSHemant Agrawal for (i = 0; i < data->nb_rx_queues; i++) { 8053e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i]; 8063e5a335dSHemant Agrawal ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token, 8073e5a335dSHemant Agrawal DPNI_QUEUE_RX, dpaa2_q->tc_index, 8083e5a335dSHemant Agrawal dpaa2_q->flow_id, &cfg, &qid); 8093e5a335dSHemant Agrawal if (ret) { 810a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in getting flow information: " 811a10a988aSShreyansh Jain "err=%d", ret); 8123e5a335dSHemant Agrawal return ret; 8133e5a335dSHemant Agrawal } 8143e5a335dSHemant Agrawal dpaa2_q->fqid = qid.fqid; 8153e5a335dSHemant Agrawal } 8163e5a335dSHemant Agrawal 817ef18dafeSHemant Agrawal /*checksum errors, send them to normal path and set it in annotation */ 818ef18dafeSHemant Agrawal err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE; 819ef18dafeSHemant Agrawal 820ef18dafeSHemant Agrawal err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE; 821ef18dafeSHemant Agrawal err_cfg.set_frame_annotation = true; 822ef18dafeSHemant Agrawal 823ef18dafeSHemant Agrawal ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW, 824ef18dafeSHemant Agrawal priv->token, &err_cfg); 825ef18dafeSHemant Agrawal if (ret) { 826a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d", 827a10a988aSShreyansh Jain ret); 828ef18dafeSHemant Agrawal return ret; 829ef18dafeSHemant Agrawal } 830ef18dafeSHemant Agrawal 831c5acbb5eSHemant Agrawal /* if the interrupts were configured on this devices*/ 832c5acbb5eSHemant Agrawal if (intr_handle && (intr_handle->fd) && 833c5acbb5eSHemant Agrawal (dev->data->dev_conf.intr_conf.lsc != 0)) { 834c5acbb5eSHemant Agrawal /* Registering LSC interrupt handler */ 835c5acbb5eSHemant Agrawal rte_intr_callback_register(intr_handle, 836c5acbb5eSHemant Agrawal dpaa2_interrupt_handler, 837c5acbb5eSHemant Agrawal (void *)dev); 838c5acbb5eSHemant Agrawal 839c5acbb5eSHemant Agrawal /* enable vfio intr/eventfd mapping 840c5acbb5eSHemant Agrawal * Interrupt index 0 is required, so we can not use 841c5acbb5eSHemant Agrawal * rte_intr_enable. 842c5acbb5eSHemant Agrawal */ 843c5acbb5eSHemant Agrawal rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX); 844c5acbb5eSHemant Agrawal 845c5acbb5eSHemant Agrawal /* enable dpni_irqs */ 846c5acbb5eSHemant Agrawal dpaa2_eth_setup_irqs(dev, 1); 847c5acbb5eSHemant Agrawal } 848c5acbb5eSHemant Agrawal 8493e5a335dSHemant Agrawal return 0; 8503e5a335dSHemant Agrawal } 8513e5a335dSHemant Agrawal 8523e5a335dSHemant Agrawal /** 8533e5a335dSHemant Agrawal * This routine disables all traffic on the adapter by issuing a 8543e5a335dSHemant Agrawal * global reset on the MAC. 8553e5a335dSHemant Agrawal */ 8563e5a335dSHemant Agrawal static void 8573e5a335dSHemant Agrawal dpaa2_dev_stop(struct rte_eth_dev *dev) 8583e5a335dSHemant Agrawal { 8593e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 8603e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 8613e5a335dSHemant Agrawal int ret; 862c56c86ffSHemant Agrawal struct rte_eth_link link; 863c5acbb5eSHemant Agrawal struct rte_intr_handle *intr_handle = dev->intr_handle; 8643e5a335dSHemant Agrawal 8653e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 8663e5a335dSHemant Agrawal 867c5acbb5eSHemant Agrawal /* reset interrupt callback */ 868c5acbb5eSHemant Agrawal if (intr_handle && (intr_handle->fd) && 869c5acbb5eSHemant Agrawal (dev->data->dev_conf.intr_conf.lsc != 0)) { 870c5acbb5eSHemant Agrawal /*disable dpni irqs */ 871c5acbb5eSHemant Agrawal dpaa2_eth_setup_irqs(dev, 0); 872c5acbb5eSHemant Agrawal 873c5acbb5eSHemant Agrawal /* disable vfio intr before callback unregister */ 874c5acbb5eSHemant Agrawal rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX); 875c5acbb5eSHemant Agrawal 876c5acbb5eSHemant Agrawal /* Unregistering LSC interrupt handler */ 877c5acbb5eSHemant Agrawal rte_intr_callback_unregister(intr_handle, 878c5acbb5eSHemant Agrawal dpaa2_interrupt_handler, 879c5acbb5eSHemant Agrawal (void *)dev); 880c5acbb5eSHemant Agrawal } 881c5acbb5eSHemant Agrawal 882a1f3a12cSHemant Agrawal dpaa2_dev_set_link_down(dev); 883a1f3a12cSHemant Agrawal 8843e5a335dSHemant Agrawal ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token); 8853e5a335dSHemant Agrawal if (ret) { 886a10a988aSShreyansh Jain DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev", 8873e5a335dSHemant Agrawal ret, priv->hw_id); 8883e5a335dSHemant Agrawal return; 8893e5a335dSHemant Agrawal } 890c56c86ffSHemant Agrawal 891c56c86ffSHemant Agrawal /* clear the recorded link status */ 892c56c86ffSHemant Agrawal memset(&link, 0, sizeof(link)); 8937e2eb5f0SStephen Hemminger rte_eth_linkstatus_set(dev, &link); 8943e5a335dSHemant Agrawal } 8953e5a335dSHemant Agrawal 8963e5a335dSHemant Agrawal static void 8973e5a335dSHemant Agrawal dpaa2_dev_close(struct rte_eth_dev *dev) 8983e5a335dSHemant Agrawal { 8993e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 9003e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 9015d9a1e4dSHemant Agrawal int ret; 902a1f3a12cSHemant Agrawal struct rte_eth_link link; 9033e5a335dSHemant Agrawal 9043e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 9053e5a335dSHemant Agrawal 9063e5a335dSHemant Agrawal /* Clean the device first */ 9073e5a335dSHemant Agrawal ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token); 9083e5a335dSHemant Agrawal if (ret) { 909a10a988aSShreyansh Jain DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret); 9103e5a335dSHemant Agrawal return; 9113e5a335dSHemant Agrawal } 912a1f3a12cSHemant Agrawal 913a1f3a12cSHemant Agrawal memset(&link, 0, sizeof(link)); 9147e2eb5f0SStephen Hemminger rte_eth_linkstatus_set(dev, &link); 9153e5a335dSHemant Agrawal } 9163e5a335dSHemant Agrawal 917c0e5c69aSHemant Agrawal static void 918c0e5c69aSHemant Agrawal dpaa2_dev_promiscuous_enable( 919c0e5c69aSHemant Agrawal struct rte_eth_dev *dev) 920c0e5c69aSHemant Agrawal { 921c0e5c69aSHemant Agrawal int ret; 922c0e5c69aSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 923c0e5c69aSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 924c0e5c69aSHemant Agrawal 925c0e5c69aSHemant Agrawal PMD_INIT_FUNC_TRACE(); 926c0e5c69aSHemant Agrawal 927c0e5c69aSHemant Agrawal if (dpni == NULL) { 928a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 929c0e5c69aSHemant Agrawal return; 930c0e5c69aSHemant Agrawal } 931c0e5c69aSHemant Agrawal 932c0e5c69aSHemant Agrawal ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 933c0e5c69aSHemant Agrawal if (ret < 0) 934a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret); 9355d5aeeedSHemant Agrawal 9365d5aeeedSHemant Agrawal ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 9375d5aeeedSHemant Agrawal if (ret < 0) 938a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret); 939c0e5c69aSHemant Agrawal } 940c0e5c69aSHemant Agrawal 941c0e5c69aSHemant Agrawal static void 942c0e5c69aSHemant Agrawal dpaa2_dev_promiscuous_disable( 943c0e5c69aSHemant Agrawal struct rte_eth_dev *dev) 944c0e5c69aSHemant Agrawal { 945c0e5c69aSHemant Agrawal int ret; 946c0e5c69aSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 947c0e5c69aSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 948c0e5c69aSHemant Agrawal 949c0e5c69aSHemant Agrawal PMD_INIT_FUNC_TRACE(); 950c0e5c69aSHemant Agrawal 951c0e5c69aSHemant Agrawal if (dpni == NULL) { 952a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 953c0e5c69aSHemant Agrawal return; 954c0e5c69aSHemant Agrawal } 955c0e5c69aSHemant Agrawal 956c0e5c69aSHemant Agrawal ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 957c0e5c69aSHemant Agrawal if (ret < 0) 958a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret); 9595d5aeeedSHemant Agrawal 9605d5aeeedSHemant Agrawal if (dev->data->all_multicast == 0) { 9615d5aeeedSHemant Agrawal ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, 9625d5aeeedSHemant Agrawal priv->token, false); 9635d5aeeedSHemant Agrawal if (ret < 0) 964a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to disable M promisc mode %d", 9655d5aeeedSHemant Agrawal ret); 9665d5aeeedSHemant Agrawal } 9675d5aeeedSHemant Agrawal } 9685d5aeeedSHemant Agrawal 9695d5aeeedSHemant Agrawal static void 9705d5aeeedSHemant Agrawal dpaa2_dev_allmulticast_enable( 9715d5aeeedSHemant Agrawal struct rte_eth_dev *dev) 9725d5aeeedSHemant Agrawal { 9735d5aeeedSHemant Agrawal int ret; 9745d5aeeedSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 9755d5aeeedSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 9765d5aeeedSHemant Agrawal 9775d5aeeedSHemant Agrawal PMD_INIT_FUNC_TRACE(); 9785d5aeeedSHemant Agrawal 9795d5aeeedSHemant Agrawal if (dpni == NULL) { 980a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 9815d5aeeedSHemant Agrawal return; 9825d5aeeedSHemant Agrawal } 9835d5aeeedSHemant Agrawal 9845d5aeeedSHemant Agrawal ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 9855d5aeeedSHemant Agrawal if (ret < 0) 986a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret); 9875d5aeeedSHemant Agrawal } 9885d5aeeedSHemant Agrawal 9895d5aeeedSHemant Agrawal static void 9905d5aeeedSHemant Agrawal dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev) 9915d5aeeedSHemant Agrawal { 9925d5aeeedSHemant Agrawal int ret; 9935d5aeeedSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 9945d5aeeedSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 9955d5aeeedSHemant Agrawal 9965d5aeeedSHemant Agrawal PMD_INIT_FUNC_TRACE(); 9975d5aeeedSHemant Agrawal 9985d5aeeedSHemant Agrawal if (dpni == NULL) { 999a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 10005d5aeeedSHemant Agrawal return; 10015d5aeeedSHemant Agrawal } 10025d5aeeedSHemant Agrawal 10035d5aeeedSHemant Agrawal /* must remain on for all promiscuous */ 10045d5aeeedSHemant Agrawal if (dev->data->promiscuous == 1) 10055d5aeeedSHemant Agrawal return; 10065d5aeeedSHemant Agrawal 10075d5aeeedSHemant Agrawal ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 10085d5aeeedSHemant Agrawal if (ret < 0) 1009a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret); 1010c0e5c69aSHemant Agrawal } 1011e31d4d21SHemant Agrawal 1012e31d4d21SHemant Agrawal static int 1013e31d4d21SHemant Agrawal dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 1014e31d4d21SHemant Agrawal { 1015e31d4d21SHemant Agrawal int ret; 1016e31d4d21SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1017e31d4d21SHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 101844ea7355SAshish Jain uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN 101944ea7355SAshish Jain + VLAN_TAG_SIZE; 1020e31d4d21SHemant Agrawal 1021e31d4d21SHemant Agrawal PMD_INIT_FUNC_TRACE(); 1022e31d4d21SHemant Agrawal 1023e31d4d21SHemant Agrawal if (dpni == NULL) { 1024a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1025e31d4d21SHemant Agrawal return -EINVAL; 1026e31d4d21SHemant Agrawal } 1027e31d4d21SHemant Agrawal 1028e31d4d21SHemant Agrawal /* check that mtu is within the allowed range */ 1029e31d4d21SHemant Agrawal if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN)) 1030e31d4d21SHemant Agrawal return -EINVAL; 1031e31d4d21SHemant Agrawal 1032e1640849SHemant Agrawal if (frame_size > ETHER_MAX_LEN) 10330ebce612SSunil Kumar Kori dev->data->dev_conf.rxmode.offloads &= 10340ebce612SSunil Kumar Kori DEV_RX_OFFLOAD_JUMBO_FRAME; 1035e1640849SHemant Agrawal else 10360ebce612SSunil Kumar Kori dev->data->dev_conf.rxmode.offloads &= 10370ebce612SSunil Kumar Kori ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1038e1640849SHemant Agrawal 103944ea7355SAshish Jain dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 104044ea7355SAshish Jain 1041e31d4d21SHemant Agrawal /* Set the Max Rx frame length as 'mtu' + 1042e31d4d21SHemant Agrawal * Maximum Ethernet header length 1043e31d4d21SHemant Agrawal */ 1044e31d4d21SHemant Agrawal ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token, 104544ea7355SAshish Jain frame_size); 1046e31d4d21SHemant Agrawal if (ret) { 1047a10a988aSShreyansh Jain DPAA2_PMD_ERR("Setting the max frame length failed"); 1048e31d4d21SHemant Agrawal return -1; 1049e31d4d21SHemant Agrawal } 1050a10a988aSShreyansh Jain DPAA2_PMD_INFO("MTU configured for the device: %d", mtu); 1051e31d4d21SHemant Agrawal return 0; 1052e31d4d21SHemant Agrawal } 1053e31d4d21SHemant Agrawal 1054b4d97b7dSHemant Agrawal static int 1055b4d97b7dSHemant Agrawal dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev, 1056b4d97b7dSHemant Agrawal struct ether_addr *addr, 1057b4d97b7dSHemant Agrawal __rte_unused uint32_t index, 1058b4d97b7dSHemant Agrawal __rte_unused uint32_t pool) 1059b4d97b7dSHemant Agrawal { 1060b4d97b7dSHemant Agrawal int ret; 1061b4d97b7dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1062b4d97b7dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1063b4d97b7dSHemant Agrawal 1064b4d97b7dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 1065b4d97b7dSHemant Agrawal 1066b4d97b7dSHemant Agrawal if (dpni == NULL) { 1067a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1068b4d97b7dSHemant Agrawal return -1; 1069b4d97b7dSHemant Agrawal } 1070b4d97b7dSHemant Agrawal 1071b4d97b7dSHemant Agrawal ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW, 1072b4d97b7dSHemant Agrawal priv->token, addr->addr_bytes); 1073b4d97b7dSHemant Agrawal if (ret) 1074a10a988aSShreyansh Jain DPAA2_PMD_ERR( 1075a10a988aSShreyansh Jain "error: Adding the MAC ADDR failed: err = %d", ret); 1076b4d97b7dSHemant Agrawal return 0; 1077b4d97b7dSHemant Agrawal } 1078b4d97b7dSHemant Agrawal 1079b4d97b7dSHemant Agrawal static void 1080b4d97b7dSHemant Agrawal dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev, 1081b4d97b7dSHemant Agrawal uint32_t index) 1082b4d97b7dSHemant Agrawal { 1083b4d97b7dSHemant Agrawal int ret; 1084b4d97b7dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1085b4d97b7dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1086b4d97b7dSHemant Agrawal struct rte_eth_dev_data *data = dev->data; 1087b4d97b7dSHemant Agrawal struct ether_addr *macaddr; 1088b4d97b7dSHemant Agrawal 1089b4d97b7dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 1090b4d97b7dSHemant Agrawal 1091b4d97b7dSHemant Agrawal macaddr = &data->mac_addrs[index]; 1092b4d97b7dSHemant Agrawal 1093b4d97b7dSHemant Agrawal if (dpni == NULL) { 1094a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1095b4d97b7dSHemant Agrawal return; 1096b4d97b7dSHemant Agrawal } 1097b4d97b7dSHemant Agrawal 1098b4d97b7dSHemant Agrawal ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW, 1099b4d97b7dSHemant Agrawal priv->token, macaddr->addr_bytes); 1100b4d97b7dSHemant Agrawal if (ret) 1101a10a988aSShreyansh Jain DPAA2_PMD_ERR( 1102a10a988aSShreyansh Jain "error: Removing the MAC ADDR failed: err = %d", ret); 1103b4d97b7dSHemant Agrawal } 1104b4d97b7dSHemant Agrawal 1105caccf8b3SOlivier Matz static int 1106b4d97b7dSHemant Agrawal dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev, 1107b4d97b7dSHemant Agrawal struct ether_addr *addr) 1108b4d97b7dSHemant Agrawal { 1109b4d97b7dSHemant Agrawal int ret; 1110b4d97b7dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1111b4d97b7dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1112b4d97b7dSHemant Agrawal 1113b4d97b7dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 1114b4d97b7dSHemant Agrawal 1115b4d97b7dSHemant Agrawal if (dpni == NULL) { 1116a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1117caccf8b3SOlivier Matz return -EINVAL; 1118b4d97b7dSHemant Agrawal } 1119b4d97b7dSHemant Agrawal 1120b4d97b7dSHemant Agrawal ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW, 1121b4d97b7dSHemant Agrawal priv->token, addr->addr_bytes); 1122b4d97b7dSHemant Agrawal 1123b4d97b7dSHemant Agrawal if (ret) 1124a10a988aSShreyansh Jain DPAA2_PMD_ERR( 1125a10a988aSShreyansh Jain "error: Setting the MAC ADDR failed %d", ret); 1126caccf8b3SOlivier Matz 1127caccf8b3SOlivier Matz return ret; 1128b4d97b7dSHemant Agrawal } 1129a10a988aSShreyansh Jain 1130b0aa5459SHemant Agrawal static 1131d5b0924bSMatan Azrad int dpaa2_dev_stats_get(struct rte_eth_dev *dev, 1132b0aa5459SHemant Agrawal struct rte_eth_stats *stats) 1133b0aa5459SHemant Agrawal { 1134b0aa5459SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1135b0aa5459SHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1136b0aa5459SHemant Agrawal int32_t retcode; 1137b0aa5459SHemant Agrawal uint8_t page0 = 0, page1 = 1, page2 = 2; 1138b0aa5459SHemant Agrawal union dpni_statistics value; 1139e43f2521SShreyansh Jain int i; 1140e43f2521SShreyansh Jain struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq; 1141b0aa5459SHemant Agrawal 1142b0aa5459SHemant Agrawal memset(&value, 0, sizeof(union dpni_statistics)); 1143b0aa5459SHemant Agrawal 1144b0aa5459SHemant Agrawal PMD_INIT_FUNC_TRACE(); 1145b0aa5459SHemant Agrawal 1146b0aa5459SHemant Agrawal if (!dpni) { 1147a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1148d5b0924bSMatan Azrad return -EINVAL; 1149b0aa5459SHemant Agrawal } 1150b0aa5459SHemant Agrawal 1151b0aa5459SHemant Agrawal if (!stats) { 1152a10a988aSShreyansh Jain DPAA2_PMD_ERR("stats is NULL"); 1153d5b0924bSMatan Azrad return -EINVAL; 1154b0aa5459SHemant Agrawal } 1155b0aa5459SHemant Agrawal 1156b0aa5459SHemant Agrawal /*Get Counters from page_0*/ 1157b0aa5459SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 115816bbc98aSShreyansh Jain page0, 0, &value); 1159b0aa5459SHemant Agrawal if (retcode) 1160b0aa5459SHemant Agrawal goto err; 1161b0aa5459SHemant Agrawal 1162b0aa5459SHemant Agrawal stats->ipackets = value.page_0.ingress_all_frames; 1163b0aa5459SHemant Agrawal stats->ibytes = value.page_0.ingress_all_bytes; 1164b0aa5459SHemant Agrawal 1165b0aa5459SHemant Agrawal /*Get Counters from page_1*/ 1166b0aa5459SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 116716bbc98aSShreyansh Jain page1, 0, &value); 1168b0aa5459SHemant Agrawal if (retcode) 1169b0aa5459SHemant Agrawal goto err; 1170b0aa5459SHemant Agrawal 1171b0aa5459SHemant Agrawal stats->opackets = value.page_1.egress_all_frames; 1172b0aa5459SHemant Agrawal stats->obytes = value.page_1.egress_all_bytes; 1173b0aa5459SHemant Agrawal 1174b0aa5459SHemant Agrawal /*Get Counters from page_2*/ 1175b0aa5459SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 117616bbc98aSShreyansh Jain page2, 0, &value); 1177b0aa5459SHemant Agrawal if (retcode) 1178b0aa5459SHemant Agrawal goto err; 1179b0aa5459SHemant Agrawal 1180b4d97b7dSHemant Agrawal /* Ingress drop frame count due to configured rules */ 1181b4d97b7dSHemant Agrawal stats->ierrors = value.page_2.ingress_filtered_frames; 1182b4d97b7dSHemant Agrawal /* Ingress drop frame count due to error */ 1183b4d97b7dSHemant Agrawal stats->ierrors += value.page_2.ingress_discarded_frames; 1184b4d97b7dSHemant Agrawal 1185b0aa5459SHemant Agrawal stats->oerrors = value.page_2.egress_discarded_frames; 1186b0aa5459SHemant Agrawal stats->imissed = value.page_2.ingress_nobuffer_discards; 1187b0aa5459SHemant Agrawal 1188e43f2521SShreyansh Jain /* Fill in per queue stats */ 1189e43f2521SShreyansh Jain for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) && 1190e43f2521SShreyansh Jain (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) { 1191e43f2521SShreyansh Jain dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i]; 1192e43f2521SShreyansh Jain dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i]; 1193e43f2521SShreyansh Jain if (dpaa2_rxq) 1194e43f2521SShreyansh Jain stats->q_ipackets[i] = dpaa2_rxq->rx_pkts; 1195e43f2521SShreyansh Jain if (dpaa2_txq) 1196e43f2521SShreyansh Jain stats->q_opackets[i] = dpaa2_txq->tx_pkts; 1197e43f2521SShreyansh Jain 1198e43f2521SShreyansh Jain /* Byte counting is not implemented */ 1199e43f2521SShreyansh Jain stats->q_ibytes[i] = 0; 1200e43f2521SShreyansh Jain stats->q_obytes[i] = 0; 1201e43f2521SShreyansh Jain } 1202e43f2521SShreyansh Jain 1203d5b0924bSMatan Azrad return 0; 1204b0aa5459SHemant Agrawal 1205b0aa5459SHemant Agrawal err: 1206a10a988aSShreyansh Jain DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode); 1207d5b0924bSMatan Azrad return retcode; 1208b0aa5459SHemant Agrawal }; 1209b0aa5459SHemant Agrawal 12101d6329b2SHemant Agrawal static int 12111d6329b2SHemant Agrawal dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 12121d6329b2SHemant Agrawal unsigned int n) 12131d6329b2SHemant Agrawal { 12141d6329b2SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 12151d6329b2SHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 12161d6329b2SHemant Agrawal int32_t retcode; 12171d6329b2SHemant Agrawal union dpni_statistics value[3] = {}; 12181d6329b2SHemant Agrawal unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings); 12191d6329b2SHemant Agrawal 12201d6329b2SHemant Agrawal if (n < num) 12211d6329b2SHemant Agrawal return num; 12221d6329b2SHemant Agrawal 1223876b2c90SHemant Agrawal if (xstats == NULL) 1224876b2c90SHemant Agrawal return 0; 1225876b2c90SHemant Agrawal 12261d6329b2SHemant Agrawal /* Get Counters from page_0*/ 12271d6329b2SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 12281d6329b2SHemant Agrawal 0, 0, &value[0]); 12291d6329b2SHemant Agrawal if (retcode) 12301d6329b2SHemant Agrawal goto err; 12311d6329b2SHemant Agrawal 12321d6329b2SHemant Agrawal /* Get Counters from page_1*/ 12331d6329b2SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 12341d6329b2SHemant Agrawal 1, 0, &value[1]); 12351d6329b2SHemant Agrawal if (retcode) 12361d6329b2SHemant Agrawal goto err; 12371d6329b2SHemant Agrawal 12381d6329b2SHemant Agrawal /* Get Counters from page_2*/ 12391d6329b2SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 12401d6329b2SHemant Agrawal 2, 0, &value[2]); 12411d6329b2SHemant Agrawal if (retcode) 12421d6329b2SHemant Agrawal goto err; 12431d6329b2SHemant Agrawal 12441d6329b2SHemant Agrawal for (i = 0; i < num; i++) { 12451d6329b2SHemant Agrawal xstats[i].id = i; 12461d6329b2SHemant Agrawal xstats[i].value = value[dpaa2_xstats_strings[i].page_id]. 12471d6329b2SHemant Agrawal raw.counter[dpaa2_xstats_strings[i].stats_id]; 12481d6329b2SHemant Agrawal } 12491d6329b2SHemant Agrawal return i; 12501d6329b2SHemant Agrawal err: 1251a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode); 12521d6329b2SHemant Agrawal return retcode; 12531d6329b2SHemant Agrawal } 12541d6329b2SHemant Agrawal 12551d6329b2SHemant Agrawal static int 12561d6329b2SHemant Agrawal dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 12571d6329b2SHemant Agrawal struct rte_eth_xstat_name *xstats_names, 1258876b2c90SHemant Agrawal unsigned int limit) 12591d6329b2SHemant Agrawal { 12601d6329b2SHemant Agrawal unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 12611d6329b2SHemant Agrawal 1262876b2c90SHemant Agrawal if (limit < stat_cnt) 1263876b2c90SHemant Agrawal return stat_cnt; 1264876b2c90SHemant Agrawal 12651d6329b2SHemant Agrawal if (xstats_names != NULL) 12661d6329b2SHemant Agrawal for (i = 0; i < stat_cnt; i++) 12671d6329b2SHemant Agrawal snprintf(xstats_names[i].name, 12681d6329b2SHemant Agrawal sizeof(xstats_names[i].name), 12691d6329b2SHemant Agrawal "%s", 12701d6329b2SHemant Agrawal dpaa2_xstats_strings[i].name); 12711d6329b2SHemant Agrawal 12721d6329b2SHemant Agrawal return stat_cnt; 12731d6329b2SHemant Agrawal } 12741d6329b2SHemant Agrawal 12751d6329b2SHemant Agrawal static int 12761d6329b2SHemant Agrawal dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 12771d6329b2SHemant Agrawal uint64_t *values, unsigned int n) 12781d6329b2SHemant Agrawal { 12791d6329b2SHemant Agrawal unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 12801d6329b2SHemant Agrawal uint64_t values_copy[stat_cnt]; 12811d6329b2SHemant Agrawal 12821d6329b2SHemant Agrawal if (!ids) { 12831d6329b2SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 12841d6329b2SHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 12851d6329b2SHemant Agrawal int32_t retcode; 12861d6329b2SHemant Agrawal union dpni_statistics value[3] = {}; 12871d6329b2SHemant Agrawal 12881d6329b2SHemant Agrawal if (n < stat_cnt) 12891d6329b2SHemant Agrawal return stat_cnt; 12901d6329b2SHemant Agrawal 12911d6329b2SHemant Agrawal if (!values) 12921d6329b2SHemant Agrawal return 0; 12931d6329b2SHemant Agrawal 12941d6329b2SHemant Agrawal /* Get Counters from page_0*/ 12951d6329b2SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 12961d6329b2SHemant Agrawal 0, 0, &value[0]); 12971d6329b2SHemant Agrawal if (retcode) 12981d6329b2SHemant Agrawal return 0; 12991d6329b2SHemant Agrawal 13001d6329b2SHemant Agrawal /* Get Counters from page_1*/ 13011d6329b2SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 13021d6329b2SHemant Agrawal 1, 0, &value[1]); 13031d6329b2SHemant Agrawal if (retcode) 13041d6329b2SHemant Agrawal return 0; 13051d6329b2SHemant Agrawal 13061d6329b2SHemant Agrawal /* Get Counters from page_2*/ 13071d6329b2SHemant Agrawal retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token, 13081d6329b2SHemant Agrawal 2, 0, &value[2]); 13091d6329b2SHemant Agrawal if (retcode) 13101d6329b2SHemant Agrawal return 0; 13111d6329b2SHemant Agrawal 13121d6329b2SHemant Agrawal for (i = 0; i < stat_cnt; i++) { 13131d6329b2SHemant Agrawal values[i] = value[dpaa2_xstats_strings[i].page_id]. 13141d6329b2SHemant Agrawal raw.counter[dpaa2_xstats_strings[i].stats_id]; 13151d6329b2SHemant Agrawal } 13161d6329b2SHemant Agrawal return stat_cnt; 13171d6329b2SHemant Agrawal } 13181d6329b2SHemant Agrawal 13191d6329b2SHemant Agrawal dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt); 13201d6329b2SHemant Agrawal 13211d6329b2SHemant Agrawal for (i = 0; i < n; i++) { 13221d6329b2SHemant Agrawal if (ids[i] >= stat_cnt) { 1323a10a988aSShreyansh Jain DPAA2_PMD_ERR("xstats id value isn't valid"); 13241d6329b2SHemant Agrawal return -1; 13251d6329b2SHemant Agrawal } 13261d6329b2SHemant Agrawal values[i] = values_copy[ids[i]]; 13271d6329b2SHemant Agrawal } 13281d6329b2SHemant Agrawal return n; 13291d6329b2SHemant Agrawal } 13301d6329b2SHemant Agrawal 13311d6329b2SHemant Agrawal static int 13321d6329b2SHemant Agrawal dpaa2_xstats_get_names_by_id( 13331d6329b2SHemant Agrawal struct rte_eth_dev *dev, 13341d6329b2SHemant Agrawal struct rte_eth_xstat_name *xstats_names, 13351d6329b2SHemant Agrawal const uint64_t *ids, 13361d6329b2SHemant Agrawal unsigned int limit) 13371d6329b2SHemant Agrawal { 13381d6329b2SHemant Agrawal unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings); 13391d6329b2SHemant Agrawal struct rte_eth_xstat_name xstats_names_copy[stat_cnt]; 13401d6329b2SHemant Agrawal 13411d6329b2SHemant Agrawal if (!ids) 13421d6329b2SHemant Agrawal return dpaa2_xstats_get_names(dev, xstats_names, limit); 13431d6329b2SHemant Agrawal 13441d6329b2SHemant Agrawal dpaa2_xstats_get_names(dev, xstats_names_copy, limit); 13451d6329b2SHemant Agrawal 13461d6329b2SHemant Agrawal for (i = 0; i < limit; i++) { 13471d6329b2SHemant Agrawal if (ids[i] >= stat_cnt) { 1348a10a988aSShreyansh Jain DPAA2_PMD_ERR("xstats id value isn't valid"); 13491d6329b2SHemant Agrawal return -1; 13501d6329b2SHemant Agrawal } 13511d6329b2SHemant Agrawal strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 13521d6329b2SHemant Agrawal } 13531d6329b2SHemant Agrawal return limit; 13541d6329b2SHemant Agrawal } 13551d6329b2SHemant Agrawal 13561d6329b2SHemant Agrawal static void 13571d6329b2SHemant Agrawal dpaa2_dev_stats_reset(struct rte_eth_dev *dev) 1358b0aa5459SHemant Agrawal { 1359b0aa5459SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1360b0aa5459SHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 1361b0aa5459SHemant Agrawal int32_t retcode; 1362e43f2521SShreyansh Jain int i; 1363e43f2521SShreyansh Jain struct dpaa2_queue *dpaa2_q; 1364b0aa5459SHemant Agrawal 1365b0aa5459SHemant Agrawal PMD_INIT_FUNC_TRACE(); 1366b0aa5459SHemant Agrawal 1367b0aa5459SHemant Agrawal if (dpni == NULL) { 1368a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1369b0aa5459SHemant Agrawal return; 1370b0aa5459SHemant Agrawal } 1371b0aa5459SHemant Agrawal 1372b0aa5459SHemant Agrawal retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token); 1373b0aa5459SHemant Agrawal if (retcode) 1374b0aa5459SHemant Agrawal goto error; 1375b0aa5459SHemant Agrawal 1376e43f2521SShreyansh Jain /* Reset the per queue stats in dpaa2_queue structure */ 1377e43f2521SShreyansh Jain for (i = 0; i < priv->nb_rx_queues; i++) { 1378e43f2521SShreyansh Jain dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 1379e43f2521SShreyansh Jain if (dpaa2_q) 1380e43f2521SShreyansh Jain dpaa2_q->rx_pkts = 0; 1381e43f2521SShreyansh Jain } 1382e43f2521SShreyansh Jain 1383e43f2521SShreyansh Jain for (i = 0; i < priv->nb_tx_queues; i++) { 1384e43f2521SShreyansh Jain dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i]; 1385e43f2521SShreyansh Jain if (dpaa2_q) 1386e43f2521SShreyansh Jain dpaa2_q->tx_pkts = 0; 1387e43f2521SShreyansh Jain } 1388e43f2521SShreyansh Jain 1389b0aa5459SHemant Agrawal return; 1390b0aa5459SHemant Agrawal 1391b0aa5459SHemant Agrawal error: 1392a10a988aSShreyansh Jain DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode); 1393b0aa5459SHemant Agrawal return; 1394b0aa5459SHemant Agrawal }; 1395b0aa5459SHemant Agrawal 1396c56c86ffSHemant Agrawal /* return 0 means link status changed, -1 means not changed */ 1397c56c86ffSHemant Agrawal static int 1398c56c86ffSHemant Agrawal dpaa2_dev_link_update(struct rte_eth_dev *dev, 1399c56c86ffSHemant Agrawal int wait_to_complete __rte_unused) 1400c56c86ffSHemant Agrawal { 1401c56c86ffSHemant Agrawal int ret; 1402c56c86ffSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1403c56c86ffSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 14047e2eb5f0SStephen Hemminger struct rte_eth_link link; 1405c56c86ffSHemant Agrawal struct dpni_link_state state = {0}; 1406c56c86ffSHemant Agrawal 1407c56c86ffSHemant Agrawal if (dpni == NULL) { 1408a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1409c56c86ffSHemant Agrawal return 0; 1410c56c86ffSHemant Agrawal } 1411c56c86ffSHemant Agrawal 1412c56c86ffSHemant Agrawal ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1413c56c86ffSHemant Agrawal if (ret < 0) { 141444e87c27SShreyansh Jain DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret); 1415c56c86ffSHemant Agrawal return -1; 1416c56c86ffSHemant Agrawal } 1417c56c86ffSHemant Agrawal 1418c56c86ffSHemant Agrawal memset(&link, 0, sizeof(struct rte_eth_link)); 1419c56c86ffSHemant Agrawal link.link_status = state.up; 1420c56c86ffSHemant Agrawal link.link_speed = state.rate; 1421c56c86ffSHemant Agrawal 1422c56c86ffSHemant Agrawal if (state.options & DPNI_LINK_OPT_HALF_DUPLEX) 1423c56c86ffSHemant Agrawal link.link_duplex = ETH_LINK_HALF_DUPLEX; 1424c56c86ffSHemant Agrawal else 1425c56c86ffSHemant Agrawal link.link_duplex = ETH_LINK_FULL_DUPLEX; 1426c56c86ffSHemant Agrawal 14277e2eb5f0SStephen Hemminger ret = rte_eth_linkstatus_set(dev, &link); 14287e2eb5f0SStephen Hemminger if (ret == -1) 1429a10a988aSShreyansh Jain DPAA2_PMD_DEBUG("No change in status"); 1430c56c86ffSHemant Agrawal else 1431a10a988aSShreyansh Jain DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id, 14327e2eb5f0SStephen Hemminger link.link_status ? "Up" : "Down"); 14337e2eb5f0SStephen Hemminger 14347e2eb5f0SStephen Hemminger return ret; 1435c56c86ffSHemant Agrawal } 1436c56c86ffSHemant Agrawal 1437a1f3a12cSHemant Agrawal /** 1438a1f3a12cSHemant Agrawal * Toggle the DPNI to enable, if not already enabled. 1439a1f3a12cSHemant Agrawal * This is not strictly PHY up/down - it is more of logical toggling. 1440a1f3a12cSHemant Agrawal */ 1441a1f3a12cSHemant Agrawal static int 1442a1f3a12cSHemant Agrawal dpaa2_dev_set_link_up(struct rte_eth_dev *dev) 1443a1f3a12cSHemant Agrawal { 1444a1f3a12cSHemant Agrawal int ret = -EINVAL; 1445a1f3a12cSHemant Agrawal struct dpaa2_dev_priv *priv; 1446a1f3a12cSHemant Agrawal struct fsl_mc_io *dpni; 1447a1f3a12cSHemant Agrawal int en = 0; 1448aa8c595aSHemant Agrawal struct dpni_link_state state = {0}; 1449a1f3a12cSHemant Agrawal 1450a1f3a12cSHemant Agrawal priv = dev->data->dev_private; 1451a1f3a12cSHemant Agrawal dpni = (struct fsl_mc_io *)priv->hw; 1452a1f3a12cSHemant Agrawal 1453a1f3a12cSHemant Agrawal if (dpni == NULL) { 1454a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1455a1f3a12cSHemant Agrawal return ret; 1456a1f3a12cSHemant Agrawal } 1457a1f3a12cSHemant Agrawal 1458a1f3a12cSHemant Agrawal /* Check if DPNI is currently enabled */ 1459a1f3a12cSHemant Agrawal ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en); 1460a1f3a12cSHemant Agrawal if (ret) { 1461a1f3a12cSHemant Agrawal /* Unable to obtain dpni status; Not continuing */ 1462a10a988aSShreyansh Jain DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret); 1463a1f3a12cSHemant Agrawal return -EINVAL; 1464a1f3a12cSHemant Agrawal } 1465a1f3a12cSHemant Agrawal 1466a1f3a12cSHemant Agrawal /* Enable link if not already enabled */ 1467a1f3a12cSHemant Agrawal if (!en) { 1468a1f3a12cSHemant Agrawal ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 1469a1f3a12cSHemant Agrawal if (ret) { 1470a10a988aSShreyansh Jain DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret); 1471a1f3a12cSHemant Agrawal return -EINVAL; 1472a1f3a12cSHemant Agrawal } 1473a1f3a12cSHemant Agrawal } 1474aa8c595aSHemant Agrawal ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1475aa8c595aSHemant Agrawal if (ret < 0) { 147644e87c27SShreyansh Jain DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret); 1477aa8c595aSHemant Agrawal return -1; 1478aa8c595aSHemant Agrawal } 1479aa8c595aSHemant Agrawal 1480a1f3a12cSHemant Agrawal /* changing tx burst function to start enqueues */ 1481a1f3a12cSHemant Agrawal dev->tx_pkt_burst = dpaa2_dev_tx; 1482aa8c595aSHemant Agrawal dev->data->dev_link.link_status = state.up; 1483a1f3a12cSHemant Agrawal 1484aa8c595aSHemant Agrawal if (state.up) 1485a10a988aSShreyansh Jain DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id); 1486aa8c595aSHemant Agrawal else 1487a10a988aSShreyansh Jain DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id); 1488a1f3a12cSHemant Agrawal return ret; 1489a1f3a12cSHemant Agrawal } 1490a1f3a12cSHemant Agrawal 1491a1f3a12cSHemant Agrawal /** 1492a1f3a12cSHemant Agrawal * Toggle the DPNI to disable, if not already disabled. 1493a1f3a12cSHemant Agrawal * This is not strictly PHY up/down - it is more of logical toggling. 1494a1f3a12cSHemant Agrawal */ 1495a1f3a12cSHemant Agrawal static int 1496a1f3a12cSHemant Agrawal dpaa2_dev_set_link_down(struct rte_eth_dev *dev) 1497a1f3a12cSHemant Agrawal { 1498a1f3a12cSHemant Agrawal int ret = -EINVAL; 1499a1f3a12cSHemant Agrawal struct dpaa2_dev_priv *priv; 1500a1f3a12cSHemant Agrawal struct fsl_mc_io *dpni; 1501a1f3a12cSHemant Agrawal int dpni_enabled = 0; 1502a1f3a12cSHemant Agrawal int retries = 10; 1503a1f3a12cSHemant Agrawal 1504a1f3a12cSHemant Agrawal PMD_INIT_FUNC_TRACE(); 1505a1f3a12cSHemant Agrawal 1506a1f3a12cSHemant Agrawal priv = dev->data->dev_private; 1507a1f3a12cSHemant Agrawal dpni = (struct fsl_mc_io *)priv->hw; 1508a1f3a12cSHemant Agrawal 1509a1f3a12cSHemant Agrawal if (dpni == NULL) { 1510a10a988aSShreyansh Jain DPAA2_PMD_ERR("Device has not yet been configured"); 1511a1f3a12cSHemant Agrawal return ret; 1512a1f3a12cSHemant Agrawal } 1513a1f3a12cSHemant Agrawal 1514a1f3a12cSHemant Agrawal /*changing tx burst function to avoid any more enqueues */ 1515a1f3a12cSHemant Agrawal dev->tx_pkt_burst = dummy_dev_tx; 1516a1f3a12cSHemant Agrawal 1517a1f3a12cSHemant Agrawal /* Loop while dpni_disable() attempts to drain the egress FQs 1518a1f3a12cSHemant Agrawal * and confirm them back to us. 1519a1f3a12cSHemant Agrawal */ 1520a1f3a12cSHemant Agrawal do { 1521a1f3a12cSHemant Agrawal ret = dpni_disable(dpni, 0, priv->token); 1522a1f3a12cSHemant Agrawal if (ret) { 1523a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni disable failed (%d)", ret); 1524a1f3a12cSHemant Agrawal return ret; 1525a1f3a12cSHemant Agrawal } 1526a1f3a12cSHemant Agrawal ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled); 1527a1f3a12cSHemant Agrawal if (ret) { 1528a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni enable check failed (%d)", ret); 1529a1f3a12cSHemant Agrawal return ret; 1530a1f3a12cSHemant Agrawal } 1531a1f3a12cSHemant Agrawal if (dpni_enabled) 1532a1f3a12cSHemant Agrawal /* Allow the MC some slack */ 1533a1f3a12cSHemant Agrawal rte_delay_us(100 * 1000); 1534a1f3a12cSHemant Agrawal } while (dpni_enabled && --retries); 1535a1f3a12cSHemant Agrawal 1536a1f3a12cSHemant Agrawal if (!retries) { 1537a10a988aSShreyansh Jain DPAA2_PMD_WARN("Retry count exceeded disabling dpni"); 1538a1f3a12cSHemant Agrawal /* todo- we may have to manually cleanup queues. 1539a1f3a12cSHemant Agrawal */ 1540a1f3a12cSHemant Agrawal } else { 1541a10a988aSShreyansh Jain DPAA2_PMD_INFO("Port %d Link DOWN successful", 1542a1f3a12cSHemant Agrawal dev->data->port_id); 1543a1f3a12cSHemant Agrawal } 1544a1f3a12cSHemant Agrawal 1545a1f3a12cSHemant Agrawal dev->data->dev_link.link_status = 0; 1546a1f3a12cSHemant Agrawal 1547a1f3a12cSHemant Agrawal return ret; 1548a1f3a12cSHemant Agrawal } 1549a1f3a12cSHemant Agrawal 1550977d0006SHemant Agrawal static int 1551977d0006SHemant Agrawal dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1552977d0006SHemant Agrawal { 1553977d0006SHemant Agrawal int ret = -EINVAL; 1554977d0006SHemant Agrawal struct dpaa2_dev_priv *priv; 1555977d0006SHemant Agrawal struct fsl_mc_io *dpni; 1556977d0006SHemant Agrawal struct dpni_link_state state = {0}; 1557977d0006SHemant Agrawal 1558977d0006SHemant Agrawal PMD_INIT_FUNC_TRACE(); 1559977d0006SHemant Agrawal 1560977d0006SHemant Agrawal priv = dev->data->dev_private; 1561977d0006SHemant Agrawal dpni = (struct fsl_mc_io *)priv->hw; 1562977d0006SHemant Agrawal 1563977d0006SHemant Agrawal if (dpni == NULL || fc_conf == NULL) { 1564a10a988aSShreyansh Jain DPAA2_PMD_ERR("device not configured"); 1565977d0006SHemant Agrawal return ret; 1566977d0006SHemant Agrawal } 1567977d0006SHemant Agrawal 1568977d0006SHemant Agrawal ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1569977d0006SHemant Agrawal if (ret) { 1570a10a988aSShreyansh Jain DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret); 1571977d0006SHemant Agrawal return ret; 1572977d0006SHemant Agrawal } 1573977d0006SHemant Agrawal 1574977d0006SHemant Agrawal memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf)); 1575977d0006SHemant Agrawal if (state.options & DPNI_LINK_OPT_PAUSE) { 1576977d0006SHemant Agrawal /* DPNI_LINK_OPT_PAUSE set 1577977d0006SHemant Agrawal * if ASYM_PAUSE not set, 1578977d0006SHemant Agrawal * RX Side flow control (handle received Pause frame) 1579977d0006SHemant Agrawal * TX side flow control (send Pause frame) 1580977d0006SHemant Agrawal * if ASYM_PAUSE set, 1581977d0006SHemant Agrawal * RX Side flow control (handle received Pause frame) 1582977d0006SHemant Agrawal * No TX side flow control (send Pause frame disabled) 1583977d0006SHemant Agrawal */ 1584977d0006SHemant Agrawal if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE)) 1585977d0006SHemant Agrawal fc_conf->mode = RTE_FC_FULL; 1586977d0006SHemant Agrawal else 1587977d0006SHemant Agrawal fc_conf->mode = RTE_FC_RX_PAUSE; 1588977d0006SHemant Agrawal } else { 1589977d0006SHemant Agrawal /* DPNI_LINK_OPT_PAUSE not set 1590977d0006SHemant Agrawal * if ASYM_PAUSE set, 1591977d0006SHemant Agrawal * TX side flow control (send Pause frame) 1592977d0006SHemant Agrawal * No RX side flow control (No action on pause frame rx) 1593977d0006SHemant Agrawal * if ASYM_PAUSE not set, 1594977d0006SHemant Agrawal * Flow control disabled 1595977d0006SHemant Agrawal */ 1596977d0006SHemant Agrawal if (state.options & DPNI_LINK_OPT_ASYM_PAUSE) 1597977d0006SHemant Agrawal fc_conf->mode = RTE_FC_TX_PAUSE; 1598977d0006SHemant Agrawal else 1599977d0006SHemant Agrawal fc_conf->mode = RTE_FC_NONE; 1600977d0006SHemant Agrawal } 1601977d0006SHemant Agrawal 1602977d0006SHemant Agrawal return ret; 1603977d0006SHemant Agrawal } 1604977d0006SHemant Agrawal 1605977d0006SHemant Agrawal static int 1606977d0006SHemant Agrawal dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) 1607977d0006SHemant Agrawal { 1608977d0006SHemant Agrawal int ret = -EINVAL; 1609977d0006SHemant Agrawal struct dpaa2_dev_priv *priv; 1610977d0006SHemant Agrawal struct fsl_mc_io *dpni; 1611977d0006SHemant Agrawal struct dpni_link_state state = {0}; 1612977d0006SHemant Agrawal struct dpni_link_cfg cfg = {0}; 1613977d0006SHemant Agrawal 1614977d0006SHemant Agrawal PMD_INIT_FUNC_TRACE(); 1615977d0006SHemant Agrawal 1616977d0006SHemant Agrawal priv = dev->data->dev_private; 1617977d0006SHemant Agrawal dpni = (struct fsl_mc_io *)priv->hw; 1618977d0006SHemant Agrawal 1619977d0006SHemant Agrawal if (dpni == NULL) { 1620a10a988aSShreyansh Jain DPAA2_PMD_ERR("dpni is NULL"); 1621977d0006SHemant Agrawal return ret; 1622977d0006SHemant Agrawal } 1623977d0006SHemant Agrawal 1624977d0006SHemant Agrawal /* It is necessary to obtain the current state before setting fc_conf 1625977d0006SHemant Agrawal * as MC would return error in case rate, autoneg or duplex values are 1626977d0006SHemant Agrawal * different. 1627977d0006SHemant Agrawal */ 1628977d0006SHemant Agrawal ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 1629977d0006SHemant Agrawal if (ret) { 1630a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret); 1631977d0006SHemant Agrawal return -1; 1632977d0006SHemant Agrawal } 1633977d0006SHemant Agrawal 1634977d0006SHemant Agrawal /* Disable link before setting configuration */ 1635977d0006SHemant Agrawal dpaa2_dev_set_link_down(dev); 1636977d0006SHemant Agrawal 1637977d0006SHemant Agrawal /* Based on fc_conf, update cfg */ 1638977d0006SHemant Agrawal cfg.rate = state.rate; 1639977d0006SHemant Agrawal cfg.options = state.options; 1640977d0006SHemant Agrawal 1641977d0006SHemant Agrawal /* update cfg with fc_conf */ 1642977d0006SHemant Agrawal switch (fc_conf->mode) { 1643977d0006SHemant Agrawal case RTE_FC_FULL: 1644977d0006SHemant Agrawal /* Full flow control; 1645977d0006SHemant Agrawal * OPT_PAUSE set, ASYM_PAUSE not set 1646977d0006SHemant Agrawal */ 1647977d0006SHemant Agrawal cfg.options |= DPNI_LINK_OPT_PAUSE; 1648977d0006SHemant Agrawal cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE; 1649f090a4c3SHemant Agrawal break; 1650977d0006SHemant Agrawal case RTE_FC_TX_PAUSE: 1651977d0006SHemant Agrawal /* Enable RX flow control 1652977d0006SHemant Agrawal * OPT_PAUSE not set; 1653977d0006SHemant Agrawal * ASYM_PAUSE set; 1654977d0006SHemant Agrawal */ 1655977d0006SHemant Agrawal cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE; 1656977d0006SHemant Agrawal cfg.options &= ~DPNI_LINK_OPT_PAUSE; 1657977d0006SHemant Agrawal break; 1658977d0006SHemant Agrawal case RTE_FC_RX_PAUSE: 1659977d0006SHemant Agrawal /* Enable TX Flow control 1660977d0006SHemant Agrawal * OPT_PAUSE set 1661977d0006SHemant Agrawal * ASYM_PAUSE set 1662977d0006SHemant Agrawal */ 1663977d0006SHemant Agrawal cfg.options |= DPNI_LINK_OPT_PAUSE; 1664977d0006SHemant Agrawal cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE; 1665977d0006SHemant Agrawal break; 1666977d0006SHemant Agrawal case RTE_FC_NONE: 1667977d0006SHemant Agrawal /* Disable Flow control 1668977d0006SHemant Agrawal * OPT_PAUSE not set 1669977d0006SHemant Agrawal * ASYM_PAUSE not set 1670977d0006SHemant Agrawal */ 1671977d0006SHemant Agrawal cfg.options &= ~DPNI_LINK_OPT_PAUSE; 1672977d0006SHemant Agrawal cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE; 1673977d0006SHemant Agrawal break; 1674977d0006SHemant Agrawal default: 1675a10a988aSShreyansh Jain DPAA2_PMD_ERR("Incorrect Flow control flag (%d)", 1676977d0006SHemant Agrawal fc_conf->mode); 1677977d0006SHemant Agrawal return -1; 1678977d0006SHemant Agrawal } 1679977d0006SHemant Agrawal 1680977d0006SHemant Agrawal ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg); 1681977d0006SHemant Agrawal if (ret) 1682a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)", 1683977d0006SHemant Agrawal ret); 1684977d0006SHemant Agrawal 1685977d0006SHemant Agrawal /* Enable link */ 1686977d0006SHemant Agrawal dpaa2_dev_set_link_up(dev); 1687977d0006SHemant Agrawal 1688977d0006SHemant Agrawal return ret; 1689977d0006SHemant Agrawal } 1690977d0006SHemant Agrawal 169163d5c3b0SHemant Agrawal static int 169263d5c3b0SHemant Agrawal dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev, 169363d5c3b0SHemant Agrawal struct rte_eth_rss_conf *rss_conf) 169463d5c3b0SHemant Agrawal { 169563d5c3b0SHemant Agrawal struct rte_eth_dev_data *data = dev->data; 169663d5c3b0SHemant Agrawal struct rte_eth_conf *eth_conf = &data->dev_conf; 169763d5c3b0SHemant Agrawal int ret; 169863d5c3b0SHemant Agrawal 169963d5c3b0SHemant Agrawal PMD_INIT_FUNC_TRACE(); 170063d5c3b0SHemant Agrawal 170163d5c3b0SHemant Agrawal if (rss_conf->rss_hf) { 170263d5c3b0SHemant Agrawal ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf); 170363d5c3b0SHemant Agrawal if (ret) { 1704a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to set flow dist"); 170563d5c3b0SHemant Agrawal return ret; 170663d5c3b0SHemant Agrawal } 170763d5c3b0SHemant Agrawal } else { 170863d5c3b0SHemant Agrawal ret = dpaa2_remove_flow_dist(dev, 0); 170963d5c3b0SHemant Agrawal if (ret) { 1710a10a988aSShreyansh Jain DPAA2_PMD_ERR("Unable to remove flow dist"); 171163d5c3b0SHemant Agrawal return ret; 171263d5c3b0SHemant Agrawal } 171363d5c3b0SHemant Agrawal } 171463d5c3b0SHemant Agrawal eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf; 171563d5c3b0SHemant Agrawal return 0; 171663d5c3b0SHemant Agrawal } 171763d5c3b0SHemant Agrawal 171863d5c3b0SHemant Agrawal static int 171963d5c3b0SHemant Agrawal dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 172063d5c3b0SHemant Agrawal struct rte_eth_rss_conf *rss_conf) 172163d5c3b0SHemant Agrawal { 172263d5c3b0SHemant Agrawal struct rte_eth_dev_data *data = dev->data; 172363d5c3b0SHemant Agrawal struct rte_eth_conf *eth_conf = &data->dev_conf; 172463d5c3b0SHemant Agrawal 172563d5c3b0SHemant Agrawal /* dpaa2 does not support rss_key, so length should be 0*/ 172663d5c3b0SHemant Agrawal rss_conf->rss_key_len = 0; 172763d5c3b0SHemant Agrawal rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf; 172863d5c3b0SHemant Agrawal return 0; 172963d5c3b0SHemant Agrawal } 173063d5c3b0SHemant Agrawal 1731b677d4c6SNipun Gupta int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev, 1732b677d4c6SNipun Gupta int eth_rx_queue_id, 1733b677d4c6SNipun Gupta uint16_t dpcon_id, 1734b677d4c6SNipun Gupta const struct rte_event_eth_rx_adapter_queue_conf *queue_conf) 1735b677d4c6SNipun Gupta { 1736b677d4c6SNipun Gupta struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; 1737b677d4c6SNipun Gupta struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw; 1738b677d4c6SNipun Gupta struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; 1739b677d4c6SNipun Gupta uint8_t flow_id = dpaa2_ethq->flow_id; 1740b677d4c6SNipun Gupta struct dpni_queue cfg; 1741b677d4c6SNipun Gupta uint8_t options; 1742b677d4c6SNipun Gupta int ret; 1743b677d4c6SNipun Gupta 1744b677d4c6SNipun Gupta if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL) 1745b677d4c6SNipun Gupta dpaa2_ethq->cb = dpaa2_dev_process_parallel_event; 17462d378863SNipun Gupta else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) 17472d378863SNipun Gupta dpaa2_ethq->cb = dpaa2_dev_process_atomic_event; 1748b677d4c6SNipun Gupta else 1749b677d4c6SNipun Gupta return -EINVAL; 1750b677d4c6SNipun Gupta 1751b677d4c6SNipun Gupta memset(&cfg, 0, sizeof(struct dpni_queue)); 1752b677d4c6SNipun Gupta options = DPNI_QUEUE_OPT_DEST; 1753b677d4c6SNipun Gupta cfg.destination.type = DPNI_DEST_DPCON; 1754b677d4c6SNipun Gupta cfg.destination.id = dpcon_id; 1755b677d4c6SNipun Gupta cfg.destination.priority = queue_conf->ev.priority; 1756b677d4c6SNipun Gupta 17572d378863SNipun Gupta if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) { 17582d378863SNipun Gupta options |= DPNI_QUEUE_OPT_HOLD_ACTIVE; 17592d378863SNipun Gupta cfg.destination.hold_active = 1; 17602d378863SNipun Gupta } 17612d378863SNipun Gupta 1762b677d4c6SNipun Gupta options |= DPNI_QUEUE_OPT_USER_CTX; 17635ae1edffSHemant Agrawal cfg.user_context = (size_t)(dpaa2_ethq); 1764b677d4c6SNipun Gupta 1765b677d4c6SNipun Gupta ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX, 1766b677d4c6SNipun Gupta dpaa2_ethq->tc_index, flow_id, options, &cfg); 1767b677d4c6SNipun Gupta if (ret) { 1768a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret); 1769b677d4c6SNipun Gupta return ret; 1770b677d4c6SNipun Gupta } 1771b677d4c6SNipun Gupta 1772b677d4c6SNipun Gupta memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event)); 1773b677d4c6SNipun Gupta 1774b677d4c6SNipun Gupta return 0; 1775b677d4c6SNipun Gupta } 1776b677d4c6SNipun Gupta 1777b677d4c6SNipun Gupta int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev, 1778b677d4c6SNipun Gupta int eth_rx_queue_id) 1779b677d4c6SNipun Gupta { 1780b677d4c6SNipun Gupta struct dpaa2_dev_priv *eth_priv = dev->data->dev_private; 1781b677d4c6SNipun Gupta struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw; 1782b677d4c6SNipun Gupta struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id]; 1783b677d4c6SNipun Gupta uint8_t flow_id = dpaa2_ethq->flow_id; 1784b677d4c6SNipun Gupta struct dpni_queue cfg; 1785b677d4c6SNipun Gupta uint8_t options; 1786b677d4c6SNipun Gupta int ret; 1787b677d4c6SNipun Gupta 1788b677d4c6SNipun Gupta memset(&cfg, 0, sizeof(struct dpni_queue)); 1789b677d4c6SNipun Gupta options = DPNI_QUEUE_OPT_DEST; 1790b677d4c6SNipun Gupta cfg.destination.type = DPNI_DEST_NONE; 1791b677d4c6SNipun Gupta 1792b677d4c6SNipun Gupta ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX, 1793b677d4c6SNipun Gupta dpaa2_ethq->tc_index, flow_id, options, &cfg); 1794b677d4c6SNipun Gupta if (ret) 1795a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret); 1796b677d4c6SNipun Gupta 1797b677d4c6SNipun Gupta return ret; 1798b677d4c6SNipun Gupta } 1799b677d4c6SNipun Gupta 18003e5a335dSHemant Agrawal static struct eth_dev_ops dpaa2_ethdev_ops = { 18013e5a335dSHemant Agrawal .dev_configure = dpaa2_eth_dev_configure, 18023e5a335dSHemant Agrawal .dev_start = dpaa2_dev_start, 18033e5a335dSHemant Agrawal .dev_stop = dpaa2_dev_stop, 18043e5a335dSHemant Agrawal .dev_close = dpaa2_dev_close, 1805c0e5c69aSHemant Agrawal .promiscuous_enable = dpaa2_dev_promiscuous_enable, 1806c0e5c69aSHemant Agrawal .promiscuous_disable = dpaa2_dev_promiscuous_disable, 18075d5aeeedSHemant Agrawal .allmulticast_enable = dpaa2_dev_allmulticast_enable, 18085d5aeeedSHemant Agrawal .allmulticast_disable = dpaa2_dev_allmulticast_disable, 1809a1f3a12cSHemant Agrawal .dev_set_link_up = dpaa2_dev_set_link_up, 1810a1f3a12cSHemant Agrawal .dev_set_link_down = dpaa2_dev_set_link_down, 1811c56c86ffSHemant Agrawal .link_update = dpaa2_dev_link_update, 1812b0aa5459SHemant Agrawal .stats_get = dpaa2_dev_stats_get, 18131d6329b2SHemant Agrawal .xstats_get = dpaa2_dev_xstats_get, 18141d6329b2SHemant Agrawal .xstats_get_by_id = dpaa2_xstats_get_by_id, 18151d6329b2SHemant Agrawal .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id, 18161d6329b2SHemant Agrawal .xstats_get_names = dpaa2_xstats_get_names, 1817b0aa5459SHemant Agrawal .stats_reset = dpaa2_dev_stats_reset, 18181d6329b2SHemant Agrawal .xstats_reset = dpaa2_dev_stats_reset, 1819748eccb9SHemant Agrawal .fw_version_get = dpaa2_fw_version_get, 18203e5a335dSHemant Agrawal .dev_infos_get = dpaa2_dev_info_get, 1821a5fc38d4SHemant Agrawal .dev_supported_ptypes_get = dpaa2_supported_ptypes_get, 1822e31d4d21SHemant Agrawal .mtu_set = dpaa2_dev_mtu_set, 18233ce294f2SHemant Agrawal .vlan_filter_set = dpaa2_vlan_filter_set, 18243ce294f2SHemant Agrawal .vlan_offload_set = dpaa2_vlan_offload_set, 18253e5a335dSHemant Agrawal .rx_queue_setup = dpaa2_dev_rx_queue_setup, 18263e5a335dSHemant Agrawal .rx_queue_release = dpaa2_dev_rx_queue_release, 18273e5a335dSHemant Agrawal .tx_queue_setup = dpaa2_dev_tx_queue_setup, 18283e5a335dSHemant Agrawal .tx_queue_release = dpaa2_dev_tx_queue_release, 1829f40adb40SHemant Agrawal .rx_queue_count = dpaa2_dev_rx_queue_count, 1830977d0006SHemant Agrawal .flow_ctrl_get = dpaa2_flow_ctrl_get, 1831977d0006SHemant Agrawal .flow_ctrl_set = dpaa2_flow_ctrl_set, 1832b4d97b7dSHemant Agrawal .mac_addr_add = dpaa2_dev_add_mac_addr, 1833b4d97b7dSHemant Agrawal .mac_addr_remove = dpaa2_dev_remove_mac_addr, 1834b4d97b7dSHemant Agrawal .mac_addr_set = dpaa2_dev_set_mac_addr, 183563d5c3b0SHemant Agrawal .rss_hash_update = dpaa2_dev_rss_hash_update, 183663d5c3b0SHemant Agrawal .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get, 18373e5a335dSHemant Agrawal }; 18383e5a335dSHemant Agrawal 1839c3e0a706SShreyansh Jain /* Populate the mac address from physically available (u-boot/firmware) and/or 1840c3e0a706SShreyansh Jain * one set by higher layers like MC (restool) etc. 1841c3e0a706SShreyansh Jain * Returns the table of MAC entries (multiple entries) 1842c3e0a706SShreyansh Jain */ 1843c3e0a706SShreyansh Jain static int 1844c3e0a706SShreyansh Jain populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv, 1845c3e0a706SShreyansh Jain struct ether_addr *mac_entry) 1846c3e0a706SShreyansh Jain { 1847c3e0a706SShreyansh Jain int ret; 184841c24ea2SShreyansh Jain struct ether_addr phy_mac, prime_mac; 184941c24ea2SShreyansh Jain 185041c24ea2SShreyansh Jain memset(&phy_mac, 0, sizeof(struct ether_addr)); 185141c24ea2SShreyansh Jain memset(&prime_mac, 0, sizeof(struct ether_addr)); 1852c3e0a706SShreyansh Jain 1853c3e0a706SShreyansh Jain /* Get the physical device MAC address */ 1854c3e0a706SShreyansh Jain ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token, 1855c3e0a706SShreyansh Jain phy_mac.addr_bytes); 1856c3e0a706SShreyansh Jain if (ret) { 1857c3e0a706SShreyansh Jain DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret); 1858c3e0a706SShreyansh Jain goto cleanup; 1859c3e0a706SShreyansh Jain } 1860c3e0a706SShreyansh Jain 1861c3e0a706SShreyansh Jain ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token, 1862c3e0a706SShreyansh Jain prime_mac.addr_bytes); 1863c3e0a706SShreyansh Jain if (ret) { 1864c3e0a706SShreyansh Jain DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret); 1865c3e0a706SShreyansh Jain goto cleanup; 1866c3e0a706SShreyansh Jain } 1867c3e0a706SShreyansh Jain 1868c3e0a706SShreyansh Jain /* Now that both MAC have been obtained, do: 1869c3e0a706SShreyansh Jain * if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy 1870c3e0a706SShreyansh Jain * and return phy 1871c3e0a706SShreyansh Jain * If empty_mac(phy), return prime. 1872c3e0a706SShreyansh Jain * if both are empty, create random MAC, set as prime and return 1873c3e0a706SShreyansh Jain */ 1874c3e0a706SShreyansh Jain if (!is_zero_ether_addr(&phy_mac)) { 1875c3e0a706SShreyansh Jain /* If the addresses are not same, overwrite prime */ 1876c3e0a706SShreyansh Jain if (!is_same_ether_addr(&phy_mac, &prime_mac)) { 1877c3e0a706SShreyansh Jain ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW, 1878c3e0a706SShreyansh Jain priv->token, 1879c3e0a706SShreyansh Jain phy_mac.addr_bytes); 1880c3e0a706SShreyansh Jain if (ret) { 1881c3e0a706SShreyansh Jain DPAA2_PMD_ERR("Unable to set MAC Address: %d", 1882c3e0a706SShreyansh Jain ret); 1883c3e0a706SShreyansh Jain goto cleanup; 1884c3e0a706SShreyansh Jain } 1885c3e0a706SShreyansh Jain memcpy(&prime_mac, &phy_mac, sizeof(struct ether_addr)); 1886c3e0a706SShreyansh Jain } 1887c3e0a706SShreyansh Jain } else if (is_zero_ether_addr(&prime_mac)) { 1888c3e0a706SShreyansh Jain /* In case phys and prime, both are zero, create random MAC */ 1889c3e0a706SShreyansh Jain eth_random_addr(prime_mac.addr_bytes); 1890c3e0a706SShreyansh Jain ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW, 1891c3e0a706SShreyansh Jain priv->token, 1892c3e0a706SShreyansh Jain prime_mac.addr_bytes); 1893c3e0a706SShreyansh Jain if (ret) { 1894c3e0a706SShreyansh Jain DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret); 1895c3e0a706SShreyansh Jain goto cleanup; 1896c3e0a706SShreyansh Jain } 1897c3e0a706SShreyansh Jain } 1898c3e0a706SShreyansh Jain 1899c3e0a706SShreyansh Jain /* prime_mac the final MAC address */ 1900c3e0a706SShreyansh Jain memcpy(mac_entry, &prime_mac, sizeof(struct ether_addr)); 1901c3e0a706SShreyansh Jain return 0; 1902c3e0a706SShreyansh Jain 1903c3e0a706SShreyansh Jain cleanup: 1904c3e0a706SShreyansh Jain return -1; 1905c3e0a706SShreyansh Jain } 1906c3e0a706SShreyansh Jain 1907c147eae0SHemant Agrawal static int 1908c147eae0SHemant Agrawal dpaa2_dev_init(struct rte_eth_dev *eth_dev) 1909c147eae0SHemant Agrawal { 19103e5a335dSHemant Agrawal struct rte_device *dev = eth_dev->device; 19113e5a335dSHemant Agrawal struct rte_dpaa2_device *dpaa2_dev; 19123e5a335dSHemant Agrawal struct fsl_mc_io *dpni_dev; 19133e5a335dSHemant Agrawal struct dpni_attr attr; 19143e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 1915bee61d86SHemant Agrawal struct dpni_buffer_layout layout; 1916599017a2SHemant Agrawal int ret, hw_id; 19173e5a335dSHemant Agrawal 1918d401ead1SHemant Agrawal PMD_INIT_FUNC_TRACE(); 1919d401ead1SHemant Agrawal 1920c147eae0SHemant Agrawal /* For secondary processes, the primary has done all the work */ 1921*e7b187dbSShreyansh Jain if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1922*e7b187dbSShreyansh Jain /* In case of secondary, only burst and ops API need to be 1923*e7b187dbSShreyansh Jain * plugged. 1924*e7b187dbSShreyansh Jain */ 1925*e7b187dbSShreyansh Jain eth_dev->dev_ops = &dpaa2_ethdev_ops; 1926*e7b187dbSShreyansh Jain eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx; 1927*e7b187dbSShreyansh Jain eth_dev->tx_pkt_burst = dpaa2_dev_tx; 1928c147eae0SHemant Agrawal return 0; 1929*e7b187dbSShreyansh Jain } 1930c147eae0SHemant Agrawal 19313e5a335dSHemant Agrawal dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device); 19323e5a335dSHemant Agrawal 19333e5a335dSHemant Agrawal hw_id = dpaa2_dev->object_id; 19343e5a335dSHemant Agrawal 1935d4984046SHemant Agrawal dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0); 19363e5a335dSHemant Agrawal if (!dpni_dev) { 1937a10a988aSShreyansh Jain DPAA2_PMD_ERR("Memory allocation failed for dpni device"); 19383e5a335dSHemant Agrawal return -1; 19393e5a335dSHemant Agrawal } 19403e5a335dSHemant Agrawal 19413e5a335dSHemant Agrawal dpni_dev->regs = rte_mcp_ptr_list[0]; 19423e5a335dSHemant Agrawal ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token); 19433e5a335dSHemant Agrawal if (ret) { 1944a10a988aSShreyansh Jain DPAA2_PMD_ERR( 1945a10a988aSShreyansh Jain "Failure in opening dpni@%d with err code %d", 1946d4984046SHemant Agrawal hw_id, ret); 1947d4984046SHemant Agrawal rte_free(dpni_dev); 19483e5a335dSHemant Agrawal return -1; 19493e5a335dSHemant Agrawal } 19503e5a335dSHemant Agrawal 19513e5a335dSHemant Agrawal /* Clean the device first */ 19523e5a335dSHemant Agrawal ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token); 19533e5a335dSHemant Agrawal if (ret) { 1954a10a988aSShreyansh Jain DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d", 1955d4984046SHemant Agrawal hw_id, ret); 1956d4984046SHemant Agrawal goto init_err; 19573e5a335dSHemant Agrawal } 19583e5a335dSHemant Agrawal 19593e5a335dSHemant Agrawal ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr); 19603e5a335dSHemant Agrawal if (ret) { 1961a10a988aSShreyansh Jain DPAA2_PMD_ERR( 1962a10a988aSShreyansh Jain "Failure in get dpni@%d attribute, err code %d", 1963d4984046SHemant Agrawal hw_id, ret); 1964d4984046SHemant Agrawal goto init_err; 19653e5a335dSHemant Agrawal } 19663e5a335dSHemant Agrawal 196716bbc98aSShreyansh Jain priv->num_rx_tc = attr.num_rx_tcs; 196889c2ea8fSHemant Agrawal 196916bbc98aSShreyansh Jain /* Resetting the "num_rx_queues" to equal number of queues in first TC 1970599017a2SHemant Agrawal * as only one TC is supported on Rx Side. Once Multiple TCs will be 1971599017a2SHemant Agrawal * in use for Rx processing then this will be changed or removed. 197289c2ea8fSHemant Agrawal */ 1973599017a2SHemant Agrawal priv->nb_rx_queues = attr.num_queues; 197489c2ea8fSHemant Agrawal 197516bbc98aSShreyansh Jain /* Using number of TX queues as number of TX TCs */ 197616bbc98aSShreyansh Jain priv->nb_tx_queues = attr.num_tx_tcs; 1977ef18dafeSHemant Agrawal 1978a10a988aSShreyansh Jain DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d", 1979a10a988aSShreyansh Jain priv->num_rx_tc, priv->nb_rx_queues, 1980a10a988aSShreyansh Jain priv->nb_tx_queues); 19813e5a335dSHemant Agrawal 19823e5a335dSHemant Agrawal priv->hw = dpni_dev; 19833e5a335dSHemant Agrawal priv->hw_id = hw_id; 198433fad432SHemant Agrawal priv->options = attr.options; 198533fad432SHemant Agrawal priv->max_mac_filters = attr.mac_filter_entries; 198633fad432SHemant Agrawal priv->max_vlan_filters = attr.vlan_filter_entries; 19873e5a335dSHemant Agrawal priv->flags = 0; 19883e5a335dSHemant Agrawal 19893e5a335dSHemant Agrawal /* Allocate memory for hardware structure for queues */ 19903e5a335dSHemant Agrawal ret = dpaa2_alloc_rx_tx_queues(eth_dev); 19913e5a335dSHemant Agrawal if (ret) { 1992a10a988aSShreyansh Jain DPAA2_PMD_ERR("Queue allocation Failed"); 1993d4984046SHemant Agrawal goto init_err; 19943e5a335dSHemant Agrawal } 19953e5a335dSHemant Agrawal 1996c3e0a706SShreyansh Jain /* Allocate memory for storing MAC addresses. 1997c3e0a706SShreyansh Jain * Table of mac_filter_entries size is allocated so that RTE ether lib 1998c3e0a706SShreyansh Jain * can add MAC entries when rte_eth_dev_mac_addr_add is called. 1999c3e0a706SShreyansh Jain */ 200033fad432SHemant Agrawal eth_dev->data->mac_addrs = rte_zmalloc("dpni", 200133fad432SHemant Agrawal ETHER_ADDR_LEN * attr.mac_filter_entries, 0); 200233fad432SHemant Agrawal if (eth_dev->data->mac_addrs == NULL) { 2003a10a988aSShreyansh Jain DPAA2_PMD_ERR( 2004d4984046SHemant Agrawal "Failed to allocate %d bytes needed to store MAC addresses", 200533fad432SHemant Agrawal ETHER_ADDR_LEN * attr.mac_filter_entries); 2006d4984046SHemant Agrawal ret = -ENOMEM; 2007d4984046SHemant Agrawal goto init_err; 200833fad432SHemant Agrawal } 200933fad432SHemant Agrawal 2010c3e0a706SShreyansh Jain ret = populate_mac_addr(dpni_dev, priv, ð_dev->data->mac_addrs[0]); 201133fad432SHemant Agrawal if (ret) { 2012c3e0a706SShreyansh Jain DPAA2_PMD_ERR("Unable to fetch MAC Address for device"); 2013c3e0a706SShreyansh Jain rte_free(eth_dev->data->mac_addrs); 2014c3e0a706SShreyansh Jain eth_dev->data->mac_addrs = NULL; 2015d4984046SHemant Agrawal goto init_err; 201633fad432SHemant Agrawal } 201733fad432SHemant Agrawal 2018bee61d86SHemant Agrawal /* ... tx buffer layout ... */ 2019bee61d86SHemant Agrawal memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 2020bee61d86SHemant Agrawal layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 2021bee61d86SHemant Agrawal layout.pass_frame_status = 1; 2022bee61d86SHemant Agrawal ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 2023bee61d86SHemant Agrawal DPNI_QUEUE_TX, &layout); 2024bee61d86SHemant Agrawal if (ret) { 2025a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret); 2026d4984046SHemant Agrawal goto init_err; 2027bee61d86SHemant Agrawal } 2028bee61d86SHemant Agrawal 2029bee61d86SHemant Agrawal /* ... tx-conf and error buffer layout ... */ 2030bee61d86SHemant Agrawal memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 2031bee61d86SHemant Agrawal layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 2032bee61d86SHemant Agrawal layout.pass_frame_status = 1; 2033bee61d86SHemant Agrawal ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 2034bee61d86SHemant Agrawal DPNI_QUEUE_TX_CONFIRM, &layout); 2035bee61d86SHemant Agrawal if (ret) { 2036a10a988aSShreyansh Jain DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout", 2037d4984046SHemant Agrawal ret); 2038d4984046SHemant Agrawal goto init_err; 2039bee61d86SHemant Agrawal } 2040bee61d86SHemant Agrawal 20413e5a335dSHemant Agrawal eth_dev->dev_ops = &dpaa2_ethdev_ops; 2042c147eae0SHemant Agrawal 20435c6942fdSHemant Agrawal eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx; 2044cd9935ceSHemant Agrawal eth_dev->tx_pkt_burst = dpaa2_dev_tx; 20451261cd68SHemant Agrawal 2046627b6770SHemant Agrawal RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name); 2047c147eae0SHemant Agrawal return 0; 2048d4984046SHemant Agrawal init_err: 2049d4984046SHemant Agrawal dpaa2_dev_uninit(eth_dev); 2050d4984046SHemant Agrawal return ret; 2051c147eae0SHemant Agrawal } 2052c147eae0SHemant Agrawal 2053c147eae0SHemant Agrawal static int 20543e5a335dSHemant Agrawal dpaa2_dev_uninit(struct rte_eth_dev *eth_dev) 2055c147eae0SHemant Agrawal { 20563e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 20573e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 20585d9a1e4dSHemant Agrawal int ret; 20593e5a335dSHemant Agrawal 2060d401ead1SHemant Agrawal PMD_INIT_FUNC_TRACE(); 2061d401ead1SHemant Agrawal 2062c147eae0SHemant Agrawal if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2063e729ec76SHemant Agrawal return 0; 2064c147eae0SHemant Agrawal 20653e5a335dSHemant Agrawal if (!dpni) { 2066a10a988aSShreyansh Jain DPAA2_PMD_WARN("Already closed or not started"); 20673e5a335dSHemant Agrawal return -1; 20683e5a335dSHemant Agrawal } 20693e5a335dSHemant Agrawal 20703e5a335dSHemant Agrawal dpaa2_dev_close(eth_dev); 20713e5a335dSHemant Agrawal 20725d9a1e4dSHemant Agrawal dpaa2_free_rx_tx_queues(eth_dev); 20733e5a335dSHemant Agrawal 20743e5a335dSHemant Agrawal /* Close the device at underlying layer*/ 20753e5a335dSHemant Agrawal ret = dpni_close(dpni, CMD_PRI_LOW, priv->token); 20763e5a335dSHemant Agrawal if (ret) { 2077a10a988aSShreyansh Jain DPAA2_PMD_ERR( 2078a10a988aSShreyansh Jain "Failure closing dpni device with err code %d", 2079d4984046SHemant Agrawal ret); 20803e5a335dSHemant Agrawal } 20813e5a335dSHemant Agrawal 20823e5a335dSHemant Agrawal /* Free the allocated memory for ethernet private data and dpni*/ 20833e5a335dSHemant Agrawal priv->hw = NULL; 2084d4984046SHemant Agrawal rte_free(dpni); 20853e5a335dSHemant Agrawal 20863e5a335dSHemant Agrawal eth_dev->dev_ops = NULL; 2087cd9935ceSHemant Agrawal eth_dev->rx_pkt_burst = NULL; 2088cd9935ceSHemant Agrawal eth_dev->tx_pkt_burst = NULL; 20893e5a335dSHemant Agrawal 2090a10a988aSShreyansh Jain DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name); 2091c147eae0SHemant Agrawal return 0; 2092c147eae0SHemant Agrawal } 2093c147eae0SHemant Agrawal 2094c147eae0SHemant Agrawal static int 209555fd2703SHemant Agrawal rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv, 2096c147eae0SHemant Agrawal struct rte_dpaa2_device *dpaa2_dev) 2097c147eae0SHemant Agrawal { 2098c147eae0SHemant Agrawal struct rte_eth_dev *eth_dev; 2099c147eae0SHemant Agrawal int diag; 2100c147eae0SHemant Agrawal 2101c147eae0SHemant Agrawal if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 2102e729ec76SHemant Agrawal eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name); 2103e729ec76SHemant Agrawal if (!eth_dev) 2104e729ec76SHemant Agrawal return -ENODEV; 2105c147eae0SHemant Agrawal eth_dev->data->dev_private = rte_zmalloc( 2106c147eae0SHemant Agrawal "ethdev private structure", 2107c147eae0SHemant Agrawal sizeof(struct dpaa2_dev_priv), 2108c147eae0SHemant Agrawal RTE_CACHE_LINE_SIZE); 2109c147eae0SHemant Agrawal if (eth_dev->data->dev_private == NULL) { 2110a10a988aSShreyansh Jain DPAA2_PMD_CRIT( 2111a10a988aSShreyansh Jain "Unable to allocate memory for private data"); 2112c147eae0SHemant Agrawal rte_eth_dev_release_port(eth_dev); 2113c147eae0SHemant Agrawal return -ENOMEM; 2114c147eae0SHemant Agrawal } 2115e729ec76SHemant Agrawal } else { 2116e729ec76SHemant Agrawal eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name); 2117e729ec76SHemant Agrawal if (!eth_dev) 2118e729ec76SHemant Agrawal return -ENODEV; 2119c147eae0SHemant Agrawal } 2120e729ec76SHemant Agrawal 2121c147eae0SHemant Agrawal eth_dev->device = &dpaa2_dev->device; 212255fd2703SHemant Agrawal 2123c147eae0SHemant Agrawal dpaa2_dev->eth_dev = eth_dev; 2124c147eae0SHemant Agrawal eth_dev->data->rx_mbuf_alloc_failed = 0; 2125c147eae0SHemant Agrawal 212692b7e33eSHemant Agrawal if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC) 212792b7e33eSHemant Agrawal eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC; 212892b7e33eSHemant Agrawal 2129c147eae0SHemant Agrawal /* Invoke PMD device initialization function */ 2130c147eae0SHemant Agrawal diag = dpaa2_dev_init(eth_dev); 2131fbe90cddSThomas Monjalon if (diag == 0) { 2132fbe90cddSThomas Monjalon rte_eth_dev_probing_finish(eth_dev); 2133c147eae0SHemant Agrawal return 0; 2134fbe90cddSThomas Monjalon } 2135c147eae0SHemant Agrawal 2136c147eae0SHemant Agrawal rte_eth_dev_release_port(eth_dev); 2137c147eae0SHemant Agrawal return diag; 2138c147eae0SHemant Agrawal } 2139c147eae0SHemant Agrawal 2140c147eae0SHemant Agrawal static int 2141c147eae0SHemant Agrawal rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev) 2142c147eae0SHemant Agrawal { 2143c147eae0SHemant Agrawal struct rte_eth_dev *eth_dev; 2144c147eae0SHemant Agrawal 2145c147eae0SHemant Agrawal eth_dev = dpaa2_dev->eth_dev; 2146c147eae0SHemant Agrawal dpaa2_dev_uninit(eth_dev); 2147c147eae0SHemant Agrawal 2148c147eae0SHemant Agrawal rte_eth_dev_release_port(eth_dev); 2149c147eae0SHemant Agrawal 2150c147eae0SHemant Agrawal return 0; 2151c147eae0SHemant Agrawal } 2152c147eae0SHemant Agrawal 2153c147eae0SHemant Agrawal static struct rte_dpaa2_driver rte_dpaa2_pmd = { 215492b7e33eSHemant Agrawal .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA, 2155bad555dfSShreyansh Jain .drv_type = DPAA2_ETH, 2156c147eae0SHemant Agrawal .probe = rte_dpaa2_probe, 2157c147eae0SHemant Agrawal .remove = rte_dpaa2_remove, 2158c147eae0SHemant Agrawal }; 2159c147eae0SHemant Agrawal 2160c147eae0SHemant Agrawal RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd); 2161a10a988aSShreyansh Jain 2162f8e99896SThomas Monjalon RTE_INIT(dpaa2_pmd_init_log) 2163a10a988aSShreyansh Jain { 2164a10a988aSShreyansh Jain dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2"); 2165a10a988aSShreyansh Jain if (dpaa2_logtype_pmd >= 0) 2166a10a988aSShreyansh Jain rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE); 2167a10a988aSShreyansh Jain } 2168