1c147eae0SHemant Agrawal /*- 2c147eae0SHemant Agrawal * BSD LICENSE 3c147eae0SHemant Agrawal * 4c147eae0SHemant Agrawal * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved. 5c147eae0SHemant Agrawal * Copyright (c) 2016 NXP. All rights reserved. 6c147eae0SHemant Agrawal * 7c147eae0SHemant Agrawal * Redistribution and use in source and binary forms, with or without 8c147eae0SHemant Agrawal * modification, are permitted provided that the following conditions 9c147eae0SHemant Agrawal * are met: 10c147eae0SHemant Agrawal * 11c147eae0SHemant Agrawal * * Redistributions of source code must retain the above copyright 12c147eae0SHemant Agrawal * notice, this list of conditions and the following disclaimer. 13c147eae0SHemant Agrawal * * Redistributions in binary form must reproduce the above copyright 14c147eae0SHemant Agrawal * notice, this list of conditions and the following disclaimer in 15c147eae0SHemant Agrawal * the documentation and/or other materials provided with the 16c147eae0SHemant Agrawal * distribution. 17c147eae0SHemant Agrawal * * Neither the name of Freescale Semiconductor, Inc nor the names of its 18c147eae0SHemant Agrawal * contributors may be used to endorse or promote products derived 19c147eae0SHemant Agrawal * from this software without specific prior written permission. 20c147eae0SHemant Agrawal * 21c147eae0SHemant Agrawal * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22c147eae0SHemant Agrawal * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23c147eae0SHemant Agrawal * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24c147eae0SHemant Agrawal * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25c147eae0SHemant Agrawal * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26c147eae0SHemant Agrawal * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27c147eae0SHemant Agrawal * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28c147eae0SHemant Agrawal * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29c147eae0SHemant Agrawal * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30c147eae0SHemant Agrawal * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31c147eae0SHemant Agrawal * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32c147eae0SHemant Agrawal */ 33c147eae0SHemant Agrawal 34c147eae0SHemant Agrawal #include <time.h> 35c147eae0SHemant Agrawal #include <net/if.h> 36c147eae0SHemant Agrawal 37c147eae0SHemant Agrawal #include <rte_mbuf.h> 38c147eae0SHemant Agrawal #include <rte_ethdev.h> 39c147eae0SHemant Agrawal #include <rte_malloc.h> 40c147eae0SHemant Agrawal #include <rte_memcpy.h> 41c147eae0SHemant Agrawal #include <rte_string_fns.h> 42c147eae0SHemant Agrawal #include <rte_cycles.h> 43c147eae0SHemant Agrawal #include <rte_kvargs.h> 44c147eae0SHemant Agrawal #include <rte_dev.h> 45c147eae0SHemant Agrawal #include <rte_ethdev.h> 46c147eae0SHemant Agrawal #include <rte_fslmc.h> 47c147eae0SHemant Agrawal 48d401ead1SHemant Agrawal #include <fslmc_logs.h> 49c147eae0SHemant Agrawal #include <fslmc_vfio.h> 503e5a335dSHemant Agrawal #include <dpaa2_hw_pvt.h> 51bee61d86SHemant Agrawal #include <dpaa2_hw_mempool.h> 523e5a335dSHemant Agrawal 53c147eae0SHemant Agrawal #include "dpaa2_ethdev.h" 54c147eae0SHemant Agrawal 55c147eae0SHemant Agrawal static struct rte_dpaa2_driver rte_dpaa2_pmd; 56c147eae0SHemant Agrawal 57*c56c86ffSHemant Agrawal /** 58*c56c86ffSHemant Agrawal * Atomically reads the link status information from global 59*c56c86ffSHemant Agrawal * structure rte_eth_dev. 60*c56c86ffSHemant Agrawal * 61*c56c86ffSHemant Agrawal * @param dev 62*c56c86ffSHemant Agrawal * - Pointer to the structure rte_eth_dev to read from. 63*c56c86ffSHemant Agrawal * - Pointer to the buffer to be saved with the link status. 64*c56c86ffSHemant Agrawal * 65*c56c86ffSHemant Agrawal * @return 66*c56c86ffSHemant Agrawal * - On success, zero. 67*c56c86ffSHemant Agrawal * - On failure, negative value. 68*c56c86ffSHemant Agrawal */ 69*c56c86ffSHemant Agrawal static inline int 70*c56c86ffSHemant Agrawal dpaa2_dev_atomic_read_link_status(struct rte_eth_dev *dev, 71*c56c86ffSHemant Agrawal struct rte_eth_link *link) 72*c56c86ffSHemant Agrawal { 73*c56c86ffSHemant Agrawal struct rte_eth_link *dst = link; 74*c56c86ffSHemant Agrawal struct rte_eth_link *src = &dev->data->dev_link; 75*c56c86ffSHemant Agrawal 76*c56c86ffSHemant Agrawal if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst, 77*c56c86ffSHemant Agrawal *(uint64_t *)src) == 0) 78*c56c86ffSHemant Agrawal return -1; 79*c56c86ffSHemant Agrawal 80*c56c86ffSHemant Agrawal return 0; 81*c56c86ffSHemant Agrawal } 82*c56c86ffSHemant Agrawal 83*c56c86ffSHemant Agrawal /** 84*c56c86ffSHemant Agrawal * Atomically writes the link status information into global 85*c56c86ffSHemant Agrawal * structure rte_eth_dev. 86*c56c86ffSHemant Agrawal * 87*c56c86ffSHemant Agrawal * @param dev 88*c56c86ffSHemant Agrawal * - Pointer to the structure rte_eth_dev to read from. 89*c56c86ffSHemant Agrawal * - Pointer to the buffer to be saved with the link status. 90*c56c86ffSHemant Agrawal * 91*c56c86ffSHemant Agrawal * @return 92*c56c86ffSHemant Agrawal * - On success, zero. 93*c56c86ffSHemant Agrawal * - On failure, negative value. 94*c56c86ffSHemant Agrawal */ 95*c56c86ffSHemant Agrawal static inline int 96*c56c86ffSHemant Agrawal dpaa2_dev_atomic_write_link_status(struct rte_eth_dev *dev, 97*c56c86ffSHemant Agrawal struct rte_eth_link *link) 98*c56c86ffSHemant Agrawal { 99*c56c86ffSHemant Agrawal struct rte_eth_link *dst = &dev->data->dev_link; 100*c56c86ffSHemant Agrawal struct rte_eth_link *src = link; 101*c56c86ffSHemant Agrawal 102*c56c86ffSHemant Agrawal if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst, 103*c56c86ffSHemant Agrawal *(uint64_t *)src) == 0) 104*c56c86ffSHemant Agrawal return -1; 105*c56c86ffSHemant Agrawal 106*c56c86ffSHemant Agrawal return 0; 107*c56c86ffSHemant Agrawal } 108*c56c86ffSHemant Agrawal 1093e5a335dSHemant Agrawal static void 1103e5a335dSHemant Agrawal dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 1113e5a335dSHemant Agrawal { 1123e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1133e5a335dSHemant Agrawal 1143e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 1153e5a335dSHemant Agrawal 1163e5a335dSHemant Agrawal dev_info->if_index = priv->hw_id; 1173e5a335dSHemant Agrawal 11833fad432SHemant Agrawal dev_info->max_mac_addrs = priv->max_mac_filters; 119bee61d86SHemant Agrawal dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN; 120bee61d86SHemant Agrawal dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE; 1213e5a335dSHemant Agrawal dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues; 1223e5a335dSHemant Agrawal dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues; 123ef18dafeSHemant Agrawal dev_info->rx_offload_capa = 124ef18dafeSHemant Agrawal DEV_RX_OFFLOAD_IPV4_CKSUM | 125ef18dafeSHemant Agrawal DEV_RX_OFFLOAD_UDP_CKSUM | 126ef18dafeSHemant Agrawal DEV_RX_OFFLOAD_TCP_CKSUM | 127ef18dafeSHemant Agrawal DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM; 128ef18dafeSHemant Agrawal dev_info->tx_offload_capa = 129ef18dafeSHemant Agrawal DEV_TX_OFFLOAD_IPV4_CKSUM | 130ef18dafeSHemant Agrawal DEV_TX_OFFLOAD_UDP_CKSUM | 131ef18dafeSHemant Agrawal DEV_TX_OFFLOAD_TCP_CKSUM | 132ef18dafeSHemant Agrawal DEV_TX_OFFLOAD_SCTP_CKSUM | 133ef18dafeSHemant Agrawal DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM; 1343e5a335dSHemant Agrawal dev_info->speed_capa = ETH_LINK_SPEED_1G | 1353e5a335dSHemant Agrawal ETH_LINK_SPEED_2_5G | 1363e5a335dSHemant Agrawal ETH_LINK_SPEED_10G; 1373e5a335dSHemant Agrawal } 1383e5a335dSHemant Agrawal 1393e5a335dSHemant Agrawal static int 1403e5a335dSHemant Agrawal dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev) 1413e5a335dSHemant Agrawal { 1423e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 1433e5a335dSHemant Agrawal uint16_t dist_idx; 1443e5a335dSHemant Agrawal uint32_t vq_id; 1453e5a335dSHemant Agrawal struct dpaa2_queue *mc_q, *mcq; 1463e5a335dSHemant Agrawal uint32_t tot_queues; 1473e5a335dSHemant Agrawal int i; 1483e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q; 1493e5a335dSHemant Agrawal 1503e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 1513e5a335dSHemant Agrawal 1523e5a335dSHemant Agrawal tot_queues = priv->nb_rx_queues + priv->nb_tx_queues; 1533e5a335dSHemant Agrawal mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues, 1543e5a335dSHemant Agrawal RTE_CACHE_LINE_SIZE); 1553e5a335dSHemant Agrawal if (!mc_q) { 1563e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "malloc failed for rx/tx queues\n"); 1573e5a335dSHemant Agrawal return -1; 1583e5a335dSHemant Agrawal } 1593e5a335dSHemant Agrawal 1603e5a335dSHemant Agrawal for (i = 0; i < priv->nb_rx_queues; i++) { 1613e5a335dSHemant Agrawal mc_q->dev = dev; 1623e5a335dSHemant Agrawal priv->rx_vq[i] = mc_q++; 1633e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 1643e5a335dSHemant Agrawal dpaa2_q->q_storage = rte_malloc("dq_storage", 1653e5a335dSHemant Agrawal sizeof(struct queue_storage_info_t), 1663e5a335dSHemant Agrawal RTE_CACHE_LINE_SIZE); 1673e5a335dSHemant Agrawal if (!dpaa2_q->q_storage) 1683e5a335dSHemant Agrawal goto fail; 1693e5a335dSHemant Agrawal 1703e5a335dSHemant Agrawal memset(dpaa2_q->q_storage, 0, 1713e5a335dSHemant Agrawal sizeof(struct queue_storage_info_t)); 1723e5a335dSHemant Agrawal dpaa2_q->q_storage->dq_storage[0] = rte_malloc(NULL, 1733e5a335dSHemant Agrawal DPAA2_DQRR_RING_SIZE * sizeof(struct qbman_result), 1743e5a335dSHemant Agrawal RTE_CACHE_LINE_SIZE); 1753e5a335dSHemant Agrawal } 1763e5a335dSHemant Agrawal 1773e5a335dSHemant Agrawal for (i = 0; i < priv->nb_tx_queues; i++) { 1783e5a335dSHemant Agrawal mc_q->dev = dev; 1793e5a335dSHemant Agrawal mc_q->flow_id = DPNI_NEW_FLOW_ID; 1803e5a335dSHemant Agrawal priv->tx_vq[i] = mc_q++; 1813e5a335dSHemant Agrawal } 1823e5a335dSHemant Agrawal 1833e5a335dSHemant Agrawal vq_id = 0; 18489c2ea8fSHemant Agrawal for (dist_idx = 0; dist_idx < priv->num_dist_per_tc[DPAA2_DEF_TC]; 18589c2ea8fSHemant Agrawal dist_idx++) { 1863e5a335dSHemant Agrawal mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id]; 1873e5a335dSHemant Agrawal mcq->tc_index = DPAA2_DEF_TC; 1883e5a335dSHemant Agrawal mcq->flow_id = dist_idx; 1893e5a335dSHemant Agrawal vq_id++; 1903e5a335dSHemant Agrawal } 1913e5a335dSHemant Agrawal 1923e5a335dSHemant Agrawal return 0; 1933e5a335dSHemant Agrawal fail: 1943e5a335dSHemant Agrawal i -= 1; 1953e5a335dSHemant Agrawal mc_q = priv->rx_vq[0]; 1963e5a335dSHemant Agrawal while (i >= 0) { 1973e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 1983e5a335dSHemant Agrawal rte_free(dpaa2_q->q_storage->dq_storage[0]); 1993e5a335dSHemant Agrawal rte_free(dpaa2_q->q_storage); 2003e5a335dSHemant Agrawal priv->rx_vq[i--] = NULL; 2013e5a335dSHemant Agrawal } 2023e5a335dSHemant Agrawal rte_free(mc_q); 2033e5a335dSHemant Agrawal return -1; 2043e5a335dSHemant Agrawal } 2053e5a335dSHemant Agrawal 2063e5a335dSHemant Agrawal static int 2073e5a335dSHemant Agrawal dpaa2_eth_dev_configure(struct rte_eth_dev *dev) 2083e5a335dSHemant Agrawal { 2093e5a335dSHemant Agrawal struct rte_eth_dev_data *data = dev->data; 2103e5a335dSHemant Agrawal struct rte_eth_conf *eth_conf = &data->dev_conf; 21189c2ea8fSHemant Agrawal int ret; 2123e5a335dSHemant Agrawal 2133e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 2143e5a335dSHemant Agrawal 2153e5a335dSHemant Agrawal /* Check for correct configuration */ 2163e5a335dSHemant Agrawal if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS && 2173e5a335dSHemant Agrawal data->nb_rx_queues > 1) { 2183e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Distribution is not enabled, " 2193e5a335dSHemant Agrawal "but Rx queues more than 1\n"); 2203e5a335dSHemant Agrawal return -1; 2213e5a335dSHemant Agrawal } 2223e5a335dSHemant Agrawal 22389c2ea8fSHemant Agrawal if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) { 22489c2ea8fSHemant Agrawal /* Return in case number of Rx queues is 1 */ 22589c2ea8fSHemant Agrawal if (data->nb_rx_queues == 1) 22689c2ea8fSHemant Agrawal return 0; 22789c2ea8fSHemant Agrawal ret = dpaa2_setup_flow_dist(dev, 22889c2ea8fSHemant Agrawal eth_conf->rx_adv_conf.rss_conf.rss_hf); 22989c2ea8fSHemant Agrawal if (ret) { 23089c2ea8fSHemant Agrawal PMD_INIT_LOG(ERR, "unable to set flow distribution." 23189c2ea8fSHemant Agrawal "please check queue config\n"); 23289c2ea8fSHemant Agrawal return ret; 23389c2ea8fSHemant Agrawal } 23489c2ea8fSHemant Agrawal } 2353e5a335dSHemant Agrawal return 0; 2363e5a335dSHemant Agrawal } 2373e5a335dSHemant Agrawal 2383e5a335dSHemant Agrawal /* Function to setup RX flow information. It contains traffic class ID, 2393e5a335dSHemant Agrawal * flow ID, destination configuration etc. 2403e5a335dSHemant Agrawal */ 2413e5a335dSHemant Agrawal static int 2423e5a335dSHemant Agrawal dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, 2433e5a335dSHemant Agrawal uint16_t rx_queue_id, 2443e5a335dSHemant Agrawal uint16_t nb_rx_desc __rte_unused, 2453e5a335dSHemant Agrawal unsigned int socket_id __rte_unused, 2463e5a335dSHemant Agrawal const struct rte_eth_rxconf *rx_conf __rte_unused, 2473e5a335dSHemant Agrawal struct rte_mempool *mb_pool) 2483e5a335dSHemant Agrawal { 2493e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 2503e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 2513e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q; 2523e5a335dSHemant Agrawal struct dpni_queue cfg; 2533e5a335dSHemant Agrawal uint8_t options = 0; 2543e5a335dSHemant Agrawal uint8_t flow_id; 255bee61d86SHemant Agrawal uint32_t bpid; 2563e5a335dSHemant Agrawal int ret; 2573e5a335dSHemant Agrawal 2583e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 2593e5a335dSHemant Agrawal 2603e5a335dSHemant Agrawal PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p", 2613e5a335dSHemant Agrawal dev, rx_queue_id, mb_pool, rx_conf); 2623e5a335dSHemant Agrawal 263bee61d86SHemant Agrawal if (!priv->bp_list || priv->bp_list->mp != mb_pool) { 264bee61d86SHemant Agrawal bpid = mempool_to_bpid(mb_pool); 265bee61d86SHemant Agrawal ret = dpaa2_attach_bp_list(priv, 266bee61d86SHemant Agrawal rte_dpaa2_bpid_info[bpid].bp_list); 267bee61d86SHemant Agrawal if (ret) 268bee61d86SHemant Agrawal return ret; 269bee61d86SHemant Agrawal } 2703e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; 2713e5a335dSHemant Agrawal dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */ 2723e5a335dSHemant Agrawal 2733e5a335dSHemant Agrawal /*Get the tc id and flow id from given VQ id*/ 27489c2ea8fSHemant Agrawal flow_id = rx_queue_id % priv->num_dist_per_tc[dpaa2_q->tc_index]; 2753e5a335dSHemant Agrawal memset(&cfg, 0, sizeof(struct dpni_queue)); 2763e5a335dSHemant Agrawal 2773e5a335dSHemant Agrawal options = options | DPNI_QUEUE_OPT_USER_CTX; 2783e5a335dSHemant Agrawal cfg.user_context = (uint64_t)(dpaa2_q); 2793e5a335dSHemant Agrawal 2803e5a335dSHemant Agrawal ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX, 2813e5a335dSHemant Agrawal dpaa2_q->tc_index, flow_id, options, &cfg); 2823e5a335dSHemant Agrawal if (ret) { 2833e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Error in setting the rx flow: = %d\n", ret); 2843e5a335dSHemant Agrawal return -1; 2853e5a335dSHemant Agrawal } 2863e5a335dSHemant Agrawal 2873e5a335dSHemant Agrawal dev->data->rx_queues[rx_queue_id] = dpaa2_q; 2883e5a335dSHemant Agrawal return 0; 2893e5a335dSHemant Agrawal } 2903e5a335dSHemant Agrawal 2913e5a335dSHemant Agrawal static int 2923e5a335dSHemant Agrawal dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, 2933e5a335dSHemant Agrawal uint16_t tx_queue_id, 2943e5a335dSHemant Agrawal uint16_t nb_tx_desc __rte_unused, 2953e5a335dSHemant Agrawal unsigned int socket_id __rte_unused, 2963e5a335dSHemant Agrawal const struct rte_eth_txconf *tx_conf __rte_unused) 2973e5a335dSHemant Agrawal { 2983e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 2993e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *) 3003e5a335dSHemant Agrawal priv->tx_vq[tx_queue_id]; 3013e5a335dSHemant Agrawal struct fsl_mc_io *dpni = priv->hw; 3023e5a335dSHemant Agrawal struct dpni_queue tx_conf_cfg; 3033e5a335dSHemant Agrawal struct dpni_queue tx_flow_cfg; 3043e5a335dSHemant Agrawal uint8_t options = 0, flow_id; 3053e5a335dSHemant Agrawal uint32_t tc_id; 3063e5a335dSHemant Agrawal int ret; 3073e5a335dSHemant Agrawal 3083e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 3093e5a335dSHemant Agrawal 3103e5a335dSHemant Agrawal /* Return if queue already configured */ 3113e5a335dSHemant Agrawal if (dpaa2_q->flow_id != DPNI_NEW_FLOW_ID) 3123e5a335dSHemant Agrawal return 0; 3133e5a335dSHemant Agrawal 3143e5a335dSHemant Agrawal memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue)); 3153e5a335dSHemant Agrawal memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue)); 3163e5a335dSHemant Agrawal 317ef18dafeSHemant Agrawal if (priv->num_tc == 1) { 3183e5a335dSHemant Agrawal tc_id = 0; 319ef18dafeSHemant Agrawal flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id]; 320ef18dafeSHemant Agrawal } else { 321ef18dafeSHemant Agrawal tc_id = tx_queue_id; 322ef18dafeSHemant Agrawal flow_id = 0; 323ef18dafeSHemant Agrawal } 3243e5a335dSHemant Agrawal 3253e5a335dSHemant Agrawal ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX, 3263e5a335dSHemant Agrawal tc_id, flow_id, options, &tx_flow_cfg); 3273e5a335dSHemant Agrawal if (ret) { 3283e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Error in setting the tx flow: " 3293e5a335dSHemant Agrawal "tc_id=%d, flow =%d ErrorCode = %x\n", 3303e5a335dSHemant Agrawal tc_id, flow_id, -ret); 3313e5a335dSHemant Agrawal return -1; 3323e5a335dSHemant Agrawal } 3333e5a335dSHemant Agrawal 3343e5a335dSHemant Agrawal dpaa2_q->flow_id = flow_id; 3353e5a335dSHemant Agrawal 3363e5a335dSHemant Agrawal if (tx_queue_id == 0) { 3373e5a335dSHemant Agrawal /*Set tx-conf and error configuration*/ 3383e5a335dSHemant Agrawal ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW, 3393e5a335dSHemant Agrawal priv->token, 3403e5a335dSHemant Agrawal DPNI_CONF_DISABLE); 3413e5a335dSHemant Agrawal if (ret) { 3423e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Error in set tx conf mode settings" 3433e5a335dSHemant Agrawal " ErrorCode = %x", ret); 3443e5a335dSHemant Agrawal return -1; 3453e5a335dSHemant Agrawal } 3463e5a335dSHemant Agrawal } 3473e5a335dSHemant Agrawal dpaa2_q->tc_index = tc_id; 3483e5a335dSHemant Agrawal 3493e5a335dSHemant Agrawal dev->data->tx_queues[tx_queue_id] = dpaa2_q; 3503e5a335dSHemant Agrawal return 0; 3513e5a335dSHemant Agrawal } 3523e5a335dSHemant Agrawal 3533e5a335dSHemant Agrawal static void 3543e5a335dSHemant Agrawal dpaa2_dev_rx_queue_release(void *q __rte_unused) 3553e5a335dSHemant Agrawal { 3563e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 3573e5a335dSHemant Agrawal } 3583e5a335dSHemant Agrawal 3593e5a335dSHemant Agrawal static void 3603e5a335dSHemant Agrawal dpaa2_dev_tx_queue_release(void *q __rte_unused) 3613e5a335dSHemant Agrawal { 3623e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 3633e5a335dSHemant Agrawal } 3643e5a335dSHemant Agrawal 365a5fc38d4SHemant Agrawal static const uint32_t * 366a5fc38d4SHemant Agrawal dpaa2_supported_ptypes_get(struct rte_eth_dev *dev) 367a5fc38d4SHemant Agrawal { 368a5fc38d4SHemant Agrawal static const uint32_t ptypes[] = { 369a5fc38d4SHemant Agrawal /*todo -= add more types */ 370a5fc38d4SHemant Agrawal RTE_PTYPE_L2_ETHER, 371a5fc38d4SHemant Agrawal RTE_PTYPE_L3_IPV4, 372a5fc38d4SHemant Agrawal RTE_PTYPE_L3_IPV4_EXT, 373a5fc38d4SHemant Agrawal RTE_PTYPE_L3_IPV6, 374a5fc38d4SHemant Agrawal RTE_PTYPE_L3_IPV6_EXT, 375a5fc38d4SHemant Agrawal RTE_PTYPE_L4_TCP, 376a5fc38d4SHemant Agrawal RTE_PTYPE_L4_UDP, 377a5fc38d4SHemant Agrawal RTE_PTYPE_L4_SCTP, 378a5fc38d4SHemant Agrawal RTE_PTYPE_L4_ICMP, 379a5fc38d4SHemant Agrawal RTE_PTYPE_UNKNOWN 380a5fc38d4SHemant Agrawal }; 381a5fc38d4SHemant Agrawal 382a5fc38d4SHemant Agrawal if (dev->rx_pkt_burst == dpaa2_dev_rx) 383a5fc38d4SHemant Agrawal return ptypes; 384a5fc38d4SHemant Agrawal return NULL; 385a5fc38d4SHemant Agrawal } 386a5fc38d4SHemant Agrawal 3873e5a335dSHemant Agrawal static int 3883e5a335dSHemant Agrawal dpaa2_dev_start(struct rte_eth_dev *dev) 3893e5a335dSHemant Agrawal { 3903e5a335dSHemant Agrawal struct rte_eth_dev_data *data = dev->data; 3913e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = data->dev_private; 3923e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 3933e5a335dSHemant Agrawal struct dpni_queue cfg; 394ef18dafeSHemant Agrawal struct dpni_error_cfg err_cfg; 3953e5a335dSHemant Agrawal uint16_t qdid; 3963e5a335dSHemant Agrawal struct dpni_queue_id qid; 3973e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q; 3983e5a335dSHemant Agrawal int ret, i; 3993e5a335dSHemant Agrawal 4003e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 4013e5a335dSHemant Agrawal 4023e5a335dSHemant Agrawal ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token); 4033e5a335dSHemant Agrawal if (ret) { 4043e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Failure %d in enabling dpni %d device\n", 4053e5a335dSHemant Agrawal ret, priv->hw_id); 4063e5a335dSHemant Agrawal return ret; 4073e5a335dSHemant Agrawal } 4083e5a335dSHemant Agrawal 4093e5a335dSHemant Agrawal ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token, 4103e5a335dSHemant Agrawal DPNI_QUEUE_TX, &qdid); 4113e5a335dSHemant Agrawal if (ret) { 4123e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret); 4133e5a335dSHemant Agrawal return ret; 4143e5a335dSHemant Agrawal } 4153e5a335dSHemant Agrawal priv->qdid = qdid; 4163e5a335dSHemant Agrawal 4173e5a335dSHemant Agrawal for (i = 0; i < data->nb_rx_queues; i++) { 4183e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i]; 4193e5a335dSHemant Agrawal ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token, 4203e5a335dSHemant Agrawal DPNI_QUEUE_RX, dpaa2_q->tc_index, 4213e5a335dSHemant Agrawal dpaa2_q->flow_id, &cfg, &qid); 4223e5a335dSHemant Agrawal if (ret) { 4233e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Error to get flow " 4243e5a335dSHemant Agrawal "information Error code = %d\n", ret); 4253e5a335dSHemant Agrawal return ret; 4263e5a335dSHemant Agrawal } 4273e5a335dSHemant Agrawal dpaa2_q->fqid = qid.fqid; 4283e5a335dSHemant Agrawal } 4293e5a335dSHemant Agrawal 430ef18dafeSHemant Agrawal ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 431ef18dafeSHemant Agrawal DPNI_OFF_RX_L3_CSUM, true); 432ef18dafeSHemant Agrawal if (ret) { 433ef18dafeSHemant Agrawal PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret); 434ef18dafeSHemant Agrawal return ret; 435ef18dafeSHemant Agrawal } 436ef18dafeSHemant Agrawal 437ef18dafeSHemant Agrawal ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 438ef18dafeSHemant Agrawal DPNI_OFF_RX_L4_CSUM, true); 439ef18dafeSHemant Agrawal if (ret) { 440ef18dafeSHemant Agrawal PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret); 441ef18dafeSHemant Agrawal return ret; 442ef18dafeSHemant Agrawal } 443ef18dafeSHemant Agrawal 444ef18dafeSHemant Agrawal ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 445ef18dafeSHemant Agrawal DPNI_OFF_TX_L3_CSUM, true); 446ef18dafeSHemant Agrawal if (ret) { 447ef18dafeSHemant Agrawal PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret); 448ef18dafeSHemant Agrawal return ret; 449ef18dafeSHemant Agrawal } 450ef18dafeSHemant Agrawal 451ef18dafeSHemant Agrawal ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token, 452ef18dafeSHemant Agrawal DPNI_OFF_TX_L4_CSUM, true); 453ef18dafeSHemant Agrawal if (ret) { 454ef18dafeSHemant Agrawal PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret); 455ef18dafeSHemant Agrawal return ret; 456ef18dafeSHemant Agrawal } 457ef18dafeSHemant Agrawal 458ef18dafeSHemant Agrawal /*checksum errors, send them to normal path and set it in annotation */ 459ef18dafeSHemant Agrawal err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE; 460ef18dafeSHemant Agrawal 461ef18dafeSHemant Agrawal err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE; 462ef18dafeSHemant Agrawal err_cfg.set_frame_annotation = true; 463ef18dafeSHemant Agrawal 464ef18dafeSHemant Agrawal ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW, 465ef18dafeSHemant Agrawal priv->token, &err_cfg); 466ef18dafeSHemant Agrawal if (ret) { 467ef18dafeSHemant Agrawal PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:" 468ef18dafeSHemant Agrawal "code = %d\n", ret); 469ef18dafeSHemant Agrawal return ret; 470ef18dafeSHemant Agrawal } 471ef18dafeSHemant Agrawal 4723e5a335dSHemant Agrawal return 0; 4733e5a335dSHemant Agrawal } 4743e5a335dSHemant Agrawal 4753e5a335dSHemant Agrawal /** 4763e5a335dSHemant Agrawal * This routine disables all traffic on the adapter by issuing a 4773e5a335dSHemant Agrawal * global reset on the MAC. 4783e5a335dSHemant Agrawal */ 4793e5a335dSHemant Agrawal static void 4803e5a335dSHemant Agrawal dpaa2_dev_stop(struct rte_eth_dev *dev) 4813e5a335dSHemant Agrawal { 4823e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 4833e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 4843e5a335dSHemant Agrawal int ret; 485*c56c86ffSHemant Agrawal struct rte_eth_link link; 4863e5a335dSHemant Agrawal 4873e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 4883e5a335dSHemant Agrawal 4893e5a335dSHemant Agrawal ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token); 4903e5a335dSHemant Agrawal if (ret) { 4913e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Failure (ret %d) in disabling dpni %d dev\n", 4923e5a335dSHemant Agrawal ret, priv->hw_id); 4933e5a335dSHemant Agrawal return; 4943e5a335dSHemant Agrawal } 495*c56c86ffSHemant Agrawal 496*c56c86ffSHemant Agrawal /* clear the recorded link status */ 497*c56c86ffSHemant Agrawal memset(&link, 0, sizeof(link)); 498*c56c86ffSHemant Agrawal dpaa2_dev_atomic_write_link_status(dev, &link); 4993e5a335dSHemant Agrawal } 5003e5a335dSHemant Agrawal 5013e5a335dSHemant Agrawal static void 5023e5a335dSHemant Agrawal dpaa2_dev_close(struct rte_eth_dev *dev) 5033e5a335dSHemant Agrawal { 5043e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 5053e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 5063e5a335dSHemant Agrawal int ret; 5073e5a335dSHemant Agrawal 5083e5a335dSHemant Agrawal PMD_INIT_FUNC_TRACE(); 5093e5a335dSHemant Agrawal 5103e5a335dSHemant Agrawal /* Clean the device first */ 5113e5a335dSHemant Agrawal ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token); 5123e5a335dSHemant Agrawal if (ret) { 5133e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Failure cleaning dpni device with" 5143e5a335dSHemant Agrawal " error code %d\n", ret); 5153e5a335dSHemant Agrawal return; 5163e5a335dSHemant Agrawal } 5173e5a335dSHemant Agrawal } 5183e5a335dSHemant Agrawal 519c0e5c69aSHemant Agrawal static void 520c0e5c69aSHemant Agrawal dpaa2_dev_promiscuous_enable( 521c0e5c69aSHemant Agrawal struct rte_eth_dev *dev) 522c0e5c69aSHemant Agrawal { 523c0e5c69aSHemant Agrawal int ret; 524c0e5c69aSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 525c0e5c69aSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 526c0e5c69aSHemant Agrawal 527c0e5c69aSHemant Agrawal PMD_INIT_FUNC_TRACE(); 528c0e5c69aSHemant Agrawal 529c0e5c69aSHemant Agrawal if (dpni == NULL) { 530c0e5c69aSHemant Agrawal RTE_LOG(ERR, PMD, "dpni is NULL"); 531c0e5c69aSHemant Agrawal return; 532c0e5c69aSHemant Agrawal } 533c0e5c69aSHemant Agrawal 534c0e5c69aSHemant Agrawal ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true); 535c0e5c69aSHemant Agrawal if (ret < 0) 536c0e5c69aSHemant Agrawal RTE_LOG(ERR, PMD, "Unable to enable promiscuous mode %d", ret); 537c0e5c69aSHemant Agrawal } 538c0e5c69aSHemant Agrawal 539c0e5c69aSHemant Agrawal static void 540c0e5c69aSHemant Agrawal dpaa2_dev_promiscuous_disable( 541c0e5c69aSHemant Agrawal struct rte_eth_dev *dev) 542c0e5c69aSHemant Agrawal { 543c0e5c69aSHemant Agrawal int ret; 544c0e5c69aSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 545c0e5c69aSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 546c0e5c69aSHemant Agrawal 547c0e5c69aSHemant Agrawal PMD_INIT_FUNC_TRACE(); 548c0e5c69aSHemant Agrawal 549c0e5c69aSHemant Agrawal if (dpni == NULL) { 550c0e5c69aSHemant Agrawal RTE_LOG(ERR, PMD, "dpni is NULL"); 551c0e5c69aSHemant Agrawal return; 552c0e5c69aSHemant Agrawal } 553c0e5c69aSHemant Agrawal 554c0e5c69aSHemant Agrawal ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false); 555c0e5c69aSHemant Agrawal if (ret < 0) 556c0e5c69aSHemant Agrawal RTE_LOG(ERR, PMD, "Unable to disable promiscuous mode %d", ret); 557c0e5c69aSHemant Agrawal } 558e31d4d21SHemant Agrawal 559e31d4d21SHemant Agrawal static int 560e31d4d21SHemant Agrawal dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 561e31d4d21SHemant Agrawal { 562e31d4d21SHemant Agrawal int ret; 563e31d4d21SHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 564e31d4d21SHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 565e31d4d21SHemant Agrawal uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 566e31d4d21SHemant Agrawal 567e31d4d21SHemant Agrawal PMD_INIT_FUNC_TRACE(); 568e31d4d21SHemant Agrawal 569e31d4d21SHemant Agrawal if (dpni == NULL) { 570e31d4d21SHemant Agrawal RTE_LOG(ERR, PMD, "dpni is NULL"); 571e31d4d21SHemant Agrawal return -EINVAL; 572e31d4d21SHemant Agrawal } 573e31d4d21SHemant Agrawal 574e31d4d21SHemant Agrawal /* check that mtu is within the allowed range */ 575e31d4d21SHemant Agrawal if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN)) 576e31d4d21SHemant Agrawal return -EINVAL; 577e31d4d21SHemant Agrawal 578e31d4d21SHemant Agrawal /* Set the Max Rx frame length as 'mtu' + 579e31d4d21SHemant Agrawal * Maximum Ethernet header length 580e31d4d21SHemant Agrawal */ 581e31d4d21SHemant Agrawal ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token, 582e31d4d21SHemant Agrawal mtu + ETH_VLAN_HLEN); 583e31d4d21SHemant Agrawal if (ret) { 584e31d4d21SHemant Agrawal PMD_DRV_LOG(ERR, "setting the max frame length failed"); 585e31d4d21SHemant Agrawal return -1; 586e31d4d21SHemant Agrawal } 587e31d4d21SHemant Agrawal PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu); 588e31d4d21SHemant Agrawal return 0; 589e31d4d21SHemant Agrawal } 590e31d4d21SHemant Agrawal 591*c56c86ffSHemant Agrawal /* return 0 means link status changed, -1 means not changed */ 592*c56c86ffSHemant Agrawal static int 593*c56c86ffSHemant Agrawal dpaa2_dev_link_update(struct rte_eth_dev *dev, 594*c56c86ffSHemant Agrawal int wait_to_complete __rte_unused) 595*c56c86ffSHemant Agrawal { 596*c56c86ffSHemant Agrawal int ret; 597*c56c86ffSHemant Agrawal struct dpaa2_dev_priv *priv = dev->data->dev_private; 598*c56c86ffSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 599*c56c86ffSHemant Agrawal struct rte_eth_link link, old; 600*c56c86ffSHemant Agrawal struct dpni_link_state state = {0}; 601*c56c86ffSHemant Agrawal 602*c56c86ffSHemant Agrawal PMD_INIT_FUNC_TRACE(); 603*c56c86ffSHemant Agrawal 604*c56c86ffSHemant Agrawal if (dpni == NULL) { 605*c56c86ffSHemant Agrawal RTE_LOG(ERR, PMD, "error : dpni is NULL"); 606*c56c86ffSHemant Agrawal return 0; 607*c56c86ffSHemant Agrawal } 608*c56c86ffSHemant Agrawal memset(&old, 0, sizeof(old)); 609*c56c86ffSHemant Agrawal dpaa2_dev_atomic_read_link_status(dev, &old); 610*c56c86ffSHemant Agrawal 611*c56c86ffSHemant Agrawal ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state); 612*c56c86ffSHemant Agrawal if (ret < 0) { 613*c56c86ffSHemant Agrawal RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d", ret); 614*c56c86ffSHemant Agrawal return -1; 615*c56c86ffSHemant Agrawal } 616*c56c86ffSHemant Agrawal 617*c56c86ffSHemant Agrawal if ((old.link_status == state.up) && (old.link_speed == state.rate)) { 618*c56c86ffSHemant Agrawal RTE_LOG(DEBUG, PMD, "No change in status\n"); 619*c56c86ffSHemant Agrawal return -1; 620*c56c86ffSHemant Agrawal } 621*c56c86ffSHemant Agrawal 622*c56c86ffSHemant Agrawal memset(&link, 0, sizeof(struct rte_eth_link)); 623*c56c86ffSHemant Agrawal link.link_status = state.up; 624*c56c86ffSHemant Agrawal link.link_speed = state.rate; 625*c56c86ffSHemant Agrawal 626*c56c86ffSHemant Agrawal if (state.options & DPNI_LINK_OPT_HALF_DUPLEX) 627*c56c86ffSHemant Agrawal link.link_duplex = ETH_LINK_HALF_DUPLEX; 628*c56c86ffSHemant Agrawal else 629*c56c86ffSHemant Agrawal link.link_duplex = ETH_LINK_FULL_DUPLEX; 630*c56c86ffSHemant Agrawal 631*c56c86ffSHemant Agrawal dpaa2_dev_atomic_write_link_status(dev, &link); 632*c56c86ffSHemant Agrawal 633*c56c86ffSHemant Agrawal if (link.link_status) 634*c56c86ffSHemant Agrawal PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id); 635*c56c86ffSHemant Agrawal else 636*c56c86ffSHemant Agrawal PMD_DRV_LOG(INFO, "Port %d Link is Down\n", dev->data->port_id); 637*c56c86ffSHemant Agrawal return 0; 638*c56c86ffSHemant Agrawal } 639*c56c86ffSHemant Agrawal 6403e5a335dSHemant Agrawal static struct eth_dev_ops dpaa2_ethdev_ops = { 6413e5a335dSHemant Agrawal .dev_configure = dpaa2_eth_dev_configure, 6423e5a335dSHemant Agrawal .dev_start = dpaa2_dev_start, 6433e5a335dSHemant Agrawal .dev_stop = dpaa2_dev_stop, 6443e5a335dSHemant Agrawal .dev_close = dpaa2_dev_close, 645c0e5c69aSHemant Agrawal .promiscuous_enable = dpaa2_dev_promiscuous_enable, 646c0e5c69aSHemant Agrawal .promiscuous_disable = dpaa2_dev_promiscuous_disable, 647*c56c86ffSHemant Agrawal .link_update = dpaa2_dev_link_update, 6483e5a335dSHemant Agrawal .dev_infos_get = dpaa2_dev_info_get, 649a5fc38d4SHemant Agrawal .dev_supported_ptypes_get = dpaa2_supported_ptypes_get, 650e31d4d21SHemant Agrawal .mtu_set = dpaa2_dev_mtu_set, 6513e5a335dSHemant Agrawal .rx_queue_setup = dpaa2_dev_rx_queue_setup, 6523e5a335dSHemant Agrawal .rx_queue_release = dpaa2_dev_rx_queue_release, 6533e5a335dSHemant Agrawal .tx_queue_setup = dpaa2_dev_tx_queue_setup, 6543e5a335dSHemant Agrawal .tx_queue_release = dpaa2_dev_tx_queue_release, 6553e5a335dSHemant Agrawal }; 6563e5a335dSHemant Agrawal 657c147eae0SHemant Agrawal static int 658c147eae0SHemant Agrawal dpaa2_dev_init(struct rte_eth_dev *eth_dev) 659c147eae0SHemant Agrawal { 6603e5a335dSHemant Agrawal struct rte_device *dev = eth_dev->device; 6613e5a335dSHemant Agrawal struct rte_dpaa2_device *dpaa2_dev; 6623e5a335dSHemant Agrawal struct fsl_mc_io *dpni_dev; 6633e5a335dSHemant Agrawal struct dpni_attr attr; 6643e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 665bee61d86SHemant Agrawal struct dpni_buffer_layout layout; 66689c2ea8fSHemant Agrawal int i, ret, hw_id; 667bee61d86SHemant Agrawal int tot_size; 6683e5a335dSHemant Agrawal 669d401ead1SHemant Agrawal PMD_INIT_FUNC_TRACE(); 670d401ead1SHemant Agrawal 671c147eae0SHemant Agrawal /* For secondary processes, the primary has done all the work */ 672c147eae0SHemant Agrawal if (rte_eal_process_type() != RTE_PROC_PRIMARY) 673c147eae0SHemant Agrawal return 0; 674c147eae0SHemant Agrawal 6753e5a335dSHemant Agrawal dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device); 6763e5a335dSHemant Agrawal 6773e5a335dSHemant Agrawal hw_id = dpaa2_dev->object_id; 6783e5a335dSHemant Agrawal 6793e5a335dSHemant Agrawal dpni_dev = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io)); 6803e5a335dSHemant Agrawal if (!dpni_dev) { 6813e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "malloc failed for dpni device\n"); 6823e5a335dSHemant Agrawal return -1; 6833e5a335dSHemant Agrawal } 6843e5a335dSHemant Agrawal 6853e5a335dSHemant Agrawal dpni_dev->regs = rte_mcp_ptr_list[0]; 6863e5a335dSHemant Agrawal ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token); 6873e5a335dSHemant Agrawal if (ret) { 6883e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Failure in opening dpni@%d device with" 6893e5a335dSHemant Agrawal " error code %d\n", hw_id, ret); 6903e5a335dSHemant Agrawal return -1; 6913e5a335dSHemant Agrawal } 6923e5a335dSHemant Agrawal 6933e5a335dSHemant Agrawal /* Clean the device first */ 6943e5a335dSHemant Agrawal ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token); 6953e5a335dSHemant Agrawal if (ret) { 6963e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Failure cleaning dpni@%d device with" 6973e5a335dSHemant Agrawal " error code %d\n", hw_id, ret); 6983e5a335dSHemant Agrawal return -1; 6993e5a335dSHemant Agrawal } 7003e5a335dSHemant Agrawal 7013e5a335dSHemant Agrawal ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr); 7023e5a335dSHemant Agrawal if (ret) { 7033e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Failure in getting dpni@%d attribute, " 7043e5a335dSHemant Agrawal " error code %d\n", hw_id, ret); 7053e5a335dSHemant Agrawal return -1; 7063e5a335dSHemant Agrawal } 7073e5a335dSHemant Agrawal 7083e5a335dSHemant Agrawal priv->num_tc = attr.num_tcs; 70989c2ea8fSHemant Agrawal for (i = 0; i < attr.num_tcs; i++) { 71089c2ea8fSHemant Agrawal priv->num_dist_per_tc[i] = attr.num_queues; 71189c2ea8fSHemant Agrawal break; 71289c2ea8fSHemant Agrawal } 71389c2ea8fSHemant Agrawal 71489c2ea8fSHemant Agrawal /* Distribution is per Tc only, 71589c2ea8fSHemant Agrawal * so choosing RX queues from default TC only 71689c2ea8fSHemant Agrawal */ 71789c2ea8fSHemant Agrawal priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC]; 71889c2ea8fSHemant Agrawal 719ef18dafeSHemant Agrawal if (attr.num_tcs == 1) 7203e5a335dSHemant Agrawal priv->nb_tx_queues = attr.num_queues; 721ef18dafeSHemant Agrawal else 722ef18dafeSHemant Agrawal priv->nb_tx_queues = attr.num_tcs; 723ef18dafeSHemant Agrawal 724ef18dafeSHemant Agrawal PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc); 725ef18dafeSHemant Agrawal PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues); 7263e5a335dSHemant Agrawal 7273e5a335dSHemant Agrawal priv->hw = dpni_dev; 7283e5a335dSHemant Agrawal priv->hw_id = hw_id; 72933fad432SHemant Agrawal priv->options = attr.options; 73033fad432SHemant Agrawal priv->max_mac_filters = attr.mac_filter_entries; 73133fad432SHemant Agrawal priv->max_vlan_filters = attr.vlan_filter_entries; 7323e5a335dSHemant Agrawal priv->flags = 0; 7333e5a335dSHemant Agrawal 7343e5a335dSHemant Agrawal /* Allocate memory for hardware structure for queues */ 7353e5a335dSHemant Agrawal ret = dpaa2_alloc_rx_tx_queues(eth_dev); 7363e5a335dSHemant Agrawal if (ret) { 7373e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n"); 7383e5a335dSHemant Agrawal return -ret; 7393e5a335dSHemant Agrawal } 7403e5a335dSHemant Agrawal 74133fad432SHemant Agrawal /* Allocate memory for storing MAC addresses */ 74233fad432SHemant Agrawal eth_dev->data->mac_addrs = rte_zmalloc("dpni", 74333fad432SHemant Agrawal ETHER_ADDR_LEN * attr.mac_filter_entries, 0); 74433fad432SHemant Agrawal if (eth_dev->data->mac_addrs == NULL) { 74533fad432SHemant Agrawal PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to " 74633fad432SHemant Agrawal "store MAC addresses", 74733fad432SHemant Agrawal ETHER_ADDR_LEN * attr.mac_filter_entries); 74833fad432SHemant Agrawal return -ENOMEM; 74933fad432SHemant Agrawal } 75033fad432SHemant Agrawal 75133fad432SHemant Agrawal ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, 75233fad432SHemant Agrawal priv->token, 75333fad432SHemant Agrawal (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes)); 75433fad432SHemant Agrawal if (ret) { 75533fad432SHemant Agrawal PMD_INIT_LOG(ERR, "DPNI get mac address failed:" 75633fad432SHemant Agrawal " Error Code = %d\n", ret); 75733fad432SHemant Agrawal return -ret; 75833fad432SHemant Agrawal } 75933fad432SHemant Agrawal 760bee61d86SHemant Agrawal /* ... rx buffer layout ... */ 761bee61d86SHemant Agrawal tot_size = DPAA2_HW_BUF_RESERVE + RTE_PKTMBUF_HEADROOM; 762bee61d86SHemant Agrawal tot_size = RTE_ALIGN_CEIL(tot_size, 763bee61d86SHemant Agrawal DPAA2_PACKET_LAYOUT_ALIGN); 764bee61d86SHemant Agrawal 765bee61d86SHemant Agrawal memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 766bee61d86SHemant Agrawal layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS | 767bee61d86SHemant Agrawal DPNI_BUF_LAYOUT_OPT_PARSER_RESULT | 768bee61d86SHemant Agrawal DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM | 769bee61d86SHemant Agrawal DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE; 770bee61d86SHemant Agrawal 771bee61d86SHemant Agrawal layout.pass_frame_status = 1; 772bee61d86SHemant Agrawal layout.data_head_room = tot_size 773bee61d86SHemant Agrawal - DPAA2_FD_PTA_SIZE - DPAA2_MBUF_HW_ANNOTATION; 774bee61d86SHemant Agrawal layout.private_data_size = DPAA2_FD_PTA_SIZE; 775bee61d86SHemant Agrawal layout.pass_parser_result = 1; 776bee61d86SHemant Agrawal PMD_INIT_LOG(DEBUG, "Tot_size = %d, head room = %d, private = %d", 777bee61d86SHemant Agrawal tot_size, layout.data_head_room, layout.private_data_size); 778bee61d86SHemant Agrawal ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 779bee61d86SHemant Agrawal DPNI_QUEUE_RX, &layout); 780bee61d86SHemant Agrawal if (ret) { 781bee61d86SHemant Agrawal PMD_INIT_LOG(ERR, "Err(%d) in setting rx buffer layout", ret); 782bee61d86SHemant Agrawal return -1; 783bee61d86SHemant Agrawal } 784bee61d86SHemant Agrawal 785bee61d86SHemant Agrawal /* ... tx buffer layout ... */ 786bee61d86SHemant Agrawal memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 787bee61d86SHemant Agrawal layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 788bee61d86SHemant Agrawal layout.pass_frame_status = 1; 789bee61d86SHemant Agrawal ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 790bee61d86SHemant Agrawal DPNI_QUEUE_TX, &layout); 791bee61d86SHemant Agrawal if (ret) { 792bee61d86SHemant Agrawal PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer" 793bee61d86SHemant Agrawal " layout", ret); 794bee61d86SHemant Agrawal return -1; 795bee61d86SHemant Agrawal } 796bee61d86SHemant Agrawal 797bee61d86SHemant Agrawal /* ... tx-conf and error buffer layout ... */ 798bee61d86SHemant Agrawal memset(&layout, 0, sizeof(struct dpni_buffer_layout)); 799bee61d86SHemant Agrawal layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; 800bee61d86SHemant Agrawal layout.pass_frame_status = 1; 801bee61d86SHemant Agrawal ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token, 802bee61d86SHemant Agrawal DPNI_QUEUE_TX_CONFIRM, &layout); 803bee61d86SHemant Agrawal if (ret) { 804bee61d86SHemant Agrawal PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer" 805bee61d86SHemant Agrawal " layout", ret); 806bee61d86SHemant Agrawal return -1; 807bee61d86SHemant Agrawal } 808bee61d86SHemant Agrawal 8093e5a335dSHemant Agrawal eth_dev->dev_ops = &dpaa2_ethdev_ops; 810c147eae0SHemant Agrawal eth_dev->data->drv_name = rte_dpaa2_pmd.driver.name; 811c147eae0SHemant Agrawal 812cd9935ceSHemant Agrawal eth_dev->rx_pkt_burst = dpaa2_dev_rx; 813cd9935ceSHemant Agrawal eth_dev->tx_pkt_burst = dpaa2_dev_tx; 814c147eae0SHemant Agrawal return 0; 815c147eae0SHemant Agrawal } 816c147eae0SHemant Agrawal 817c147eae0SHemant Agrawal static int 8183e5a335dSHemant Agrawal dpaa2_dev_uninit(struct rte_eth_dev *eth_dev) 819c147eae0SHemant Agrawal { 8203e5a335dSHemant Agrawal struct dpaa2_dev_priv *priv = eth_dev->data->dev_private; 8213e5a335dSHemant Agrawal struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw; 8223e5a335dSHemant Agrawal int i, ret; 8233e5a335dSHemant Agrawal struct dpaa2_queue *dpaa2_q; 8243e5a335dSHemant Agrawal 825d401ead1SHemant Agrawal PMD_INIT_FUNC_TRACE(); 826d401ead1SHemant Agrawal 827c147eae0SHemant Agrawal if (rte_eal_process_type() != RTE_PROC_PRIMARY) 828c147eae0SHemant Agrawal return -EPERM; 829c147eae0SHemant Agrawal 8303e5a335dSHemant Agrawal if (!dpni) { 8313e5a335dSHemant Agrawal PMD_INIT_LOG(WARNING, "Already closed or not started"); 8323e5a335dSHemant Agrawal return -1; 8333e5a335dSHemant Agrawal } 8343e5a335dSHemant Agrawal 8353e5a335dSHemant Agrawal dpaa2_dev_close(eth_dev); 8363e5a335dSHemant Agrawal 8373e5a335dSHemant Agrawal if (priv->rx_vq[0]) { 8383e5a335dSHemant Agrawal /* cleaning up queue storage */ 8393e5a335dSHemant Agrawal for (i = 0; i < priv->nb_rx_queues; i++) { 8403e5a335dSHemant Agrawal dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i]; 8413e5a335dSHemant Agrawal if (dpaa2_q->q_storage) 8423e5a335dSHemant Agrawal rte_free(dpaa2_q->q_storage); 8433e5a335dSHemant Agrawal } 8443e5a335dSHemant Agrawal /*free the all queue memory */ 8453e5a335dSHemant Agrawal rte_free(priv->rx_vq[0]); 8463e5a335dSHemant Agrawal priv->rx_vq[0] = NULL; 8473e5a335dSHemant Agrawal } 8483e5a335dSHemant Agrawal 84933fad432SHemant Agrawal /* Allocate memory for storing MAC addresses */ 85033fad432SHemant Agrawal if (eth_dev->data->mac_addrs) { 85133fad432SHemant Agrawal rte_free(eth_dev->data->mac_addrs); 85233fad432SHemant Agrawal eth_dev->data->mac_addrs = NULL; 85333fad432SHemant Agrawal } 8543e5a335dSHemant Agrawal 8553e5a335dSHemant Agrawal /*Close the device at underlying layer*/ 8563e5a335dSHemant Agrawal ret = dpni_close(dpni, CMD_PRI_LOW, priv->token); 8573e5a335dSHemant Agrawal if (ret) { 8583e5a335dSHemant Agrawal PMD_INIT_LOG(ERR, "Failure closing dpni device with" 8593e5a335dSHemant Agrawal " error code %d\n", ret); 8603e5a335dSHemant Agrawal } 8613e5a335dSHemant Agrawal 8623e5a335dSHemant Agrawal /*Free the allocated memory for ethernet private data and dpni*/ 8633e5a335dSHemant Agrawal priv->hw = NULL; 8643e5a335dSHemant Agrawal free(dpni); 8653e5a335dSHemant Agrawal 8663e5a335dSHemant Agrawal eth_dev->dev_ops = NULL; 867cd9935ceSHemant Agrawal eth_dev->rx_pkt_burst = NULL; 868cd9935ceSHemant Agrawal eth_dev->tx_pkt_burst = NULL; 8693e5a335dSHemant Agrawal 870c147eae0SHemant Agrawal return 0; 871c147eae0SHemant Agrawal } 872c147eae0SHemant Agrawal 873c147eae0SHemant Agrawal static int 874c147eae0SHemant Agrawal rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused, 875c147eae0SHemant Agrawal struct rte_dpaa2_device *dpaa2_dev) 876c147eae0SHemant Agrawal { 877c147eae0SHemant Agrawal struct rte_eth_dev *eth_dev; 878c147eae0SHemant Agrawal char ethdev_name[RTE_ETH_NAME_MAX_LEN]; 879c147eae0SHemant Agrawal 880c147eae0SHemant Agrawal int diag; 881c147eae0SHemant Agrawal 882c147eae0SHemant Agrawal sprintf(ethdev_name, "dpni-%d", dpaa2_dev->object_id); 883c147eae0SHemant Agrawal 884c147eae0SHemant Agrawal eth_dev = rte_eth_dev_allocate(ethdev_name); 885c147eae0SHemant Agrawal if (eth_dev == NULL) 886c147eae0SHemant Agrawal return -ENOMEM; 887c147eae0SHemant Agrawal 888c147eae0SHemant Agrawal if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 889c147eae0SHemant Agrawal eth_dev->data->dev_private = rte_zmalloc( 890c147eae0SHemant Agrawal "ethdev private structure", 891c147eae0SHemant Agrawal sizeof(struct dpaa2_dev_priv), 892c147eae0SHemant Agrawal RTE_CACHE_LINE_SIZE); 893c147eae0SHemant Agrawal if (eth_dev->data->dev_private == NULL) { 894d401ead1SHemant Agrawal PMD_INIT_LOG(CRIT, "Cannot allocate memzone for" 895c147eae0SHemant Agrawal " private port data\n"); 896c147eae0SHemant Agrawal rte_eth_dev_release_port(eth_dev); 897c147eae0SHemant Agrawal return -ENOMEM; 898c147eae0SHemant Agrawal } 899c147eae0SHemant Agrawal } 900c147eae0SHemant Agrawal eth_dev->device = &dpaa2_dev->device; 901c147eae0SHemant Agrawal dpaa2_dev->eth_dev = eth_dev; 902c147eae0SHemant Agrawal eth_dev->data->rx_mbuf_alloc_failed = 0; 903c147eae0SHemant Agrawal 904c147eae0SHemant Agrawal /* Invoke PMD device initialization function */ 905c147eae0SHemant Agrawal diag = dpaa2_dev_init(eth_dev); 906c147eae0SHemant Agrawal if (diag == 0) 907c147eae0SHemant Agrawal return 0; 908c147eae0SHemant Agrawal 909c147eae0SHemant Agrawal if (rte_eal_process_type() == RTE_PROC_PRIMARY) 910c147eae0SHemant Agrawal rte_free(eth_dev->data->dev_private); 911c147eae0SHemant Agrawal rte_eth_dev_release_port(eth_dev); 912c147eae0SHemant Agrawal return diag; 913c147eae0SHemant Agrawal } 914c147eae0SHemant Agrawal 915c147eae0SHemant Agrawal static int 916c147eae0SHemant Agrawal rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev) 917c147eae0SHemant Agrawal { 918c147eae0SHemant Agrawal struct rte_eth_dev *eth_dev; 919c147eae0SHemant Agrawal 920c147eae0SHemant Agrawal eth_dev = dpaa2_dev->eth_dev; 921c147eae0SHemant Agrawal dpaa2_dev_uninit(eth_dev); 922c147eae0SHemant Agrawal 923c147eae0SHemant Agrawal if (rte_eal_process_type() == RTE_PROC_PRIMARY) 924c147eae0SHemant Agrawal rte_free(eth_dev->data->dev_private); 925c147eae0SHemant Agrawal rte_eth_dev_release_port(eth_dev); 926c147eae0SHemant Agrawal 927c147eae0SHemant Agrawal return 0; 928c147eae0SHemant Agrawal } 929c147eae0SHemant Agrawal 930c147eae0SHemant Agrawal static struct rte_dpaa2_driver rte_dpaa2_pmd = { 931c147eae0SHemant Agrawal .drv_type = DPAA2_MC_DPNI_DEVID, 932c147eae0SHemant Agrawal .probe = rte_dpaa2_probe, 933c147eae0SHemant Agrawal .remove = rte_dpaa2_remove, 934c147eae0SHemant Agrawal }; 935c147eae0SHemant Agrawal 936c147eae0SHemant Agrawal RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd); 937