xref: /dpdk/drivers/net/dpaa2/dpaa2_ethdev.c (revision c0e5c69a3a3d030bdd8c9f9aa6ed06c92f9753c2)
1c147eae0SHemant Agrawal /*-
2c147eae0SHemant Agrawal  *   BSD LICENSE
3c147eae0SHemant Agrawal  *
4c147eae0SHemant Agrawal  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5c147eae0SHemant Agrawal  *   Copyright (c) 2016 NXP. All rights reserved.
6c147eae0SHemant Agrawal  *
7c147eae0SHemant Agrawal  *   Redistribution and use in source and binary forms, with or without
8c147eae0SHemant Agrawal  *   modification, are permitted provided that the following conditions
9c147eae0SHemant Agrawal  *   are met:
10c147eae0SHemant Agrawal  *
11c147eae0SHemant Agrawal  *     * Redistributions of source code must retain the above copyright
12c147eae0SHemant Agrawal  *       notice, this list of conditions and the following disclaimer.
13c147eae0SHemant Agrawal  *     * Redistributions in binary form must reproduce the above copyright
14c147eae0SHemant Agrawal  *       notice, this list of conditions and the following disclaimer in
15c147eae0SHemant Agrawal  *       the documentation and/or other materials provided with the
16c147eae0SHemant Agrawal  *       distribution.
17c147eae0SHemant Agrawal  *     * Neither the name of Freescale Semiconductor, Inc nor the names of its
18c147eae0SHemant Agrawal  *       contributors may be used to endorse or promote products derived
19c147eae0SHemant Agrawal  *       from this software without specific prior written permission.
20c147eae0SHemant Agrawal  *
21c147eae0SHemant Agrawal  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22c147eae0SHemant Agrawal  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23c147eae0SHemant Agrawal  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24c147eae0SHemant Agrawal  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25c147eae0SHemant Agrawal  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26c147eae0SHemant Agrawal  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27c147eae0SHemant Agrawal  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28c147eae0SHemant Agrawal  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29c147eae0SHemant Agrawal  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30c147eae0SHemant Agrawal  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31c147eae0SHemant Agrawal  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32c147eae0SHemant Agrawal  */
33c147eae0SHemant Agrawal 
34c147eae0SHemant Agrawal #include <time.h>
35c147eae0SHemant Agrawal #include <net/if.h>
36c147eae0SHemant Agrawal 
37c147eae0SHemant Agrawal #include <rte_mbuf.h>
38c147eae0SHemant Agrawal #include <rte_ethdev.h>
39c147eae0SHemant Agrawal #include <rte_malloc.h>
40c147eae0SHemant Agrawal #include <rte_memcpy.h>
41c147eae0SHemant Agrawal #include <rte_string_fns.h>
42c147eae0SHemant Agrawal #include <rte_cycles.h>
43c147eae0SHemant Agrawal #include <rte_kvargs.h>
44c147eae0SHemant Agrawal #include <rte_dev.h>
45c147eae0SHemant Agrawal #include <rte_ethdev.h>
46c147eae0SHemant Agrawal #include <rte_fslmc.h>
47c147eae0SHemant Agrawal 
48d401ead1SHemant Agrawal #include <fslmc_logs.h>
49c147eae0SHemant Agrawal #include <fslmc_vfio.h>
503e5a335dSHemant Agrawal #include <dpaa2_hw_pvt.h>
51bee61d86SHemant Agrawal #include <dpaa2_hw_mempool.h>
523e5a335dSHemant Agrawal 
53c147eae0SHemant Agrawal #include "dpaa2_ethdev.h"
54c147eae0SHemant Agrawal 
55c147eae0SHemant Agrawal static struct rte_dpaa2_driver rte_dpaa2_pmd;
56c147eae0SHemant Agrawal 
573e5a335dSHemant Agrawal static void
583e5a335dSHemant Agrawal dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
593e5a335dSHemant Agrawal {
603e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
613e5a335dSHemant Agrawal 
623e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
633e5a335dSHemant Agrawal 
643e5a335dSHemant Agrawal 	dev_info->if_index = priv->hw_id;
653e5a335dSHemant Agrawal 
6633fad432SHemant Agrawal 	dev_info->max_mac_addrs = priv->max_mac_filters;
67bee61d86SHemant Agrawal 	dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
68bee61d86SHemant Agrawal 	dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
693e5a335dSHemant Agrawal 	dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
703e5a335dSHemant Agrawal 	dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
71ef18dafeSHemant Agrawal 	dev_info->rx_offload_capa =
72ef18dafeSHemant Agrawal 		DEV_RX_OFFLOAD_IPV4_CKSUM |
73ef18dafeSHemant Agrawal 		DEV_RX_OFFLOAD_UDP_CKSUM |
74ef18dafeSHemant Agrawal 		DEV_RX_OFFLOAD_TCP_CKSUM |
75ef18dafeSHemant Agrawal 		DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
76ef18dafeSHemant Agrawal 	dev_info->tx_offload_capa =
77ef18dafeSHemant Agrawal 		DEV_TX_OFFLOAD_IPV4_CKSUM |
78ef18dafeSHemant Agrawal 		DEV_TX_OFFLOAD_UDP_CKSUM |
79ef18dafeSHemant Agrawal 		DEV_TX_OFFLOAD_TCP_CKSUM |
80ef18dafeSHemant Agrawal 		DEV_TX_OFFLOAD_SCTP_CKSUM |
81ef18dafeSHemant Agrawal 		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
823e5a335dSHemant Agrawal 	dev_info->speed_capa = ETH_LINK_SPEED_1G |
833e5a335dSHemant Agrawal 			ETH_LINK_SPEED_2_5G |
843e5a335dSHemant Agrawal 			ETH_LINK_SPEED_10G;
853e5a335dSHemant Agrawal }
863e5a335dSHemant Agrawal 
873e5a335dSHemant Agrawal static int
883e5a335dSHemant Agrawal dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
893e5a335dSHemant Agrawal {
903e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
913e5a335dSHemant Agrawal 	uint16_t dist_idx;
923e5a335dSHemant Agrawal 	uint32_t vq_id;
933e5a335dSHemant Agrawal 	struct dpaa2_queue *mc_q, *mcq;
943e5a335dSHemant Agrawal 	uint32_t tot_queues;
953e5a335dSHemant Agrawal 	int i;
963e5a335dSHemant Agrawal 	struct dpaa2_queue *dpaa2_q;
973e5a335dSHemant Agrawal 
983e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
993e5a335dSHemant Agrawal 
1003e5a335dSHemant Agrawal 	tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
1013e5a335dSHemant Agrawal 	mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
1023e5a335dSHemant Agrawal 			  RTE_CACHE_LINE_SIZE);
1033e5a335dSHemant Agrawal 	if (!mc_q) {
1043e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "malloc failed for rx/tx queues\n");
1053e5a335dSHemant Agrawal 		return -1;
1063e5a335dSHemant Agrawal 	}
1073e5a335dSHemant Agrawal 
1083e5a335dSHemant Agrawal 	for (i = 0; i < priv->nb_rx_queues; i++) {
1093e5a335dSHemant Agrawal 		mc_q->dev = dev;
1103e5a335dSHemant Agrawal 		priv->rx_vq[i] = mc_q++;
1113e5a335dSHemant Agrawal 		dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1123e5a335dSHemant Agrawal 		dpaa2_q->q_storage = rte_malloc("dq_storage",
1133e5a335dSHemant Agrawal 					sizeof(struct queue_storage_info_t),
1143e5a335dSHemant Agrawal 					RTE_CACHE_LINE_SIZE);
1153e5a335dSHemant Agrawal 		if (!dpaa2_q->q_storage)
1163e5a335dSHemant Agrawal 			goto fail;
1173e5a335dSHemant Agrawal 
1183e5a335dSHemant Agrawal 		memset(dpaa2_q->q_storage, 0,
1193e5a335dSHemant Agrawal 		       sizeof(struct queue_storage_info_t));
1203e5a335dSHemant Agrawal 		dpaa2_q->q_storage->dq_storage[0] = rte_malloc(NULL,
1213e5a335dSHemant Agrawal 			DPAA2_DQRR_RING_SIZE * sizeof(struct qbman_result),
1223e5a335dSHemant Agrawal 			RTE_CACHE_LINE_SIZE);
1233e5a335dSHemant Agrawal 	}
1243e5a335dSHemant Agrawal 
1253e5a335dSHemant Agrawal 	for (i = 0; i < priv->nb_tx_queues; i++) {
1263e5a335dSHemant Agrawal 		mc_q->dev = dev;
1273e5a335dSHemant Agrawal 		mc_q->flow_id = DPNI_NEW_FLOW_ID;
1283e5a335dSHemant Agrawal 		priv->tx_vq[i] = mc_q++;
1293e5a335dSHemant Agrawal 	}
1303e5a335dSHemant Agrawal 
1313e5a335dSHemant Agrawal 	vq_id = 0;
13289c2ea8fSHemant Agrawal 	for (dist_idx = 0; dist_idx < priv->num_dist_per_tc[DPAA2_DEF_TC];
13389c2ea8fSHemant Agrawal 	     dist_idx++) {
1343e5a335dSHemant Agrawal 		mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
1353e5a335dSHemant Agrawal 		mcq->tc_index = DPAA2_DEF_TC;
1363e5a335dSHemant Agrawal 		mcq->flow_id = dist_idx;
1373e5a335dSHemant Agrawal 		vq_id++;
1383e5a335dSHemant Agrawal 	}
1393e5a335dSHemant Agrawal 
1403e5a335dSHemant Agrawal 	return 0;
1413e5a335dSHemant Agrawal fail:
1423e5a335dSHemant Agrawal 	i -= 1;
1433e5a335dSHemant Agrawal 	mc_q = priv->rx_vq[0];
1443e5a335dSHemant Agrawal 	while (i >= 0) {
1453e5a335dSHemant Agrawal 		dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1463e5a335dSHemant Agrawal 		rte_free(dpaa2_q->q_storage->dq_storage[0]);
1473e5a335dSHemant Agrawal 		rte_free(dpaa2_q->q_storage);
1483e5a335dSHemant Agrawal 		priv->rx_vq[i--] = NULL;
1493e5a335dSHemant Agrawal 	}
1503e5a335dSHemant Agrawal 	rte_free(mc_q);
1513e5a335dSHemant Agrawal 	return -1;
1523e5a335dSHemant Agrawal }
1533e5a335dSHemant Agrawal 
1543e5a335dSHemant Agrawal static int
1553e5a335dSHemant Agrawal dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
1563e5a335dSHemant Agrawal {
1573e5a335dSHemant Agrawal 	struct rte_eth_dev_data *data = dev->data;
1583e5a335dSHemant Agrawal 	struct rte_eth_conf *eth_conf = &data->dev_conf;
15989c2ea8fSHemant Agrawal 	int ret;
1603e5a335dSHemant Agrawal 
1613e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
1623e5a335dSHemant Agrawal 
1633e5a335dSHemant Agrawal 	/* Check for correct configuration */
1643e5a335dSHemant Agrawal 	if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
1653e5a335dSHemant Agrawal 	    data->nb_rx_queues > 1) {
1663e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Distribution is not enabled, "
1673e5a335dSHemant Agrawal 			    "but Rx queues more than 1\n");
1683e5a335dSHemant Agrawal 		return -1;
1693e5a335dSHemant Agrawal 	}
1703e5a335dSHemant Agrawal 
17189c2ea8fSHemant Agrawal 	if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
17289c2ea8fSHemant Agrawal 		/* Return in case number of Rx queues is 1 */
17389c2ea8fSHemant Agrawal 		if (data->nb_rx_queues == 1)
17489c2ea8fSHemant Agrawal 			return 0;
17589c2ea8fSHemant Agrawal 		ret = dpaa2_setup_flow_dist(dev,
17689c2ea8fSHemant Agrawal 				eth_conf->rx_adv_conf.rss_conf.rss_hf);
17789c2ea8fSHemant Agrawal 		if (ret) {
17889c2ea8fSHemant Agrawal 			PMD_INIT_LOG(ERR, "unable to set flow distribution."
17989c2ea8fSHemant Agrawal 				     "please check queue config\n");
18089c2ea8fSHemant Agrawal 			return ret;
18189c2ea8fSHemant Agrawal 		}
18289c2ea8fSHemant Agrawal 	}
1833e5a335dSHemant Agrawal 	return 0;
1843e5a335dSHemant Agrawal }
1853e5a335dSHemant Agrawal 
1863e5a335dSHemant Agrawal /* Function to setup RX flow information. It contains traffic class ID,
1873e5a335dSHemant Agrawal  * flow ID, destination configuration etc.
1883e5a335dSHemant Agrawal  */
1893e5a335dSHemant Agrawal static int
1903e5a335dSHemant Agrawal dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
1913e5a335dSHemant Agrawal 			 uint16_t rx_queue_id,
1923e5a335dSHemant Agrawal 			 uint16_t nb_rx_desc __rte_unused,
1933e5a335dSHemant Agrawal 			 unsigned int socket_id __rte_unused,
1943e5a335dSHemant Agrawal 			 const struct rte_eth_rxconf *rx_conf __rte_unused,
1953e5a335dSHemant Agrawal 			 struct rte_mempool *mb_pool)
1963e5a335dSHemant Agrawal {
1973e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
1983e5a335dSHemant Agrawal 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1993e5a335dSHemant Agrawal 	struct dpaa2_queue *dpaa2_q;
2003e5a335dSHemant Agrawal 	struct dpni_queue cfg;
2013e5a335dSHemant Agrawal 	uint8_t options = 0;
2023e5a335dSHemant Agrawal 	uint8_t flow_id;
203bee61d86SHemant Agrawal 	uint32_t bpid;
2043e5a335dSHemant Agrawal 	int ret;
2053e5a335dSHemant Agrawal 
2063e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
2073e5a335dSHemant Agrawal 
2083e5a335dSHemant Agrawal 	PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
2093e5a335dSHemant Agrawal 		     dev, rx_queue_id, mb_pool, rx_conf);
2103e5a335dSHemant Agrawal 
211bee61d86SHemant Agrawal 	if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
212bee61d86SHemant Agrawal 		bpid = mempool_to_bpid(mb_pool);
213bee61d86SHemant Agrawal 		ret = dpaa2_attach_bp_list(priv,
214bee61d86SHemant Agrawal 					   rte_dpaa2_bpid_info[bpid].bp_list);
215bee61d86SHemant Agrawal 		if (ret)
216bee61d86SHemant Agrawal 			return ret;
217bee61d86SHemant Agrawal 	}
2183e5a335dSHemant Agrawal 	dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
2193e5a335dSHemant Agrawal 	dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
2203e5a335dSHemant Agrawal 
2213e5a335dSHemant Agrawal 	/*Get the tc id and flow id from given VQ id*/
22289c2ea8fSHemant Agrawal 	flow_id = rx_queue_id % priv->num_dist_per_tc[dpaa2_q->tc_index];
2233e5a335dSHemant Agrawal 	memset(&cfg, 0, sizeof(struct dpni_queue));
2243e5a335dSHemant Agrawal 
2253e5a335dSHemant Agrawal 	options = options | DPNI_QUEUE_OPT_USER_CTX;
2263e5a335dSHemant Agrawal 	cfg.user_context = (uint64_t)(dpaa2_q);
2273e5a335dSHemant Agrawal 
2283e5a335dSHemant Agrawal 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
2293e5a335dSHemant Agrawal 			     dpaa2_q->tc_index, flow_id, options, &cfg);
2303e5a335dSHemant Agrawal 	if (ret) {
2313e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Error in setting the rx flow: = %d\n", ret);
2323e5a335dSHemant Agrawal 		return -1;
2333e5a335dSHemant Agrawal 	}
2343e5a335dSHemant Agrawal 
2353e5a335dSHemant Agrawal 	dev->data->rx_queues[rx_queue_id] = dpaa2_q;
2363e5a335dSHemant Agrawal 	return 0;
2373e5a335dSHemant Agrawal }
2383e5a335dSHemant Agrawal 
2393e5a335dSHemant Agrawal static int
2403e5a335dSHemant Agrawal dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
2413e5a335dSHemant Agrawal 			 uint16_t tx_queue_id,
2423e5a335dSHemant Agrawal 			 uint16_t nb_tx_desc __rte_unused,
2433e5a335dSHemant Agrawal 			 unsigned int socket_id __rte_unused,
2443e5a335dSHemant Agrawal 			 const struct rte_eth_txconf *tx_conf __rte_unused)
2453e5a335dSHemant Agrawal {
2463e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
2473e5a335dSHemant Agrawal 	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
2483e5a335dSHemant Agrawal 		priv->tx_vq[tx_queue_id];
2493e5a335dSHemant Agrawal 	struct fsl_mc_io *dpni = priv->hw;
2503e5a335dSHemant Agrawal 	struct dpni_queue tx_conf_cfg;
2513e5a335dSHemant Agrawal 	struct dpni_queue tx_flow_cfg;
2523e5a335dSHemant Agrawal 	uint8_t options = 0, flow_id;
2533e5a335dSHemant Agrawal 	uint32_t tc_id;
2543e5a335dSHemant Agrawal 	int ret;
2553e5a335dSHemant Agrawal 
2563e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
2573e5a335dSHemant Agrawal 
2583e5a335dSHemant Agrawal 	/* Return if queue already configured */
2593e5a335dSHemant Agrawal 	if (dpaa2_q->flow_id != DPNI_NEW_FLOW_ID)
2603e5a335dSHemant Agrawal 		return 0;
2613e5a335dSHemant Agrawal 
2623e5a335dSHemant Agrawal 	memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
2633e5a335dSHemant Agrawal 	memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
2643e5a335dSHemant Agrawal 
265ef18dafeSHemant Agrawal 	if (priv->num_tc == 1) {
2663e5a335dSHemant Agrawal 		tc_id = 0;
267ef18dafeSHemant Agrawal 		flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id];
268ef18dafeSHemant Agrawal 	} else {
269ef18dafeSHemant Agrawal 		tc_id = tx_queue_id;
270ef18dafeSHemant Agrawal 		flow_id = 0;
271ef18dafeSHemant Agrawal 	}
2723e5a335dSHemant Agrawal 
2733e5a335dSHemant Agrawal 	ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
2743e5a335dSHemant Agrawal 			     tc_id, flow_id, options, &tx_flow_cfg);
2753e5a335dSHemant Agrawal 	if (ret) {
2763e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Error in setting the tx flow: "
2773e5a335dSHemant Agrawal 			     "tc_id=%d, flow =%d ErrorCode = %x\n",
2783e5a335dSHemant Agrawal 			     tc_id, flow_id, -ret);
2793e5a335dSHemant Agrawal 			return -1;
2803e5a335dSHemant Agrawal 	}
2813e5a335dSHemant Agrawal 
2823e5a335dSHemant Agrawal 	dpaa2_q->flow_id = flow_id;
2833e5a335dSHemant Agrawal 
2843e5a335dSHemant Agrawal 	if (tx_queue_id == 0) {
2853e5a335dSHemant Agrawal 		/*Set tx-conf and error configuration*/
2863e5a335dSHemant Agrawal 		ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
2873e5a335dSHemant Agrawal 						    priv->token,
2883e5a335dSHemant Agrawal 						    DPNI_CONF_DISABLE);
2893e5a335dSHemant Agrawal 		if (ret) {
2903e5a335dSHemant Agrawal 			PMD_INIT_LOG(ERR, "Error in set tx conf mode settings"
2913e5a335dSHemant Agrawal 				     " ErrorCode = %x", ret);
2923e5a335dSHemant Agrawal 			return -1;
2933e5a335dSHemant Agrawal 		}
2943e5a335dSHemant Agrawal 	}
2953e5a335dSHemant Agrawal 	dpaa2_q->tc_index = tc_id;
2963e5a335dSHemant Agrawal 
2973e5a335dSHemant Agrawal 	dev->data->tx_queues[tx_queue_id] = dpaa2_q;
2983e5a335dSHemant Agrawal 	return 0;
2993e5a335dSHemant Agrawal }
3003e5a335dSHemant Agrawal 
3013e5a335dSHemant Agrawal static void
3023e5a335dSHemant Agrawal dpaa2_dev_rx_queue_release(void *q __rte_unused)
3033e5a335dSHemant Agrawal {
3043e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
3053e5a335dSHemant Agrawal }
3063e5a335dSHemant Agrawal 
3073e5a335dSHemant Agrawal static void
3083e5a335dSHemant Agrawal dpaa2_dev_tx_queue_release(void *q __rte_unused)
3093e5a335dSHemant Agrawal {
3103e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
3113e5a335dSHemant Agrawal }
3123e5a335dSHemant Agrawal 
3133e5a335dSHemant Agrawal static int
3143e5a335dSHemant Agrawal dpaa2_dev_start(struct rte_eth_dev *dev)
3153e5a335dSHemant Agrawal {
3163e5a335dSHemant Agrawal 	struct rte_eth_dev_data *data = dev->data;
3173e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = data->dev_private;
3183e5a335dSHemant Agrawal 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
3193e5a335dSHemant Agrawal 	struct dpni_queue cfg;
320ef18dafeSHemant Agrawal 	struct dpni_error_cfg	err_cfg;
3213e5a335dSHemant Agrawal 	uint16_t qdid;
3223e5a335dSHemant Agrawal 	struct dpni_queue_id qid;
3233e5a335dSHemant Agrawal 	struct dpaa2_queue *dpaa2_q;
3243e5a335dSHemant Agrawal 	int ret, i;
3253e5a335dSHemant Agrawal 
3263e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
3273e5a335dSHemant Agrawal 
3283e5a335dSHemant Agrawal 	ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
3293e5a335dSHemant Agrawal 	if (ret) {
3303e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Failure %d in enabling dpni %d device\n",
3313e5a335dSHemant Agrawal 			     ret, priv->hw_id);
3323e5a335dSHemant Agrawal 		return ret;
3333e5a335dSHemant Agrawal 	}
3343e5a335dSHemant Agrawal 
3353e5a335dSHemant Agrawal 	ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
3363e5a335dSHemant Agrawal 			    DPNI_QUEUE_TX, &qdid);
3373e5a335dSHemant Agrawal 	if (ret) {
3383e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret);
3393e5a335dSHemant Agrawal 		return ret;
3403e5a335dSHemant Agrawal 	}
3413e5a335dSHemant Agrawal 	priv->qdid = qdid;
3423e5a335dSHemant Agrawal 
3433e5a335dSHemant Agrawal 	for (i = 0; i < data->nb_rx_queues; i++) {
3443e5a335dSHemant Agrawal 		dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
3453e5a335dSHemant Agrawal 		ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
3463e5a335dSHemant Agrawal 				     DPNI_QUEUE_RX, dpaa2_q->tc_index,
3473e5a335dSHemant Agrawal 				       dpaa2_q->flow_id, &cfg, &qid);
3483e5a335dSHemant Agrawal 		if (ret) {
3493e5a335dSHemant Agrawal 			PMD_INIT_LOG(ERR, "Error to get flow "
3503e5a335dSHemant Agrawal 				     "information Error code = %d\n", ret);
3513e5a335dSHemant Agrawal 			return ret;
3523e5a335dSHemant Agrawal 		}
3533e5a335dSHemant Agrawal 		dpaa2_q->fqid = qid.fqid;
3543e5a335dSHemant Agrawal 	}
3553e5a335dSHemant Agrawal 
356ef18dafeSHemant Agrawal 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
357ef18dafeSHemant Agrawal 			       DPNI_OFF_RX_L3_CSUM, true);
358ef18dafeSHemant Agrawal 	if (ret) {
359ef18dafeSHemant Agrawal 		PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
360ef18dafeSHemant Agrawal 		return ret;
361ef18dafeSHemant Agrawal 	}
362ef18dafeSHemant Agrawal 
363ef18dafeSHemant Agrawal 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
364ef18dafeSHemant Agrawal 			       DPNI_OFF_RX_L4_CSUM, true);
365ef18dafeSHemant Agrawal 	if (ret) {
366ef18dafeSHemant Agrawal 		PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
367ef18dafeSHemant Agrawal 		return ret;
368ef18dafeSHemant Agrawal 	}
369ef18dafeSHemant Agrawal 
370ef18dafeSHemant Agrawal 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
371ef18dafeSHemant Agrawal 			       DPNI_OFF_TX_L3_CSUM, true);
372ef18dafeSHemant Agrawal 	if (ret) {
373ef18dafeSHemant Agrawal 		PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
374ef18dafeSHemant Agrawal 		return ret;
375ef18dafeSHemant Agrawal 	}
376ef18dafeSHemant Agrawal 
377ef18dafeSHemant Agrawal 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
378ef18dafeSHemant Agrawal 			       DPNI_OFF_TX_L4_CSUM, true);
379ef18dafeSHemant Agrawal 	if (ret) {
380ef18dafeSHemant Agrawal 		PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
381ef18dafeSHemant Agrawal 		return ret;
382ef18dafeSHemant Agrawal 	}
383ef18dafeSHemant Agrawal 
384ef18dafeSHemant Agrawal 	/*checksum errors, send them to normal path and set it in annotation */
385ef18dafeSHemant Agrawal 	err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
386ef18dafeSHemant Agrawal 
387ef18dafeSHemant Agrawal 	err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
388ef18dafeSHemant Agrawal 	err_cfg.set_frame_annotation = true;
389ef18dafeSHemant Agrawal 
390ef18dafeSHemant Agrawal 	ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
391ef18dafeSHemant Agrawal 				       priv->token, &err_cfg);
392ef18dafeSHemant Agrawal 	if (ret) {
393ef18dafeSHemant Agrawal 		PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
394ef18dafeSHemant Agrawal 			     "code = %d\n", ret);
395ef18dafeSHemant Agrawal 		return ret;
396ef18dafeSHemant Agrawal 	}
397ef18dafeSHemant Agrawal 
3983e5a335dSHemant Agrawal 	return 0;
3993e5a335dSHemant Agrawal }
4003e5a335dSHemant Agrawal 
4013e5a335dSHemant Agrawal /**
4023e5a335dSHemant Agrawal  *  This routine disables all traffic on the adapter by issuing a
4033e5a335dSHemant Agrawal  *  global reset on the MAC.
4043e5a335dSHemant Agrawal  */
4053e5a335dSHemant Agrawal static void
4063e5a335dSHemant Agrawal dpaa2_dev_stop(struct rte_eth_dev *dev)
4073e5a335dSHemant Agrawal {
4083e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
4093e5a335dSHemant Agrawal 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
4103e5a335dSHemant Agrawal 	int ret;
4113e5a335dSHemant Agrawal 
4123e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
4133e5a335dSHemant Agrawal 
4143e5a335dSHemant Agrawal 	ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
4153e5a335dSHemant Agrawal 	if (ret) {
4163e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Failure (ret %d) in disabling dpni %d dev\n",
4173e5a335dSHemant Agrawal 			     ret, priv->hw_id);
4183e5a335dSHemant Agrawal 		return;
4193e5a335dSHemant Agrawal 	}
4203e5a335dSHemant Agrawal }
4213e5a335dSHemant Agrawal 
4223e5a335dSHemant Agrawal static void
4233e5a335dSHemant Agrawal dpaa2_dev_close(struct rte_eth_dev *dev)
4243e5a335dSHemant Agrawal {
4253e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
4263e5a335dSHemant Agrawal 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
4273e5a335dSHemant Agrawal 	int ret;
4283e5a335dSHemant Agrawal 
4293e5a335dSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
4303e5a335dSHemant Agrawal 
4313e5a335dSHemant Agrawal 	/* Clean the device first */
4323e5a335dSHemant Agrawal 	ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
4333e5a335dSHemant Agrawal 	if (ret) {
4343e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Failure cleaning dpni device with"
4353e5a335dSHemant Agrawal 			     " error code %d\n", ret);
4363e5a335dSHemant Agrawal 		return;
4373e5a335dSHemant Agrawal 	}
4383e5a335dSHemant Agrawal }
4393e5a335dSHemant Agrawal 
440*c0e5c69aSHemant Agrawal static void
441*c0e5c69aSHemant Agrawal dpaa2_dev_promiscuous_enable(
442*c0e5c69aSHemant Agrawal 		struct rte_eth_dev *dev)
443*c0e5c69aSHemant Agrawal {
444*c0e5c69aSHemant Agrawal 	int ret;
445*c0e5c69aSHemant Agrawal 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
446*c0e5c69aSHemant Agrawal 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
447*c0e5c69aSHemant Agrawal 
448*c0e5c69aSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
449*c0e5c69aSHemant Agrawal 
450*c0e5c69aSHemant Agrawal 	if (dpni == NULL) {
451*c0e5c69aSHemant Agrawal 		RTE_LOG(ERR, PMD, "dpni is NULL");
452*c0e5c69aSHemant Agrawal 		return;
453*c0e5c69aSHemant Agrawal 	}
454*c0e5c69aSHemant Agrawal 
455*c0e5c69aSHemant Agrawal 	ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
456*c0e5c69aSHemant Agrawal 	if (ret < 0)
457*c0e5c69aSHemant Agrawal 		RTE_LOG(ERR, PMD, "Unable to enable promiscuous mode %d", ret);
458*c0e5c69aSHemant Agrawal }
459*c0e5c69aSHemant Agrawal 
460*c0e5c69aSHemant Agrawal static void
461*c0e5c69aSHemant Agrawal dpaa2_dev_promiscuous_disable(
462*c0e5c69aSHemant Agrawal 		struct rte_eth_dev *dev)
463*c0e5c69aSHemant Agrawal {
464*c0e5c69aSHemant Agrawal 	int ret;
465*c0e5c69aSHemant Agrawal 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
466*c0e5c69aSHemant Agrawal 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
467*c0e5c69aSHemant Agrawal 
468*c0e5c69aSHemant Agrawal 	PMD_INIT_FUNC_TRACE();
469*c0e5c69aSHemant Agrawal 
470*c0e5c69aSHemant Agrawal 	if (dpni == NULL) {
471*c0e5c69aSHemant Agrawal 		RTE_LOG(ERR, PMD, "dpni is NULL");
472*c0e5c69aSHemant Agrawal 		return;
473*c0e5c69aSHemant Agrawal 	}
474*c0e5c69aSHemant Agrawal 
475*c0e5c69aSHemant Agrawal 	ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
476*c0e5c69aSHemant Agrawal 	if (ret < 0)
477*c0e5c69aSHemant Agrawal 		RTE_LOG(ERR, PMD, "Unable to disable promiscuous mode %d", ret);
478*c0e5c69aSHemant Agrawal }
4793e5a335dSHemant Agrawal static struct eth_dev_ops dpaa2_ethdev_ops = {
4803e5a335dSHemant Agrawal 	.dev_configure	  = dpaa2_eth_dev_configure,
4813e5a335dSHemant Agrawal 	.dev_start	      = dpaa2_dev_start,
4823e5a335dSHemant Agrawal 	.dev_stop	      = dpaa2_dev_stop,
4833e5a335dSHemant Agrawal 	.dev_close	      = dpaa2_dev_close,
484*c0e5c69aSHemant Agrawal 	.promiscuous_enable   = dpaa2_dev_promiscuous_enable,
485*c0e5c69aSHemant Agrawal 	.promiscuous_disable  = dpaa2_dev_promiscuous_disable,
4863e5a335dSHemant Agrawal 	.dev_infos_get	   = dpaa2_dev_info_get,
4873e5a335dSHemant Agrawal 	.rx_queue_setup    = dpaa2_dev_rx_queue_setup,
4883e5a335dSHemant Agrawal 	.rx_queue_release  = dpaa2_dev_rx_queue_release,
4893e5a335dSHemant Agrawal 	.tx_queue_setup    = dpaa2_dev_tx_queue_setup,
4903e5a335dSHemant Agrawal 	.tx_queue_release  = dpaa2_dev_tx_queue_release,
4913e5a335dSHemant Agrawal };
4923e5a335dSHemant Agrawal 
493c147eae0SHemant Agrawal static int
494c147eae0SHemant Agrawal dpaa2_dev_init(struct rte_eth_dev *eth_dev)
495c147eae0SHemant Agrawal {
4963e5a335dSHemant Agrawal 	struct rte_device *dev = eth_dev->device;
4973e5a335dSHemant Agrawal 	struct rte_dpaa2_device *dpaa2_dev;
4983e5a335dSHemant Agrawal 	struct fsl_mc_io *dpni_dev;
4993e5a335dSHemant Agrawal 	struct dpni_attr attr;
5003e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
501bee61d86SHemant Agrawal 	struct dpni_buffer_layout layout;
50289c2ea8fSHemant Agrawal 	int i, ret, hw_id;
503bee61d86SHemant Agrawal 	int tot_size;
5043e5a335dSHemant Agrawal 
505d401ead1SHemant Agrawal 	PMD_INIT_FUNC_TRACE();
506d401ead1SHemant Agrawal 
507c147eae0SHemant Agrawal 	/* For secondary processes, the primary has done all the work */
508c147eae0SHemant Agrawal 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
509c147eae0SHemant Agrawal 		return 0;
510c147eae0SHemant Agrawal 
5113e5a335dSHemant Agrawal 	dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
5123e5a335dSHemant Agrawal 
5133e5a335dSHemant Agrawal 	hw_id = dpaa2_dev->object_id;
5143e5a335dSHemant Agrawal 
5153e5a335dSHemant Agrawal 	dpni_dev = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
5163e5a335dSHemant Agrawal 	if (!dpni_dev) {
5173e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "malloc failed for dpni device\n");
5183e5a335dSHemant Agrawal 		return -1;
5193e5a335dSHemant Agrawal 	}
5203e5a335dSHemant Agrawal 
5213e5a335dSHemant Agrawal 	dpni_dev->regs = rte_mcp_ptr_list[0];
5223e5a335dSHemant Agrawal 	ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
5233e5a335dSHemant Agrawal 	if (ret) {
5243e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Failure in opening dpni@%d device with"
5253e5a335dSHemant Agrawal 			" error code %d\n", hw_id, ret);
5263e5a335dSHemant Agrawal 		return -1;
5273e5a335dSHemant Agrawal 	}
5283e5a335dSHemant Agrawal 
5293e5a335dSHemant Agrawal 	/* Clean the device first */
5303e5a335dSHemant Agrawal 	ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
5313e5a335dSHemant Agrawal 	if (ret) {
5323e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Failure cleaning dpni@%d device with"
5333e5a335dSHemant Agrawal 			" error code %d\n", hw_id, ret);
5343e5a335dSHemant Agrawal 		return -1;
5353e5a335dSHemant Agrawal 	}
5363e5a335dSHemant Agrawal 
5373e5a335dSHemant Agrawal 	ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
5383e5a335dSHemant Agrawal 	if (ret) {
5393e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Failure in getting dpni@%d attribute, "
5403e5a335dSHemant Agrawal 			" error code %d\n", hw_id, ret);
5413e5a335dSHemant Agrawal 		return -1;
5423e5a335dSHemant Agrawal 	}
5433e5a335dSHemant Agrawal 
5443e5a335dSHemant Agrawal 	priv->num_tc = attr.num_tcs;
54589c2ea8fSHemant Agrawal 	for (i = 0; i < attr.num_tcs; i++) {
54689c2ea8fSHemant Agrawal 		priv->num_dist_per_tc[i] = attr.num_queues;
54789c2ea8fSHemant Agrawal 		break;
54889c2ea8fSHemant Agrawal 	}
54989c2ea8fSHemant Agrawal 
55089c2ea8fSHemant Agrawal 	/* Distribution is per Tc only,
55189c2ea8fSHemant Agrawal 	 * so choosing RX queues from default TC only
55289c2ea8fSHemant Agrawal 	 */
55389c2ea8fSHemant Agrawal 	priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC];
55489c2ea8fSHemant Agrawal 
555ef18dafeSHemant Agrawal 	if (attr.num_tcs == 1)
5563e5a335dSHemant Agrawal 		priv->nb_tx_queues = attr.num_queues;
557ef18dafeSHemant Agrawal 	else
558ef18dafeSHemant Agrawal 		priv->nb_tx_queues = attr.num_tcs;
559ef18dafeSHemant Agrawal 
560ef18dafeSHemant Agrawal 	PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc);
561ef18dafeSHemant Agrawal 	PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
5623e5a335dSHemant Agrawal 
5633e5a335dSHemant Agrawal 	priv->hw = dpni_dev;
5643e5a335dSHemant Agrawal 	priv->hw_id = hw_id;
56533fad432SHemant Agrawal 	priv->options = attr.options;
56633fad432SHemant Agrawal 	priv->max_mac_filters = attr.mac_filter_entries;
56733fad432SHemant Agrawal 	priv->max_vlan_filters = attr.vlan_filter_entries;
5683e5a335dSHemant Agrawal 	priv->flags = 0;
5693e5a335dSHemant Agrawal 
5703e5a335dSHemant Agrawal 	/* Allocate memory for hardware structure for queues */
5713e5a335dSHemant Agrawal 	ret = dpaa2_alloc_rx_tx_queues(eth_dev);
5723e5a335dSHemant Agrawal 	if (ret) {
5733e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n");
5743e5a335dSHemant Agrawal 		return -ret;
5753e5a335dSHemant Agrawal 	}
5763e5a335dSHemant Agrawal 
57733fad432SHemant Agrawal 	/* Allocate memory for storing MAC addresses */
57833fad432SHemant Agrawal 	eth_dev->data->mac_addrs = rte_zmalloc("dpni",
57933fad432SHemant Agrawal 		ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
58033fad432SHemant Agrawal 	if (eth_dev->data->mac_addrs == NULL) {
58133fad432SHemant Agrawal 		PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
58233fad432SHemant Agrawal 						"store MAC addresses",
58333fad432SHemant Agrawal 				ETHER_ADDR_LEN * attr.mac_filter_entries);
58433fad432SHemant Agrawal 		return -ENOMEM;
58533fad432SHemant Agrawal 	}
58633fad432SHemant Agrawal 
58733fad432SHemant Agrawal 	ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
58833fad432SHemant Agrawal 					priv->token,
58933fad432SHemant Agrawal 			(uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
59033fad432SHemant Agrawal 	if (ret) {
59133fad432SHemant Agrawal 		PMD_INIT_LOG(ERR, "DPNI get mac address failed:"
59233fad432SHemant Agrawal 					" Error Code = %d\n", ret);
59333fad432SHemant Agrawal 		return -ret;
59433fad432SHemant Agrawal 	}
59533fad432SHemant Agrawal 
596bee61d86SHemant Agrawal 	/* ... rx buffer layout ... */
597bee61d86SHemant Agrawal 	tot_size = DPAA2_HW_BUF_RESERVE + RTE_PKTMBUF_HEADROOM;
598bee61d86SHemant Agrawal 	tot_size = RTE_ALIGN_CEIL(tot_size,
599bee61d86SHemant Agrawal 				  DPAA2_PACKET_LAYOUT_ALIGN);
600bee61d86SHemant Agrawal 
601bee61d86SHemant Agrawal 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
602bee61d86SHemant Agrawal 	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
603bee61d86SHemant Agrawal 				DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
604bee61d86SHemant Agrawal 				DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM |
605bee61d86SHemant Agrawal 				DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
606bee61d86SHemant Agrawal 
607bee61d86SHemant Agrawal 	layout.pass_frame_status = 1;
608bee61d86SHemant Agrawal 	layout.data_head_room = tot_size
609bee61d86SHemant Agrawal 		- DPAA2_FD_PTA_SIZE - DPAA2_MBUF_HW_ANNOTATION;
610bee61d86SHemant Agrawal 	layout.private_data_size = DPAA2_FD_PTA_SIZE;
611bee61d86SHemant Agrawal 	layout.pass_parser_result = 1;
612bee61d86SHemant Agrawal 	PMD_INIT_LOG(DEBUG, "Tot_size = %d, head room = %d, private = %d",
613bee61d86SHemant Agrawal 		     tot_size, layout.data_head_room, layout.private_data_size);
614bee61d86SHemant Agrawal 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
615bee61d86SHemant Agrawal 				     DPNI_QUEUE_RX, &layout);
616bee61d86SHemant Agrawal 	if (ret) {
617bee61d86SHemant Agrawal 		PMD_INIT_LOG(ERR, "Err(%d) in setting rx buffer layout", ret);
618bee61d86SHemant Agrawal 		return -1;
619bee61d86SHemant Agrawal 	}
620bee61d86SHemant Agrawal 
621bee61d86SHemant Agrawal 	/* ... tx buffer layout ... */
622bee61d86SHemant Agrawal 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
623bee61d86SHemant Agrawal 	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
624bee61d86SHemant Agrawal 	layout.pass_frame_status = 1;
625bee61d86SHemant Agrawal 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
626bee61d86SHemant Agrawal 				     DPNI_QUEUE_TX, &layout);
627bee61d86SHemant Agrawal 	if (ret) {
628bee61d86SHemant Agrawal 		PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer"
629bee61d86SHemant Agrawal 				  " layout", ret);
630bee61d86SHemant Agrawal 		return -1;
631bee61d86SHemant Agrawal 	}
632bee61d86SHemant Agrawal 
633bee61d86SHemant Agrawal 	/* ... tx-conf and error buffer layout ... */
634bee61d86SHemant Agrawal 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
635bee61d86SHemant Agrawal 	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
636bee61d86SHemant Agrawal 	layout.pass_frame_status = 1;
637bee61d86SHemant Agrawal 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
638bee61d86SHemant Agrawal 				     DPNI_QUEUE_TX_CONFIRM, &layout);
639bee61d86SHemant Agrawal 	if (ret) {
640bee61d86SHemant Agrawal 		PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer"
641bee61d86SHemant Agrawal 				  " layout", ret);
642bee61d86SHemant Agrawal 		return -1;
643bee61d86SHemant Agrawal 	}
644bee61d86SHemant Agrawal 
6453e5a335dSHemant Agrawal 	eth_dev->dev_ops = &dpaa2_ethdev_ops;
646c147eae0SHemant Agrawal 	eth_dev->data->drv_name = rte_dpaa2_pmd.driver.name;
647c147eae0SHemant Agrawal 
648c147eae0SHemant Agrawal 	return 0;
649c147eae0SHemant Agrawal }
650c147eae0SHemant Agrawal 
651c147eae0SHemant Agrawal static int
6523e5a335dSHemant Agrawal dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
653c147eae0SHemant Agrawal {
6543e5a335dSHemant Agrawal 	struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
6553e5a335dSHemant Agrawal 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
6563e5a335dSHemant Agrawal 	int i, ret;
6573e5a335dSHemant Agrawal 	struct dpaa2_queue *dpaa2_q;
6583e5a335dSHemant Agrawal 
659d401ead1SHemant Agrawal 	PMD_INIT_FUNC_TRACE();
660d401ead1SHemant Agrawal 
661c147eae0SHemant Agrawal 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
662c147eae0SHemant Agrawal 		return -EPERM;
663c147eae0SHemant Agrawal 
6643e5a335dSHemant Agrawal 	if (!dpni) {
6653e5a335dSHemant Agrawal 		PMD_INIT_LOG(WARNING, "Already closed or not started");
6663e5a335dSHemant Agrawal 		return -1;
6673e5a335dSHemant Agrawal 	}
6683e5a335dSHemant Agrawal 
6693e5a335dSHemant Agrawal 	dpaa2_dev_close(eth_dev);
6703e5a335dSHemant Agrawal 
6713e5a335dSHemant Agrawal 	if (priv->rx_vq[0]) {
6723e5a335dSHemant Agrawal 		/* cleaning up queue storage */
6733e5a335dSHemant Agrawal 		for (i = 0; i < priv->nb_rx_queues; i++) {
6743e5a335dSHemant Agrawal 			dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
6753e5a335dSHemant Agrawal 			if (dpaa2_q->q_storage)
6763e5a335dSHemant Agrawal 				rte_free(dpaa2_q->q_storage);
6773e5a335dSHemant Agrawal 		}
6783e5a335dSHemant Agrawal 		/*free the all queue memory */
6793e5a335dSHemant Agrawal 		rte_free(priv->rx_vq[0]);
6803e5a335dSHemant Agrawal 		priv->rx_vq[0] = NULL;
6813e5a335dSHemant Agrawal 	}
6823e5a335dSHemant Agrawal 
68333fad432SHemant Agrawal 	/* Allocate memory for storing MAC addresses */
68433fad432SHemant Agrawal 	if (eth_dev->data->mac_addrs) {
68533fad432SHemant Agrawal 		rte_free(eth_dev->data->mac_addrs);
68633fad432SHemant Agrawal 		eth_dev->data->mac_addrs = NULL;
68733fad432SHemant Agrawal 	}
6883e5a335dSHemant Agrawal 
6893e5a335dSHemant Agrawal 	/*Close the device at underlying layer*/
6903e5a335dSHemant Agrawal 	ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
6913e5a335dSHemant Agrawal 	if (ret) {
6923e5a335dSHemant Agrawal 		PMD_INIT_LOG(ERR, "Failure closing dpni device with"
6933e5a335dSHemant Agrawal 			" error code %d\n", ret);
6943e5a335dSHemant Agrawal 	}
6953e5a335dSHemant Agrawal 
6963e5a335dSHemant Agrawal 	/*Free the allocated memory for ethernet private data and dpni*/
6973e5a335dSHemant Agrawal 	priv->hw = NULL;
6983e5a335dSHemant Agrawal 	free(dpni);
6993e5a335dSHemant Agrawal 
7003e5a335dSHemant Agrawal 	eth_dev->dev_ops = NULL;
7013e5a335dSHemant Agrawal 
702c147eae0SHemant Agrawal 	return 0;
703c147eae0SHemant Agrawal }
704c147eae0SHemant Agrawal 
705c147eae0SHemant Agrawal static int
706c147eae0SHemant Agrawal rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused,
707c147eae0SHemant Agrawal 		struct rte_dpaa2_device *dpaa2_dev)
708c147eae0SHemant Agrawal {
709c147eae0SHemant Agrawal 	struct rte_eth_dev *eth_dev;
710c147eae0SHemant Agrawal 	char ethdev_name[RTE_ETH_NAME_MAX_LEN];
711c147eae0SHemant Agrawal 
712c147eae0SHemant Agrawal 	int diag;
713c147eae0SHemant Agrawal 
714c147eae0SHemant Agrawal 	sprintf(ethdev_name, "dpni-%d", dpaa2_dev->object_id);
715c147eae0SHemant Agrawal 
716c147eae0SHemant Agrawal 	eth_dev = rte_eth_dev_allocate(ethdev_name);
717c147eae0SHemant Agrawal 	if (eth_dev == NULL)
718c147eae0SHemant Agrawal 		return -ENOMEM;
719c147eae0SHemant Agrawal 
720c147eae0SHemant Agrawal 	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
721c147eae0SHemant Agrawal 		eth_dev->data->dev_private = rte_zmalloc(
722c147eae0SHemant Agrawal 						"ethdev private structure",
723c147eae0SHemant Agrawal 						sizeof(struct dpaa2_dev_priv),
724c147eae0SHemant Agrawal 						RTE_CACHE_LINE_SIZE);
725c147eae0SHemant Agrawal 		if (eth_dev->data->dev_private == NULL) {
726d401ead1SHemant Agrawal 			PMD_INIT_LOG(CRIT, "Cannot allocate memzone for"
727c147eae0SHemant Agrawal 				     " private port data\n");
728c147eae0SHemant Agrawal 			rte_eth_dev_release_port(eth_dev);
729c147eae0SHemant Agrawal 			return -ENOMEM;
730c147eae0SHemant Agrawal 		}
731c147eae0SHemant Agrawal 	}
732c147eae0SHemant Agrawal 	eth_dev->device = &dpaa2_dev->device;
733c147eae0SHemant Agrawal 	dpaa2_dev->eth_dev = eth_dev;
734c147eae0SHemant Agrawal 	eth_dev->data->rx_mbuf_alloc_failed = 0;
735c147eae0SHemant Agrawal 
736c147eae0SHemant Agrawal 	/* Invoke PMD device initialization function */
737c147eae0SHemant Agrawal 	diag = dpaa2_dev_init(eth_dev);
738c147eae0SHemant Agrawal 	if (diag == 0)
739c147eae0SHemant Agrawal 		return 0;
740c147eae0SHemant Agrawal 
741c147eae0SHemant Agrawal 	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
742c147eae0SHemant Agrawal 		rte_free(eth_dev->data->dev_private);
743c147eae0SHemant Agrawal 	rte_eth_dev_release_port(eth_dev);
744c147eae0SHemant Agrawal 	return diag;
745c147eae0SHemant Agrawal }
746c147eae0SHemant Agrawal 
747c147eae0SHemant Agrawal static int
748c147eae0SHemant Agrawal rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
749c147eae0SHemant Agrawal {
750c147eae0SHemant Agrawal 	struct rte_eth_dev *eth_dev;
751c147eae0SHemant Agrawal 
752c147eae0SHemant Agrawal 	eth_dev = dpaa2_dev->eth_dev;
753c147eae0SHemant Agrawal 	dpaa2_dev_uninit(eth_dev);
754c147eae0SHemant Agrawal 
755c147eae0SHemant Agrawal 	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
756c147eae0SHemant Agrawal 		rte_free(eth_dev->data->dev_private);
757c147eae0SHemant Agrawal 	rte_eth_dev_release_port(eth_dev);
758c147eae0SHemant Agrawal 
759c147eae0SHemant Agrawal 	return 0;
760c147eae0SHemant Agrawal }
761c147eae0SHemant Agrawal 
762c147eae0SHemant Agrawal static struct rte_dpaa2_driver rte_dpaa2_pmd = {
763c147eae0SHemant Agrawal 	.drv_type = DPAA2_MC_DPNI_DEVID,
764c147eae0SHemant Agrawal 	.probe = rte_dpaa2_probe,
765c147eae0SHemant Agrawal 	.remove = rte_dpaa2_remove,
766c147eae0SHemant Agrawal };
767c147eae0SHemant Agrawal 
768c147eae0SHemant Agrawal RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
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