1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 4 * Copyright 2017 NXP 5 * 6 */ 7 8 /* System headers */ 9 #include <inttypes.h> 10 #include <unistd.h> 11 #include <stdio.h> 12 #include <limits.h> 13 #include <sched.h> 14 #include <pthread.h> 15 16 #include <rte_byteorder.h> 17 #include <rte_common.h> 18 #include <rte_interrupts.h> 19 #include <rte_log.h> 20 #include <rte_debug.h> 21 #include <rte_pci.h> 22 #include <rte_atomic.h> 23 #include <rte_branch_prediction.h> 24 #include <rte_memory.h> 25 #include <rte_tailq.h> 26 #include <rte_eal.h> 27 #include <rte_alarm.h> 28 #include <rte_ether.h> 29 #include <rte_ethdev_driver.h> 30 #include <rte_malloc.h> 31 #include <rte_ring.h> 32 #include <rte_ip.h> 33 #include <rte_tcp.h> 34 #include <rte_udp.h> 35 #include <rte_net.h> 36 #include <rte_eventdev.h> 37 38 #include "dpaa_ethdev.h" 39 #include "dpaa_rxtx.h" 40 #include <rte_dpaa_bus.h> 41 #include <dpaa_mempool.h> 42 43 #include <qman.h> 44 #include <fsl_usd.h> 45 #include <fsl_qman.h> 46 #include <fsl_bman.h> 47 #include <of.h> 48 #include <netcfg.h> 49 50 #define DPAA_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid) \ 51 do { \ 52 (_fd)->cmd = 0; \ 53 (_fd)->opaque_addr = 0; \ 54 (_fd)->opaque = QM_FD_CONTIG << DPAA_FD_FORMAT_SHIFT; \ 55 (_fd)->opaque |= ((_mbuf)->data_off) << DPAA_FD_OFFSET_SHIFT; \ 56 (_fd)->opaque |= (_mbuf)->pkt_len; \ 57 (_fd)->addr = (_mbuf)->buf_iova; \ 58 (_fd)->bpid = _bpid; \ 59 } while (0) 60 61 #if (defined RTE_LIBRTE_DPAA_DEBUG_DRIVER) 62 static void dpaa_display_frame(const struct qm_fd *fd) 63 { 64 int ii; 65 char *ptr; 66 67 printf("%s::bpid %x addr %08x%08x, format %d off %d, len %d stat %x\n", 68 __func__, fd->bpid, fd->addr_hi, fd->addr_lo, fd->format, 69 fd->offset, fd->length20, fd->status); 70 71 ptr = (char *)rte_dpaa_mem_ptov(fd->addr); 72 ptr += fd->offset; 73 printf("%02x ", *ptr); 74 for (ii = 1; ii < fd->length20; ii++) { 75 printf("%02x ", *ptr); 76 if ((ii % 16) == 0) 77 printf("\n"); 78 ptr++; 79 } 80 printf("\n"); 81 } 82 #else 83 #define dpaa_display_frame(a) 84 #endif 85 86 static inline void dpaa_slow_parsing(struct rte_mbuf *m __rte_unused, 87 uint64_t prs __rte_unused) 88 { 89 DPAA_DP_LOG(DEBUG, "Slow parsing"); 90 /*TBD:XXX: to be implemented*/ 91 } 92 93 static inline void dpaa_eth_packet_info(struct rte_mbuf *m, void *fd_virt_addr) 94 { 95 struct annotations_t *annot = GET_ANNOTATIONS(fd_virt_addr); 96 uint64_t prs = *((uintptr_t *)(&annot->parse)) & DPAA_PARSE_MASK; 97 98 DPAA_DP_LOG(DEBUG, " Parsing mbuf: %p with annotations: %p", m, annot); 99 100 switch (prs) { 101 case DPAA_PKT_TYPE_IPV4: 102 m->packet_type = RTE_PTYPE_L2_ETHER | 103 RTE_PTYPE_L3_IPV4; 104 break; 105 case DPAA_PKT_TYPE_IPV6: 106 m->packet_type = RTE_PTYPE_L2_ETHER | 107 RTE_PTYPE_L3_IPV6; 108 break; 109 case DPAA_PKT_TYPE_ETHER: 110 m->packet_type = RTE_PTYPE_L2_ETHER; 111 break; 112 case DPAA_PKT_TYPE_IPV4_FRAG: 113 case DPAA_PKT_TYPE_IPV4_FRAG_UDP: 114 case DPAA_PKT_TYPE_IPV4_FRAG_TCP: 115 case DPAA_PKT_TYPE_IPV4_FRAG_SCTP: 116 m->packet_type = RTE_PTYPE_L2_ETHER | 117 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_FRAG; 118 break; 119 case DPAA_PKT_TYPE_IPV6_FRAG: 120 case DPAA_PKT_TYPE_IPV6_FRAG_UDP: 121 case DPAA_PKT_TYPE_IPV6_FRAG_TCP: 122 case DPAA_PKT_TYPE_IPV6_FRAG_SCTP: 123 m->packet_type = RTE_PTYPE_L2_ETHER | 124 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_FRAG; 125 break; 126 case DPAA_PKT_TYPE_IPV4_EXT: 127 m->packet_type = RTE_PTYPE_L2_ETHER | 128 RTE_PTYPE_L3_IPV4_EXT; 129 break; 130 case DPAA_PKT_TYPE_IPV6_EXT: 131 m->packet_type = RTE_PTYPE_L2_ETHER | 132 RTE_PTYPE_L3_IPV6_EXT; 133 break; 134 case DPAA_PKT_TYPE_IPV4_TCP: 135 m->packet_type = RTE_PTYPE_L2_ETHER | 136 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_TCP; 137 break; 138 case DPAA_PKT_TYPE_IPV6_TCP: 139 m->packet_type = RTE_PTYPE_L2_ETHER | 140 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_TCP; 141 break; 142 case DPAA_PKT_TYPE_IPV4_UDP: 143 m->packet_type = RTE_PTYPE_L2_ETHER | 144 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_UDP; 145 break; 146 case DPAA_PKT_TYPE_IPV6_UDP: 147 m->packet_type = RTE_PTYPE_L2_ETHER | 148 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_UDP; 149 break; 150 case DPAA_PKT_TYPE_IPV4_EXT_UDP: 151 m->packet_type = RTE_PTYPE_L2_ETHER | 152 RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_UDP; 153 break; 154 case DPAA_PKT_TYPE_IPV6_EXT_UDP: 155 m->packet_type = RTE_PTYPE_L2_ETHER | 156 RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_UDP; 157 break; 158 case DPAA_PKT_TYPE_IPV4_EXT_TCP: 159 m->packet_type = RTE_PTYPE_L2_ETHER | 160 RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_TCP; 161 break; 162 case DPAA_PKT_TYPE_IPV6_EXT_TCP: 163 m->packet_type = RTE_PTYPE_L2_ETHER | 164 RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_TCP; 165 break; 166 case DPAA_PKT_TYPE_IPV4_SCTP: 167 m->packet_type = RTE_PTYPE_L2_ETHER | 168 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_SCTP; 169 break; 170 case DPAA_PKT_TYPE_IPV6_SCTP: 171 m->packet_type = RTE_PTYPE_L2_ETHER | 172 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_SCTP; 173 break; 174 case DPAA_PKT_TYPE_NONE: 175 m->packet_type = 0; 176 break; 177 /* More switch cases can be added */ 178 default: 179 dpaa_slow_parsing(m, prs); 180 } 181 182 m->tx_offload = annot->parse.ip_off[0]; 183 m->tx_offload |= (annot->parse.l4_off - annot->parse.ip_off[0]) 184 << DPAA_PKT_L3_LEN_SHIFT; 185 186 /* Set the hash values */ 187 m->hash.rss = (uint32_t)(annot->hash); 188 /* All packets with Bad checksum are dropped by interface (and 189 * corresponding notification issued to RX error queues). 190 */ 191 m->ol_flags = PKT_RX_RSS_HASH | PKT_RX_IP_CKSUM_GOOD; 192 193 /* Check if Vlan is present */ 194 if (prs & DPAA_PARSE_VLAN_MASK) 195 m->ol_flags |= PKT_RX_VLAN; 196 /* Packet received without stripping the vlan */ 197 } 198 199 static inline void dpaa_checksum(struct rte_mbuf *mbuf) 200 { 201 struct ether_hdr *eth_hdr = rte_pktmbuf_mtod(mbuf, struct ether_hdr *); 202 char *l3_hdr = (char *)eth_hdr + mbuf->l2_len; 203 struct ipv4_hdr *ipv4_hdr = (struct ipv4_hdr *)l3_hdr; 204 struct ipv6_hdr *ipv6_hdr = (struct ipv6_hdr *)l3_hdr; 205 206 DPAA_DP_LOG(DEBUG, "Calculating checksum for mbuf: %p", mbuf); 207 208 if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) || 209 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 210 RTE_PTYPE_L3_IPV4_EXT)) { 211 ipv4_hdr = (struct ipv4_hdr *)l3_hdr; 212 ipv4_hdr->hdr_checksum = 0; 213 ipv4_hdr->hdr_checksum = rte_ipv4_cksum(ipv4_hdr); 214 } else if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 215 RTE_PTYPE_L3_IPV6) || 216 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 217 RTE_PTYPE_L3_IPV6_EXT)) 218 ipv6_hdr = (struct ipv6_hdr *)l3_hdr; 219 220 if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP) { 221 struct tcp_hdr *tcp_hdr = (struct tcp_hdr *)(l3_hdr + 222 mbuf->l3_len); 223 tcp_hdr->cksum = 0; 224 if (eth_hdr->ether_type == htons(ETHER_TYPE_IPv4)) 225 tcp_hdr->cksum = rte_ipv4_udptcp_cksum(ipv4_hdr, 226 tcp_hdr); 227 else /* assume ethertype == ETHER_TYPE_IPv6 */ 228 tcp_hdr->cksum = rte_ipv6_udptcp_cksum(ipv6_hdr, 229 tcp_hdr); 230 } else if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == 231 RTE_PTYPE_L4_UDP) { 232 struct udp_hdr *udp_hdr = (struct udp_hdr *)(l3_hdr + 233 mbuf->l3_len); 234 udp_hdr->dgram_cksum = 0; 235 if (eth_hdr->ether_type == htons(ETHER_TYPE_IPv4)) 236 udp_hdr->dgram_cksum = rte_ipv4_udptcp_cksum(ipv4_hdr, 237 udp_hdr); 238 else /* assume ethertype == ETHER_TYPE_IPv6 */ 239 udp_hdr->dgram_cksum = rte_ipv6_udptcp_cksum(ipv6_hdr, 240 udp_hdr); 241 } 242 } 243 244 static inline void dpaa_checksum_offload(struct rte_mbuf *mbuf, 245 struct qm_fd *fd, char *prs_buf) 246 { 247 struct dpaa_eth_parse_results_t *prs; 248 249 DPAA_DP_LOG(DEBUG, " Offloading checksum for mbuf: %p", mbuf); 250 251 prs = GET_TX_PRS(prs_buf); 252 prs->l3r = 0; 253 prs->l4r = 0; 254 if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) || 255 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 256 RTE_PTYPE_L3_IPV4_EXT)) 257 prs->l3r = DPAA_L3_PARSE_RESULT_IPV4; 258 else if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 259 RTE_PTYPE_L3_IPV6) || 260 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 261 RTE_PTYPE_L3_IPV6_EXT)) 262 prs->l3r = DPAA_L3_PARSE_RESULT_IPV6; 263 264 if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP) 265 prs->l4r = DPAA_L4_PARSE_RESULT_TCP; 266 else if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_UDP) 267 prs->l4r = DPAA_L4_PARSE_RESULT_UDP; 268 269 prs->ip_off[0] = mbuf->l2_len; 270 prs->l4_off = mbuf->l3_len + mbuf->l2_len; 271 /* Enable L3 (and L4, if TCP or UDP) HW checksum*/ 272 fd->cmd = DPAA_FD_CMD_RPD | DPAA_FD_CMD_DTC; 273 } 274 275 static inline void 276 dpaa_unsegmented_checksum(struct rte_mbuf *mbuf, struct qm_fd *fd_arr) 277 { 278 if (!mbuf->packet_type) { 279 struct rte_net_hdr_lens hdr_lens; 280 281 mbuf->packet_type = rte_net_get_ptype(mbuf, &hdr_lens, 282 RTE_PTYPE_L2_MASK | RTE_PTYPE_L3_MASK 283 | RTE_PTYPE_L4_MASK); 284 mbuf->l2_len = hdr_lens.l2_len; 285 mbuf->l3_len = hdr_lens.l3_len; 286 } 287 if (mbuf->data_off < (DEFAULT_TX_ICEOF + 288 sizeof(struct dpaa_eth_parse_results_t))) { 289 DPAA_DP_LOG(DEBUG, "Checksum offload Err: " 290 "Not enough Headroom " 291 "space for correct Checksum offload." 292 "So Calculating checksum in Software."); 293 dpaa_checksum(mbuf); 294 } else { 295 dpaa_checksum_offload(mbuf, fd_arr, mbuf->buf_addr); 296 } 297 } 298 299 struct rte_mbuf * 300 dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid) 301 { 302 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(fd->bpid); 303 struct rte_mbuf *first_seg, *prev_seg, *cur_seg, *temp; 304 struct qm_sg_entry *sgt, *sg_temp; 305 void *vaddr, *sg_vaddr; 306 int i = 0; 307 uint8_t fd_offset = fd->offset; 308 309 DPAA_DP_LOG(DEBUG, "Received an SG frame"); 310 311 vaddr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); 312 if (!vaddr) { 313 DPAA_PMD_ERR("unable to convert physical address"); 314 return NULL; 315 } 316 sgt = vaddr + fd_offset; 317 sg_temp = &sgt[i++]; 318 hw_sg_to_cpu(sg_temp); 319 temp = (struct rte_mbuf *)((char *)vaddr - bp_info->meta_data_size); 320 sg_vaddr = DPAA_MEMPOOL_PTOV(bp_info, qm_sg_entry_get64(sg_temp)); 321 322 first_seg = (struct rte_mbuf *)((char *)sg_vaddr - 323 bp_info->meta_data_size); 324 first_seg->data_off = sg_temp->offset; 325 first_seg->data_len = sg_temp->length; 326 first_seg->pkt_len = sg_temp->length; 327 rte_mbuf_refcnt_set(first_seg, 1); 328 329 first_seg->port = ifid; 330 first_seg->nb_segs = 1; 331 first_seg->ol_flags = 0; 332 prev_seg = first_seg; 333 while (i < DPAA_SGT_MAX_ENTRIES) { 334 sg_temp = &sgt[i++]; 335 hw_sg_to_cpu(sg_temp); 336 sg_vaddr = DPAA_MEMPOOL_PTOV(bp_info, 337 qm_sg_entry_get64(sg_temp)); 338 cur_seg = (struct rte_mbuf *)((char *)sg_vaddr - 339 bp_info->meta_data_size); 340 cur_seg->data_off = sg_temp->offset; 341 cur_seg->data_len = sg_temp->length; 342 first_seg->pkt_len += sg_temp->length; 343 first_seg->nb_segs += 1; 344 rte_mbuf_refcnt_set(cur_seg, 1); 345 prev_seg->next = cur_seg; 346 if (sg_temp->final) { 347 cur_seg->next = NULL; 348 break; 349 } 350 prev_seg = cur_seg; 351 } 352 353 dpaa_eth_packet_info(first_seg, vaddr); 354 rte_pktmbuf_free_seg(temp); 355 356 return first_seg; 357 } 358 359 static inline struct rte_mbuf * 360 dpaa_eth_fd_to_mbuf(const struct qm_fd *fd, uint32_t ifid) 361 { 362 struct rte_mbuf *mbuf; 363 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(fd->bpid); 364 void *ptr; 365 uint8_t format = 366 (fd->opaque & DPAA_FD_FORMAT_MASK) >> DPAA_FD_FORMAT_SHIFT; 367 uint16_t offset; 368 uint32_t length; 369 370 DPAA_DP_LOG(DEBUG, " FD--->MBUF"); 371 372 if (unlikely(format == qm_fd_sg)) 373 return dpaa_eth_sg_to_mbuf(fd, ifid); 374 375 ptr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); 376 377 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 378 379 offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> DPAA_FD_OFFSET_SHIFT; 380 length = fd->opaque & DPAA_FD_LENGTH_MASK; 381 382 /* Ignoring case when format != qm_fd_contig */ 383 dpaa_display_frame(fd); 384 385 mbuf = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); 386 387 mbuf->data_off = offset; 388 mbuf->data_len = length; 389 mbuf->pkt_len = length; 390 391 mbuf->port = ifid; 392 mbuf->nb_segs = 1; 393 mbuf->ol_flags = 0; 394 mbuf->next = NULL; 395 rte_mbuf_refcnt_set(mbuf, 1); 396 dpaa_eth_packet_info(mbuf, mbuf->buf_addr); 397 398 return mbuf; 399 } 400 401 void 402 dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, 403 void **bufs, int num_bufs) 404 { 405 struct rte_mbuf *mbuf; 406 struct dpaa_bp_info *bp_info; 407 const struct qm_fd *fd; 408 void *ptr; 409 struct dpaa_if *dpaa_intf; 410 uint16_t offset, i; 411 uint32_t length; 412 uint8_t format; 413 414 if (dpaa_svr_family != SVR_LS1046A_FAMILY) { 415 bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[0]->fd.bpid); 416 ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[0]->fd)); 417 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 418 bufs[0] = (struct rte_mbuf *)((char *)ptr - 419 bp_info->meta_data_size); 420 } 421 422 for (i = 0; i < num_bufs; i++) { 423 if (dpaa_svr_family != SVR_LS1046A_FAMILY && 424 i < num_bufs - 1) { 425 bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[i + 1]->fd.bpid); 426 ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[i + 1]->fd)); 427 rte_prefetch0((void *)((uint8_t *)ptr + 428 DEFAULT_RX_ICEOF)); 429 bufs[i + 1] = (struct rte_mbuf *)((char *)ptr - 430 bp_info->meta_data_size); 431 } 432 433 fd = &dqrr[i]->fd; 434 dpaa_intf = fq[0]->dpaa_intf; 435 436 format = (fd->opaque & DPAA_FD_FORMAT_MASK) >> 437 DPAA_FD_FORMAT_SHIFT; 438 if (unlikely(format == qm_fd_sg)) { 439 bufs[i] = dpaa_eth_sg_to_mbuf(fd, dpaa_intf->ifid); 440 continue; 441 } 442 443 offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> 444 DPAA_FD_OFFSET_SHIFT; 445 length = fd->opaque & DPAA_FD_LENGTH_MASK; 446 447 mbuf = bufs[i]; 448 mbuf->data_off = offset; 449 mbuf->data_len = length; 450 mbuf->pkt_len = length; 451 mbuf->port = dpaa_intf->ifid; 452 453 mbuf->nb_segs = 1; 454 mbuf->ol_flags = 0; 455 mbuf->next = NULL; 456 rte_mbuf_refcnt_set(mbuf, 1); 457 dpaa_eth_packet_info(mbuf, mbuf->buf_addr); 458 } 459 } 460 461 void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs) 462 { 463 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(dq->fd.bpid); 464 void *ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dq->fd)); 465 466 /* In case of LS1046, annotation stashing is disabled due to L2 cache 467 * being bottleneck in case of multicore scanario for this platform. 468 * So we prefetch the annoation beforehand, so that it is available 469 * in cache when accessed. 470 */ 471 if (dpaa_svr_family == SVR_LS1046A_FAMILY) 472 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 473 474 *bufs = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); 475 } 476 477 static uint16_t 478 dpaa_eth_queue_portal_rx(struct qman_fq *fq, 479 struct rte_mbuf **bufs, 480 uint16_t nb_bufs) 481 { 482 int ret; 483 484 if (unlikely(fq->qp == NULL)) { 485 ret = rte_dpaa_portal_fq_init((void *)0, fq); 486 if (ret) { 487 DPAA_PMD_ERR("Failure in affining portal %d", ret); 488 return 0; 489 } 490 } 491 492 return qman_portal_poll_rx(nb_bufs, (void **)bufs, fq->qp); 493 } 494 495 enum qman_cb_dqrr_result 496 dpaa_rx_cb_parallel(void *event, 497 struct qman_portal *qm __always_unused, 498 struct qman_fq *fq, 499 const struct qm_dqrr_entry *dqrr, 500 void **bufs) 501 { 502 u32 ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 503 struct rte_mbuf *mbuf; 504 struct rte_event *ev = (struct rte_event *)event; 505 506 mbuf = dpaa_eth_fd_to_mbuf(&dqrr->fd, ifid); 507 ev->event_ptr = (void *)mbuf; 508 ev->flow_id = fq->ev.flow_id; 509 ev->sub_event_type = fq->ev.sub_event_type; 510 ev->event_type = RTE_EVENT_TYPE_ETHDEV; 511 ev->op = RTE_EVENT_OP_NEW; 512 ev->sched_type = fq->ev.sched_type; 513 ev->queue_id = fq->ev.queue_id; 514 ev->priority = fq->ev.priority; 515 ev->impl_opaque = (uint8_t)DPAA_INVALID_MBUF_SEQN; 516 mbuf->seqn = DPAA_INVALID_MBUF_SEQN; 517 *bufs = mbuf; 518 519 return qman_cb_dqrr_consume; 520 } 521 522 enum qman_cb_dqrr_result 523 dpaa_rx_cb_atomic(void *event, 524 struct qman_portal *qm __always_unused, 525 struct qman_fq *fq, 526 const struct qm_dqrr_entry *dqrr, 527 void **bufs) 528 { 529 u8 index; 530 u32 ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 531 struct rte_mbuf *mbuf; 532 struct rte_event *ev = (struct rte_event *)event; 533 534 mbuf = dpaa_eth_fd_to_mbuf(&dqrr->fd, ifid); 535 ev->event_ptr = (void *)mbuf; 536 ev->flow_id = fq->ev.flow_id; 537 ev->sub_event_type = fq->ev.sub_event_type; 538 ev->event_type = RTE_EVENT_TYPE_ETHDEV; 539 ev->op = RTE_EVENT_OP_NEW; 540 ev->sched_type = fq->ev.sched_type; 541 ev->queue_id = fq->ev.queue_id; 542 ev->priority = fq->ev.priority; 543 544 /* Save active dqrr entries */ 545 index = DQRR_PTR2IDX(dqrr); 546 DPAA_PER_LCORE_DQRR_SIZE++; 547 DPAA_PER_LCORE_DQRR_HELD |= 1 << index; 548 DPAA_PER_LCORE_DQRR_MBUF(index) = mbuf; 549 ev->impl_opaque = index + 1; 550 mbuf->seqn = (uint32_t)index + 1; 551 *bufs = mbuf; 552 553 return qman_cb_dqrr_defer; 554 } 555 556 uint16_t dpaa_eth_queue_rx(void *q, 557 struct rte_mbuf **bufs, 558 uint16_t nb_bufs) 559 { 560 struct qman_fq *fq = q; 561 struct qm_dqrr_entry *dq; 562 uint32_t num_rx = 0, ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 563 int num_rx_bufs, ret; 564 uint32_t vdqcr_flags = 0; 565 566 if (likely(fq->is_static)) 567 return dpaa_eth_queue_portal_rx(fq, bufs, nb_bufs); 568 569 if (unlikely(!RTE_PER_LCORE(dpaa_io))) { 570 ret = rte_dpaa_portal_init((void *)0); 571 if (ret) { 572 DPAA_PMD_ERR("Failure in affining portal"); 573 return 0; 574 } 575 } 576 577 /* Until request for four buffers, we provide exact number of buffers. 578 * Otherwise we do not set the QM_VDQCR_EXACT flag. 579 * Not setting QM_VDQCR_EXACT flag can provide two more buffers than 580 * requested, so we request two less in this case. 581 */ 582 if (nb_bufs < 4) { 583 vdqcr_flags = QM_VDQCR_EXACT; 584 num_rx_bufs = nb_bufs; 585 } else { 586 num_rx_bufs = nb_bufs > DPAA_MAX_DEQUEUE_NUM_FRAMES ? 587 (DPAA_MAX_DEQUEUE_NUM_FRAMES - 2) : (nb_bufs - 2); 588 } 589 ret = qman_set_vdq(fq, num_rx_bufs, vdqcr_flags); 590 if (ret) 591 return 0; 592 593 do { 594 dq = qman_dequeue(fq); 595 if (!dq) 596 continue; 597 bufs[num_rx++] = dpaa_eth_fd_to_mbuf(&dq->fd, ifid); 598 qman_dqrr_consume(fq, dq); 599 } while (fq->flags & QMAN_FQ_STATE_VDQCR); 600 601 return num_rx; 602 } 603 604 static void *dpaa_get_pktbuf(struct dpaa_bp_info *bp_info) 605 { 606 int ret; 607 size_t buf = 0; 608 struct bm_buffer bufs; 609 610 ret = bman_acquire(bp_info->bp, &bufs, 1, 0); 611 if (ret <= 0) { 612 DPAA_PMD_WARN("Failed to allocate buffers %d", ret); 613 return (void *)buf; 614 } 615 616 DPAA_DP_LOG(DEBUG, "got buffer 0x%" PRIx64 " from pool %d", 617 (uint64_t)bufs.addr, bufs.bpid); 618 619 buf = (size_t)DPAA_MEMPOOL_PTOV(bp_info, bufs.addr) 620 - bp_info->meta_data_size; 621 if (!buf) 622 goto out; 623 624 out: 625 return (void *)buf; 626 } 627 628 static struct rte_mbuf *dpaa_get_dmable_mbuf(struct rte_mbuf *mbuf, 629 struct dpaa_if *dpaa_intf) 630 { 631 struct rte_mbuf *dpaa_mbuf; 632 633 /* allocate pktbuffer on bpid for dpaa port */ 634 dpaa_mbuf = dpaa_get_pktbuf(dpaa_intf->bp_info); 635 if (!dpaa_mbuf) 636 return NULL; 637 638 memcpy((uint8_t *)(dpaa_mbuf->buf_addr) + RTE_PKTMBUF_HEADROOM, (void *) 639 ((uint8_t *)(mbuf->buf_addr) + mbuf->data_off), mbuf->pkt_len); 640 641 /* Copy only the required fields */ 642 dpaa_mbuf->data_off = RTE_PKTMBUF_HEADROOM; 643 dpaa_mbuf->pkt_len = mbuf->pkt_len; 644 dpaa_mbuf->ol_flags = mbuf->ol_flags; 645 dpaa_mbuf->packet_type = mbuf->packet_type; 646 dpaa_mbuf->tx_offload = mbuf->tx_offload; 647 rte_pktmbuf_free(mbuf); 648 return dpaa_mbuf; 649 } 650 651 int 652 dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf, 653 struct qm_fd *fd, 654 uint32_t bpid) 655 { 656 struct rte_mbuf *cur_seg = mbuf, *prev_seg = NULL; 657 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(bpid); 658 struct rte_mbuf *temp, *mi; 659 struct qm_sg_entry *sg_temp, *sgt; 660 int i = 0; 661 662 DPAA_DP_LOG(DEBUG, "Creating SG FD to transmit"); 663 664 temp = rte_pktmbuf_alloc(bp_info->mp); 665 if (!temp) { 666 DPAA_PMD_ERR("Failure in allocation of mbuf"); 667 return -1; 668 } 669 if (temp->buf_len < ((mbuf->nb_segs * sizeof(struct qm_sg_entry)) 670 + temp->data_off)) { 671 DPAA_PMD_ERR("Insufficient space in mbuf for SG entries"); 672 return -1; 673 } 674 675 fd->cmd = 0; 676 fd->opaque_addr = 0; 677 678 if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK) { 679 if (!mbuf->packet_type) { 680 struct rte_net_hdr_lens hdr_lens; 681 682 mbuf->packet_type = rte_net_get_ptype(mbuf, &hdr_lens, 683 RTE_PTYPE_L2_MASK | RTE_PTYPE_L3_MASK 684 | RTE_PTYPE_L4_MASK); 685 mbuf->l2_len = hdr_lens.l2_len; 686 mbuf->l3_len = hdr_lens.l3_len; 687 } 688 if (temp->data_off < DEFAULT_TX_ICEOF 689 + sizeof(struct dpaa_eth_parse_results_t)) 690 temp->data_off = DEFAULT_TX_ICEOF 691 + sizeof(struct dpaa_eth_parse_results_t); 692 dcbz_64(temp->buf_addr); 693 dpaa_checksum_offload(mbuf, fd, temp->buf_addr); 694 } 695 696 sgt = temp->buf_addr + temp->data_off; 697 fd->format = QM_FD_SG; 698 fd->addr = temp->buf_iova; 699 fd->offset = temp->data_off; 700 fd->bpid = bpid; 701 fd->length20 = mbuf->pkt_len; 702 703 while (i < DPAA_SGT_MAX_ENTRIES) { 704 sg_temp = &sgt[i++]; 705 sg_temp->opaque = 0; 706 sg_temp->val = 0; 707 sg_temp->addr = cur_seg->buf_iova; 708 sg_temp->offset = cur_seg->data_off; 709 sg_temp->length = cur_seg->data_len; 710 if (RTE_MBUF_DIRECT(cur_seg)) { 711 if (rte_mbuf_refcnt_read(cur_seg) > 1) { 712 /*If refcnt > 1, invalid bpid is set to ensure 713 * buffer is not freed by HW. 714 */ 715 sg_temp->bpid = 0xff; 716 rte_mbuf_refcnt_update(cur_seg, -1); 717 } else { 718 sg_temp->bpid = 719 DPAA_MEMPOOL_TO_BPID(cur_seg->pool); 720 } 721 cur_seg = cur_seg->next; 722 } else { 723 /* Get owner MBUF from indirect buffer */ 724 mi = rte_mbuf_from_indirect(cur_seg); 725 if (rte_mbuf_refcnt_read(mi) > 1) { 726 /*If refcnt > 1, invalid bpid is set to ensure 727 * owner buffer is not freed by HW. 728 */ 729 sg_temp->bpid = 0xff; 730 } else { 731 sg_temp->bpid = DPAA_MEMPOOL_TO_BPID(mi->pool); 732 rte_mbuf_refcnt_update(mi, 1); 733 } 734 prev_seg = cur_seg; 735 cur_seg = cur_seg->next; 736 prev_seg->next = NULL; 737 rte_pktmbuf_free(prev_seg); 738 } 739 if (cur_seg == NULL) { 740 sg_temp->final = 1; 741 cpu_to_hw_sg(sg_temp); 742 break; 743 } 744 cpu_to_hw_sg(sg_temp); 745 } 746 return 0; 747 } 748 749 /* Handle mbufs which are not segmented (non SG) */ 750 static inline void 751 tx_on_dpaa_pool_unsegmented(struct rte_mbuf *mbuf, 752 struct dpaa_bp_info *bp_info, 753 struct qm_fd *fd_arr) 754 { 755 struct rte_mbuf *mi = NULL; 756 757 if (RTE_MBUF_DIRECT(mbuf)) { 758 if (rte_mbuf_refcnt_read(mbuf) > 1) { 759 /* In case of direct mbuf and mbuf being cloned, 760 * BMAN should _not_ release buffer. 761 */ 762 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, 0xff); 763 /* Buffer should be releasd by EAL */ 764 rte_mbuf_refcnt_update(mbuf, -1); 765 } else { 766 /* In case of direct mbuf and no cloning, mbuf can be 767 * released by BMAN. 768 */ 769 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, bp_info->bpid); 770 } 771 } else { 772 /* This is data-containing core mbuf: 'mi' */ 773 mi = rte_mbuf_from_indirect(mbuf); 774 if (rte_mbuf_refcnt_read(mi) > 1) { 775 /* In case of indirect mbuf, and mbuf being cloned, 776 * BMAN should _not_ release it and let EAL release 777 * it through pktmbuf_free below. 778 */ 779 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, 0xff); 780 } else { 781 /* In case of indirect mbuf, and no cloning, core mbuf 782 * should be released by BMAN. 783 * Increate refcnt of core mbuf so that when 784 * pktmbuf_free is called and mbuf is released, EAL 785 * doesn't try to release core mbuf which would have 786 * been released by BMAN. 787 */ 788 rte_mbuf_refcnt_update(mi, 1); 789 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, bp_info->bpid); 790 } 791 rte_pktmbuf_free(mbuf); 792 } 793 794 if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK) 795 dpaa_unsegmented_checksum(mbuf, fd_arr); 796 } 797 798 /* Handle all mbufs on dpaa BMAN managed pool */ 799 static inline uint16_t 800 tx_on_dpaa_pool(struct rte_mbuf *mbuf, 801 struct dpaa_bp_info *bp_info, 802 struct qm_fd *fd_arr) 803 { 804 DPAA_DP_LOG(DEBUG, "BMAN offloaded buffer, mbuf: %p", mbuf); 805 806 if (mbuf->nb_segs == 1) { 807 /* Case for non-segmented buffers */ 808 tx_on_dpaa_pool_unsegmented(mbuf, bp_info, fd_arr); 809 } else if (mbuf->nb_segs > 1 && 810 mbuf->nb_segs <= DPAA_SGT_MAX_ENTRIES) { 811 if (dpaa_eth_mbuf_to_sg_fd(mbuf, fd_arr, bp_info->bpid)) { 812 DPAA_PMD_DEBUG("Unable to create Scatter Gather FD"); 813 return 1; 814 } 815 } else { 816 DPAA_PMD_DEBUG("Number of Segments not supported"); 817 return 1; 818 } 819 820 return 0; 821 } 822 823 /* Handle all mbufs on an external pool (non-dpaa) */ 824 static inline uint16_t 825 tx_on_external_pool(struct qman_fq *txq, struct rte_mbuf *mbuf, 826 struct qm_fd *fd_arr) 827 { 828 struct dpaa_if *dpaa_intf = txq->dpaa_intf; 829 struct rte_mbuf *dmable_mbuf; 830 831 DPAA_DP_LOG(DEBUG, "Non-BMAN offloaded buffer." 832 "Allocating an offloaded buffer"); 833 dmable_mbuf = dpaa_get_dmable_mbuf(mbuf, dpaa_intf); 834 if (!dmable_mbuf) { 835 DPAA_DP_LOG(DEBUG, "no dpaa buffers."); 836 return 1; 837 } 838 839 DPAA_MBUF_TO_CONTIG_FD(dmable_mbuf, fd_arr, dpaa_intf->bp_info->bpid); 840 if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK) 841 dpaa_unsegmented_checksum(mbuf, fd_arr); 842 843 return 0; 844 } 845 846 uint16_t 847 dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) 848 { 849 struct rte_mbuf *mbuf, *mi = NULL; 850 struct rte_mempool *mp; 851 struct dpaa_bp_info *bp_info; 852 struct qm_fd fd_arr[DPAA_TX_BURST_SIZE]; 853 uint32_t frames_to_send, loop, sent = 0; 854 uint16_t state; 855 int ret; 856 uint32_t seqn, index, flags[DPAA_TX_BURST_SIZE] = {0}; 857 858 if (unlikely(!RTE_PER_LCORE(dpaa_io))) { 859 ret = rte_dpaa_portal_init((void *)0); 860 if (ret) { 861 DPAA_PMD_ERR("Failure in affining portal"); 862 return 0; 863 } 864 } 865 866 DPAA_DP_LOG(DEBUG, "Transmitting %d buffers on queue: %p", nb_bufs, q); 867 868 while (nb_bufs) { 869 frames_to_send = (nb_bufs > DPAA_TX_BURST_SIZE) ? 870 DPAA_TX_BURST_SIZE : nb_bufs; 871 for (loop = 0; loop < frames_to_send; loop++) { 872 mbuf = *(bufs++); 873 if (likely(RTE_MBUF_DIRECT(mbuf))) { 874 mp = mbuf->pool; 875 bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 876 if (likely(mp->ops_index == 877 bp_info->dpaa_ops_index && 878 mbuf->nb_segs == 1 && 879 rte_mbuf_refcnt_read(mbuf) == 1)) { 880 DPAA_MBUF_TO_CONTIG_FD(mbuf, 881 &fd_arr[loop], bp_info->bpid); 882 if (mbuf->ol_flags & 883 DPAA_TX_CKSUM_OFFLOAD_MASK) 884 dpaa_unsegmented_checksum(mbuf, 885 &fd_arr[loop]); 886 continue; 887 } 888 } else { 889 mi = rte_mbuf_from_indirect(mbuf); 890 mp = mi->pool; 891 } 892 893 bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 894 if (likely(mp->ops_index == bp_info->dpaa_ops_index)) { 895 state = tx_on_dpaa_pool(mbuf, bp_info, 896 &fd_arr[loop]); 897 if (unlikely(state)) { 898 /* Set frames_to_send & nb_bufs so 899 * that packets are transmitted till 900 * previous frame. 901 */ 902 frames_to_send = loop; 903 nb_bufs = loop; 904 goto send_pkts; 905 } 906 } else { 907 state = tx_on_external_pool(q, mbuf, 908 &fd_arr[loop]); 909 if (unlikely(state)) { 910 /* Set frames_to_send & nb_bufs so 911 * that packets are transmitted till 912 * previous frame. 913 */ 914 frames_to_send = loop; 915 nb_bufs = loop; 916 goto send_pkts; 917 } 918 } 919 seqn = mbuf->seqn; 920 if (seqn != DPAA_INVALID_MBUF_SEQN) { 921 index = seqn - 1; 922 if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) { 923 flags[loop] = 924 ((index & QM_EQCR_DCA_IDXMASK) << 8); 925 flags[loop] |= QMAN_ENQUEUE_FLAG_DCA; 926 DPAA_PER_LCORE_DQRR_SIZE--; 927 DPAA_PER_LCORE_DQRR_HELD &= 928 ~(1 << index); 929 } 930 } 931 } 932 933 send_pkts: 934 loop = 0; 935 while (loop < frames_to_send) { 936 loop += qman_enqueue_multi(q, &fd_arr[loop], 937 &flags[loop], 938 frames_to_send - loop); 939 } 940 nb_bufs -= frames_to_send; 941 sent += frames_to_send; 942 } 943 944 DPAA_DP_LOG(DEBUG, "Transmitted %d buffers on queue: %p", sent, q); 945 946 return sent; 947 } 948 949 uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused, 950 struct rte_mbuf **bufs __rte_unused, 951 uint16_t nb_bufs __rte_unused) 952 { 953 DPAA_DP_LOG(DEBUG, "Drop all packets"); 954 955 /* Drop all incoming packets. No need to free packets here 956 * because the rte_eth f/w frees up the packets through tx_buffer 957 * callback in case this functions returns count less than nb_bufs 958 */ 959 return 0; 960 } 961