1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 4 * Copyright 2017 NXP 5 * 6 */ 7 8 /* System headers */ 9 #include <inttypes.h> 10 #include <unistd.h> 11 #include <stdio.h> 12 #include <limits.h> 13 #include <sched.h> 14 #include <pthread.h> 15 16 #include <rte_byteorder.h> 17 #include <rte_common.h> 18 #include <rte_interrupts.h> 19 #include <rte_log.h> 20 #include <rte_debug.h> 21 #include <rte_pci.h> 22 #include <rte_atomic.h> 23 #include <rte_branch_prediction.h> 24 #include <rte_memory.h> 25 #include <rte_tailq.h> 26 #include <rte_eal.h> 27 #include <rte_alarm.h> 28 #include <rte_ether.h> 29 #include <rte_ethdev_driver.h> 30 #include <rte_malloc.h> 31 #include <rte_ring.h> 32 #include <rte_ip.h> 33 #include <rte_tcp.h> 34 #include <rte_udp.h> 35 #include <rte_net.h> 36 #include <rte_eventdev.h> 37 38 #include "dpaa_ethdev.h" 39 #include "dpaa_rxtx.h" 40 #include <rte_dpaa_bus.h> 41 #include <dpaa_mempool.h> 42 43 #include <qman.h> 44 #include <fsl_usd.h> 45 #include <fsl_qman.h> 46 #include <fsl_bman.h> 47 #include <of.h> 48 #include <netcfg.h> 49 50 #define DPAA_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid) \ 51 do { \ 52 (_fd)->cmd = 0; \ 53 (_fd)->opaque_addr = 0; \ 54 (_fd)->opaque = QM_FD_CONTIG << DPAA_FD_FORMAT_SHIFT; \ 55 (_fd)->opaque |= ((_mbuf)->data_off) << DPAA_FD_OFFSET_SHIFT; \ 56 (_fd)->opaque |= (_mbuf)->pkt_len; \ 57 (_fd)->addr = (_mbuf)->buf_iova; \ 58 (_fd)->bpid = _bpid; \ 59 } while (0) 60 61 #if (defined RTE_LIBRTE_DPAA_DEBUG_DRIVER) 62 void dpaa_display_frame(const struct qm_fd *fd) 63 { 64 int ii; 65 char *ptr; 66 67 printf("%s::bpid %x addr %08x%08x, format %d off %d, len %d stat %x\n", 68 __func__, fd->bpid, fd->addr_hi, fd->addr_lo, fd->format, 69 fd->offset, fd->length20, fd->status); 70 71 ptr = (char *)rte_dpaa_mem_ptov(fd->addr); 72 ptr += fd->offset; 73 printf("%02x ", *ptr); 74 for (ii = 1; ii < fd->length20; ii++) { 75 printf("%02x ", *ptr); 76 if ((ii % 16) == 0) 77 printf("\n"); 78 ptr++; 79 } 80 printf("\n"); 81 } 82 #else 83 #define dpaa_display_frame(a) 84 #endif 85 86 static inline void dpaa_slow_parsing(struct rte_mbuf *m __rte_unused, 87 uint64_t prs __rte_unused) 88 { 89 DPAA_DP_LOG(DEBUG, "Slow parsing"); 90 /*TBD:XXX: to be implemented*/ 91 } 92 93 static inline void dpaa_eth_packet_info(struct rte_mbuf *m, 94 uint64_t fd_virt_addr) 95 { 96 struct annotations_t *annot = GET_ANNOTATIONS(fd_virt_addr); 97 uint64_t prs = *((uint64_t *)(&annot->parse)) & DPAA_PARSE_MASK; 98 99 DPAA_DP_LOG(DEBUG, " Parsing mbuf: %p with annotations: %p", m, annot); 100 101 switch (prs) { 102 case DPAA_PKT_TYPE_IPV4: 103 m->packet_type = RTE_PTYPE_L2_ETHER | 104 RTE_PTYPE_L3_IPV4; 105 break; 106 case DPAA_PKT_TYPE_IPV6: 107 m->packet_type = RTE_PTYPE_L2_ETHER | 108 RTE_PTYPE_L3_IPV6; 109 break; 110 case DPAA_PKT_TYPE_ETHER: 111 m->packet_type = RTE_PTYPE_L2_ETHER; 112 break; 113 case DPAA_PKT_TYPE_IPV4_FRAG: 114 case DPAA_PKT_TYPE_IPV4_FRAG_UDP: 115 case DPAA_PKT_TYPE_IPV4_FRAG_TCP: 116 case DPAA_PKT_TYPE_IPV4_FRAG_SCTP: 117 m->packet_type = RTE_PTYPE_L2_ETHER | 118 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_FRAG; 119 break; 120 case DPAA_PKT_TYPE_IPV6_FRAG: 121 case DPAA_PKT_TYPE_IPV6_FRAG_UDP: 122 case DPAA_PKT_TYPE_IPV6_FRAG_TCP: 123 case DPAA_PKT_TYPE_IPV6_FRAG_SCTP: 124 m->packet_type = RTE_PTYPE_L2_ETHER | 125 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_FRAG; 126 break; 127 case DPAA_PKT_TYPE_IPV4_EXT: 128 m->packet_type = RTE_PTYPE_L2_ETHER | 129 RTE_PTYPE_L3_IPV4_EXT; 130 break; 131 case DPAA_PKT_TYPE_IPV6_EXT: 132 m->packet_type = RTE_PTYPE_L2_ETHER | 133 RTE_PTYPE_L3_IPV6_EXT; 134 break; 135 case DPAA_PKT_TYPE_IPV4_TCP: 136 m->packet_type = RTE_PTYPE_L2_ETHER | 137 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_TCP; 138 break; 139 case DPAA_PKT_TYPE_IPV6_TCP: 140 m->packet_type = RTE_PTYPE_L2_ETHER | 141 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_TCP; 142 break; 143 case DPAA_PKT_TYPE_IPV4_UDP: 144 m->packet_type = RTE_PTYPE_L2_ETHER | 145 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_UDP; 146 break; 147 case DPAA_PKT_TYPE_IPV6_UDP: 148 m->packet_type = RTE_PTYPE_L2_ETHER | 149 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_UDP; 150 break; 151 case DPAA_PKT_TYPE_IPV4_EXT_UDP: 152 m->packet_type = RTE_PTYPE_L2_ETHER | 153 RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_UDP; 154 break; 155 case DPAA_PKT_TYPE_IPV6_EXT_UDP: 156 m->packet_type = RTE_PTYPE_L2_ETHER | 157 RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_UDP; 158 break; 159 case DPAA_PKT_TYPE_IPV4_EXT_TCP: 160 m->packet_type = RTE_PTYPE_L2_ETHER | 161 RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_TCP; 162 break; 163 case DPAA_PKT_TYPE_IPV6_EXT_TCP: 164 m->packet_type = RTE_PTYPE_L2_ETHER | 165 RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_TCP; 166 break; 167 case DPAA_PKT_TYPE_IPV4_SCTP: 168 m->packet_type = RTE_PTYPE_L2_ETHER | 169 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_SCTP; 170 break; 171 case DPAA_PKT_TYPE_IPV6_SCTP: 172 m->packet_type = RTE_PTYPE_L2_ETHER | 173 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_SCTP; 174 break; 175 case DPAA_PKT_TYPE_NONE: 176 m->packet_type = 0; 177 break; 178 /* More switch cases can be added */ 179 default: 180 dpaa_slow_parsing(m, prs); 181 } 182 183 m->tx_offload = annot->parse.ip_off[0]; 184 m->tx_offload |= (annot->parse.l4_off - annot->parse.ip_off[0]) 185 << DPAA_PKT_L3_LEN_SHIFT; 186 187 /* Set the hash values */ 188 m->hash.rss = (uint32_t)(annot->hash); 189 /* All packets with Bad checksum are dropped by interface (and 190 * corresponding notification issued to RX error queues). 191 */ 192 m->ol_flags = PKT_RX_RSS_HASH | PKT_RX_IP_CKSUM_GOOD; 193 194 /* Check if Vlan is present */ 195 if (prs & DPAA_PARSE_VLAN_MASK) 196 m->ol_flags |= PKT_RX_VLAN; 197 /* Packet received without stripping the vlan */ 198 } 199 200 static inline void dpaa_checksum(struct rte_mbuf *mbuf) 201 { 202 struct ether_hdr *eth_hdr = rte_pktmbuf_mtod(mbuf, struct ether_hdr *); 203 char *l3_hdr = (char *)eth_hdr + mbuf->l2_len; 204 struct ipv4_hdr *ipv4_hdr = (struct ipv4_hdr *)l3_hdr; 205 struct ipv6_hdr *ipv6_hdr = (struct ipv6_hdr *)l3_hdr; 206 207 DPAA_DP_LOG(DEBUG, "Calculating checksum for mbuf: %p", mbuf); 208 209 if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) || 210 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 211 RTE_PTYPE_L3_IPV4_EXT)) { 212 ipv4_hdr = (struct ipv4_hdr *)l3_hdr; 213 ipv4_hdr->hdr_checksum = 0; 214 ipv4_hdr->hdr_checksum = rte_ipv4_cksum(ipv4_hdr); 215 } else if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 216 RTE_PTYPE_L3_IPV6) || 217 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 218 RTE_PTYPE_L3_IPV6_EXT)) 219 ipv6_hdr = (struct ipv6_hdr *)l3_hdr; 220 221 if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP) { 222 struct tcp_hdr *tcp_hdr = (struct tcp_hdr *)(l3_hdr + 223 mbuf->l3_len); 224 tcp_hdr->cksum = 0; 225 if (eth_hdr->ether_type == htons(ETHER_TYPE_IPv4)) 226 tcp_hdr->cksum = rte_ipv4_udptcp_cksum(ipv4_hdr, 227 tcp_hdr); 228 else /* assume ethertype == ETHER_TYPE_IPv6 */ 229 tcp_hdr->cksum = rte_ipv6_udptcp_cksum(ipv6_hdr, 230 tcp_hdr); 231 } else if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == 232 RTE_PTYPE_L4_UDP) { 233 struct udp_hdr *udp_hdr = (struct udp_hdr *)(l3_hdr + 234 mbuf->l3_len); 235 udp_hdr->dgram_cksum = 0; 236 if (eth_hdr->ether_type == htons(ETHER_TYPE_IPv4)) 237 udp_hdr->dgram_cksum = rte_ipv4_udptcp_cksum(ipv4_hdr, 238 udp_hdr); 239 else /* assume ethertype == ETHER_TYPE_IPv6 */ 240 udp_hdr->dgram_cksum = rte_ipv6_udptcp_cksum(ipv6_hdr, 241 udp_hdr); 242 } 243 } 244 245 static inline void dpaa_checksum_offload(struct rte_mbuf *mbuf, 246 struct qm_fd *fd, char *prs_buf) 247 { 248 struct dpaa_eth_parse_results_t *prs; 249 250 DPAA_DP_LOG(DEBUG, " Offloading checksum for mbuf: %p", mbuf); 251 252 prs = GET_TX_PRS(prs_buf); 253 prs->l3r = 0; 254 prs->l4r = 0; 255 if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) || 256 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 257 RTE_PTYPE_L3_IPV4_EXT)) 258 prs->l3r = DPAA_L3_PARSE_RESULT_IPV4; 259 else if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 260 RTE_PTYPE_L3_IPV6) || 261 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 262 RTE_PTYPE_L3_IPV6_EXT)) 263 prs->l3r = DPAA_L3_PARSE_RESULT_IPV6; 264 265 if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP) 266 prs->l4r = DPAA_L4_PARSE_RESULT_TCP; 267 else if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_UDP) 268 prs->l4r = DPAA_L4_PARSE_RESULT_UDP; 269 270 prs->ip_off[0] = mbuf->l2_len; 271 prs->l4_off = mbuf->l3_len + mbuf->l2_len; 272 /* Enable L3 (and L4, if TCP or UDP) HW checksum*/ 273 fd->cmd = DPAA_FD_CMD_RPD | DPAA_FD_CMD_DTC; 274 } 275 276 static inline void 277 dpaa_unsegmented_checksum(struct rte_mbuf *mbuf, struct qm_fd *fd_arr) 278 { 279 if (!mbuf->packet_type) { 280 struct rte_net_hdr_lens hdr_lens; 281 282 mbuf->packet_type = rte_net_get_ptype(mbuf, &hdr_lens, 283 RTE_PTYPE_L2_MASK | RTE_PTYPE_L3_MASK 284 | RTE_PTYPE_L4_MASK); 285 mbuf->l2_len = hdr_lens.l2_len; 286 mbuf->l3_len = hdr_lens.l3_len; 287 } 288 if (mbuf->data_off < (DEFAULT_TX_ICEOF + 289 sizeof(struct dpaa_eth_parse_results_t))) { 290 DPAA_DP_LOG(DEBUG, "Checksum offload Err: " 291 "Not enough Headroom " 292 "space for correct Checksum offload." 293 "So Calculating checksum in Software."); 294 dpaa_checksum(mbuf); 295 } else { 296 dpaa_checksum_offload(mbuf, fd_arr, mbuf->buf_addr); 297 } 298 } 299 300 struct rte_mbuf * 301 dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid) 302 { 303 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(fd->bpid); 304 struct rte_mbuf *first_seg, *prev_seg, *cur_seg, *temp; 305 struct qm_sg_entry *sgt, *sg_temp; 306 void *vaddr, *sg_vaddr; 307 int i = 0; 308 uint8_t fd_offset = fd->offset; 309 310 DPAA_DP_LOG(DEBUG, "Received an SG frame"); 311 312 vaddr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); 313 if (!vaddr) { 314 DPAA_PMD_ERR("unable to convert physical address"); 315 return NULL; 316 } 317 sgt = vaddr + fd_offset; 318 sg_temp = &sgt[i++]; 319 hw_sg_to_cpu(sg_temp); 320 temp = (struct rte_mbuf *)((char *)vaddr - bp_info->meta_data_size); 321 sg_vaddr = DPAA_MEMPOOL_PTOV(bp_info, qm_sg_entry_get64(sg_temp)); 322 323 first_seg = (struct rte_mbuf *)((char *)sg_vaddr - 324 bp_info->meta_data_size); 325 first_seg->data_off = sg_temp->offset; 326 first_seg->data_len = sg_temp->length; 327 first_seg->pkt_len = sg_temp->length; 328 rte_mbuf_refcnt_set(first_seg, 1); 329 330 first_seg->port = ifid; 331 first_seg->nb_segs = 1; 332 first_seg->ol_flags = 0; 333 prev_seg = first_seg; 334 while (i < DPAA_SGT_MAX_ENTRIES) { 335 sg_temp = &sgt[i++]; 336 hw_sg_to_cpu(sg_temp); 337 sg_vaddr = DPAA_MEMPOOL_PTOV(bp_info, 338 qm_sg_entry_get64(sg_temp)); 339 cur_seg = (struct rte_mbuf *)((char *)sg_vaddr - 340 bp_info->meta_data_size); 341 cur_seg->data_off = sg_temp->offset; 342 cur_seg->data_len = sg_temp->length; 343 first_seg->pkt_len += sg_temp->length; 344 first_seg->nb_segs += 1; 345 rte_mbuf_refcnt_set(cur_seg, 1); 346 prev_seg->next = cur_seg; 347 if (sg_temp->final) { 348 cur_seg->next = NULL; 349 break; 350 } 351 prev_seg = cur_seg; 352 } 353 354 dpaa_eth_packet_info(first_seg, (uint64_t)vaddr); 355 rte_pktmbuf_free_seg(temp); 356 357 return first_seg; 358 } 359 360 static inline struct rte_mbuf * 361 dpaa_eth_fd_to_mbuf(const struct qm_fd *fd, uint32_t ifid) 362 { 363 struct rte_mbuf *mbuf; 364 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(fd->bpid); 365 void *ptr; 366 uint8_t format = 367 (fd->opaque & DPAA_FD_FORMAT_MASK) >> DPAA_FD_FORMAT_SHIFT; 368 uint16_t offset; 369 uint32_t length; 370 371 DPAA_DP_LOG(DEBUG, " FD--->MBUF"); 372 373 if (unlikely(format == qm_fd_sg)) 374 return dpaa_eth_sg_to_mbuf(fd, ifid); 375 376 ptr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); 377 378 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 379 380 offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> DPAA_FD_OFFSET_SHIFT; 381 length = fd->opaque & DPAA_FD_LENGTH_MASK; 382 383 /* Ignoring case when format != qm_fd_contig */ 384 dpaa_display_frame(fd); 385 386 mbuf = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); 387 388 mbuf->data_off = offset; 389 mbuf->data_len = length; 390 mbuf->pkt_len = length; 391 392 mbuf->port = ifid; 393 mbuf->nb_segs = 1; 394 mbuf->ol_flags = 0; 395 mbuf->next = NULL; 396 rte_mbuf_refcnt_set(mbuf, 1); 397 dpaa_eth_packet_info(mbuf, (uint64_t)mbuf->buf_addr); 398 399 return mbuf; 400 } 401 402 void 403 dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, 404 void **bufs, int num_bufs) 405 { 406 struct rte_mbuf *mbuf; 407 struct dpaa_bp_info *bp_info; 408 const struct qm_fd *fd; 409 void *ptr; 410 struct dpaa_if *dpaa_intf; 411 uint16_t offset, i; 412 uint32_t length; 413 uint8_t format; 414 415 if (dpaa_svr_family != SVR_LS1046A_FAMILY) { 416 bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[0]->fd.bpid); 417 ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[0]->fd)); 418 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 419 bufs[0] = (struct rte_mbuf *)((char *)ptr - 420 bp_info->meta_data_size); 421 } 422 423 for (i = 0; i < num_bufs; i++) { 424 if (dpaa_svr_family != SVR_LS1046A_FAMILY && 425 i < num_bufs - 1) { 426 bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[i + 1]->fd.bpid); 427 ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[i + 1]->fd)); 428 rte_prefetch0((void *)((uint8_t *)ptr + 429 DEFAULT_RX_ICEOF)); 430 bufs[i + 1] = (struct rte_mbuf *)((char *)ptr - 431 bp_info->meta_data_size); 432 } 433 434 fd = &dqrr[i]->fd; 435 dpaa_intf = fq[i]->dpaa_intf; 436 437 format = (fd->opaque & DPAA_FD_FORMAT_MASK) >> 438 DPAA_FD_FORMAT_SHIFT; 439 if (unlikely(format == qm_fd_sg)) { 440 bufs[i] = dpaa_eth_sg_to_mbuf(fd, dpaa_intf->ifid); 441 continue; 442 } 443 444 offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> 445 DPAA_FD_OFFSET_SHIFT; 446 length = fd->opaque & DPAA_FD_LENGTH_MASK; 447 448 mbuf = bufs[i]; 449 mbuf->data_off = offset; 450 mbuf->data_len = length; 451 mbuf->pkt_len = length; 452 mbuf->port = dpaa_intf->ifid; 453 454 mbuf->nb_segs = 1; 455 mbuf->ol_flags = 0; 456 mbuf->next = NULL; 457 rte_mbuf_refcnt_set(mbuf, 1); 458 dpaa_eth_packet_info(mbuf, (uint64_t)mbuf->buf_addr); 459 } 460 } 461 462 void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs) 463 { 464 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(dq->fd.bpid); 465 void *ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dq->fd)); 466 467 /* In case of LS1046, annotation stashing is disabled due to L2 cache 468 * being bottleneck in case of multicore scanario for this platform. 469 * So we prefetch the annoation beforehand, so that it is available 470 * in cache when accessed. 471 */ 472 if (dpaa_svr_family == SVR_LS1046A_FAMILY) 473 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 474 475 *bufs = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); 476 } 477 478 static uint16_t 479 dpaa_eth_queue_portal_rx(struct qman_fq *fq, 480 struct rte_mbuf **bufs, 481 uint16_t nb_bufs) 482 { 483 int ret; 484 485 if (unlikely(fq->qp == NULL)) { 486 ret = rte_dpaa_portal_fq_init((void *)0, fq); 487 if (ret) { 488 DPAA_PMD_ERR("Failure in affining portal %d", ret); 489 return 0; 490 } 491 } 492 493 return qman_portal_poll_rx(nb_bufs, (void **)bufs, fq->qp); 494 } 495 496 enum qman_cb_dqrr_result 497 dpaa_rx_cb_parallel(void *event, 498 struct qman_portal *qm __always_unused, 499 struct qman_fq *fq, 500 const struct qm_dqrr_entry *dqrr, 501 void **bufs) 502 { 503 u32 ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 504 struct rte_mbuf *mbuf; 505 struct rte_event *ev = (struct rte_event *)event; 506 507 mbuf = dpaa_eth_fd_to_mbuf(&dqrr->fd, ifid); 508 ev->event_ptr = (void *)mbuf; 509 ev->flow_id = fq->ev.flow_id; 510 ev->sub_event_type = fq->ev.sub_event_type; 511 ev->event_type = RTE_EVENT_TYPE_ETHDEV; 512 ev->op = RTE_EVENT_OP_NEW; 513 ev->sched_type = fq->ev.sched_type; 514 ev->queue_id = fq->ev.queue_id; 515 ev->priority = fq->ev.priority; 516 ev->impl_opaque = (uint8_t)DPAA_INVALID_MBUF_SEQN; 517 mbuf->seqn = DPAA_INVALID_MBUF_SEQN; 518 *bufs = mbuf; 519 520 return qman_cb_dqrr_consume; 521 } 522 523 enum qman_cb_dqrr_result 524 dpaa_rx_cb_atomic(void *event, 525 struct qman_portal *qm __always_unused, 526 struct qman_fq *fq, 527 const struct qm_dqrr_entry *dqrr, 528 void **bufs) 529 { 530 u8 index; 531 u32 ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 532 struct rte_mbuf *mbuf; 533 struct rte_event *ev = (struct rte_event *)event; 534 535 mbuf = dpaa_eth_fd_to_mbuf(&dqrr->fd, ifid); 536 ev->event_ptr = (void *)mbuf; 537 ev->flow_id = fq->ev.flow_id; 538 ev->sub_event_type = fq->ev.sub_event_type; 539 ev->event_type = RTE_EVENT_TYPE_ETHDEV; 540 ev->op = RTE_EVENT_OP_NEW; 541 ev->sched_type = fq->ev.sched_type; 542 ev->queue_id = fq->ev.queue_id; 543 ev->priority = fq->ev.priority; 544 545 /* Save active dqrr entries */ 546 index = DQRR_PTR2IDX(dqrr); 547 DPAA_PER_LCORE_DQRR_SIZE++; 548 DPAA_PER_LCORE_DQRR_HELD |= 1 << index; 549 DPAA_PER_LCORE_DQRR_MBUF(index) = mbuf; 550 ev->impl_opaque = index + 1; 551 mbuf->seqn = (uint32_t)index + 1; 552 *bufs = mbuf; 553 554 return qman_cb_dqrr_defer; 555 } 556 557 uint16_t dpaa_eth_queue_rx(void *q, 558 struct rte_mbuf **bufs, 559 uint16_t nb_bufs) 560 { 561 struct qman_fq *fq = q; 562 struct qm_dqrr_entry *dq; 563 uint32_t num_rx = 0, ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 564 int ret; 565 566 if (likely(fq->is_static)) 567 return dpaa_eth_queue_portal_rx(fq, bufs, nb_bufs); 568 569 if (unlikely(!RTE_PER_LCORE(dpaa_io))) { 570 ret = rte_dpaa_portal_init((void *)0); 571 if (ret) { 572 DPAA_PMD_ERR("Failure in affining portal"); 573 return 0; 574 } 575 } 576 577 ret = qman_set_vdq(fq, (nb_bufs > DPAA_MAX_DEQUEUE_NUM_FRAMES) ? 578 DPAA_MAX_DEQUEUE_NUM_FRAMES : nb_bufs); 579 if (ret) 580 return 0; 581 582 do { 583 dq = qman_dequeue(fq); 584 if (!dq) 585 continue; 586 bufs[num_rx++] = dpaa_eth_fd_to_mbuf(&dq->fd, ifid); 587 qman_dqrr_consume(fq, dq); 588 } while (fq->flags & QMAN_FQ_STATE_VDQCR); 589 590 return num_rx; 591 } 592 593 static void *dpaa_get_pktbuf(struct dpaa_bp_info *bp_info) 594 { 595 int ret; 596 uint64_t buf = 0; 597 struct bm_buffer bufs; 598 599 ret = bman_acquire(bp_info->bp, &bufs, 1, 0); 600 if (ret <= 0) { 601 DPAA_PMD_WARN("Failed to allocate buffers %d", ret); 602 return (void *)buf; 603 } 604 605 DPAA_DP_LOG(DEBUG, "got buffer 0x%lx from pool %d", 606 (uint64_t)bufs.addr, bufs.bpid); 607 608 buf = (uint64_t)DPAA_MEMPOOL_PTOV(bp_info, bufs.addr) 609 - bp_info->meta_data_size; 610 if (!buf) 611 goto out; 612 613 out: 614 return (void *)buf; 615 } 616 617 static struct rte_mbuf *dpaa_get_dmable_mbuf(struct rte_mbuf *mbuf, 618 struct dpaa_if *dpaa_intf) 619 { 620 struct rte_mbuf *dpaa_mbuf; 621 622 /* allocate pktbuffer on bpid for dpaa port */ 623 dpaa_mbuf = dpaa_get_pktbuf(dpaa_intf->bp_info); 624 if (!dpaa_mbuf) 625 return NULL; 626 627 memcpy((uint8_t *)(dpaa_mbuf->buf_addr) + RTE_PKTMBUF_HEADROOM, (void *) 628 ((uint8_t *)(mbuf->buf_addr) + mbuf->data_off), mbuf->pkt_len); 629 630 /* Copy only the required fields */ 631 dpaa_mbuf->data_off = RTE_PKTMBUF_HEADROOM; 632 dpaa_mbuf->pkt_len = mbuf->pkt_len; 633 dpaa_mbuf->ol_flags = mbuf->ol_flags; 634 dpaa_mbuf->packet_type = mbuf->packet_type; 635 dpaa_mbuf->tx_offload = mbuf->tx_offload; 636 rte_pktmbuf_free(mbuf); 637 return dpaa_mbuf; 638 } 639 640 int 641 dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf, 642 struct qm_fd *fd, 643 uint32_t bpid) 644 { 645 struct rte_mbuf *cur_seg = mbuf, *prev_seg = NULL; 646 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(bpid); 647 struct rte_mbuf *temp, *mi; 648 struct qm_sg_entry *sg_temp, *sgt; 649 int i = 0; 650 651 DPAA_DP_LOG(DEBUG, "Creating SG FD to transmit"); 652 653 temp = rte_pktmbuf_alloc(bp_info->mp); 654 if (!temp) { 655 DPAA_PMD_ERR("Failure in allocation of mbuf"); 656 return -1; 657 } 658 if (temp->buf_len < ((mbuf->nb_segs * sizeof(struct qm_sg_entry)) 659 + temp->data_off)) { 660 DPAA_PMD_ERR("Insufficient space in mbuf for SG entries"); 661 return -1; 662 } 663 664 fd->cmd = 0; 665 fd->opaque_addr = 0; 666 667 if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK) { 668 if (!mbuf->packet_type) { 669 struct rte_net_hdr_lens hdr_lens; 670 671 mbuf->packet_type = rte_net_get_ptype(mbuf, &hdr_lens, 672 RTE_PTYPE_L2_MASK | RTE_PTYPE_L3_MASK 673 | RTE_PTYPE_L4_MASK); 674 mbuf->l2_len = hdr_lens.l2_len; 675 mbuf->l3_len = hdr_lens.l3_len; 676 } 677 if (temp->data_off < DEFAULT_TX_ICEOF 678 + sizeof(struct dpaa_eth_parse_results_t)) 679 temp->data_off = DEFAULT_TX_ICEOF 680 + sizeof(struct dpaa_eth_parse_results_t); 681 dcbz_64(temp->buf_addr); 682 dpaa_checksum_offload(mbuf, fd, temp->buf_addr); 683 } 684 685 sgt = temp->buf_addr + temp->data_off; 686 fd->format = QM_FD_SG; 687 fd->addr = temp->buf_iova; 688 fd->offset = temp->data_off; 689 fd->bpid = bpid; 690 fd->length20 = mbuf->pkt_len; 691 692 while (i < DPAA_SGT_MAX_ENTRIES) { 693 sg_temp = &sgt[i++]; 694 sg_temp->opaque = 0; 695 sg_temp->val = 0; 696 sg_temp->addr = cur_seg->buf_iova; 697 sg_temp->offset = cur_seg->data_off; 698 sg_temp->length = cur_seg->data_len; 699 if (RTE_MBUF_DIRECT(cur_seg)) { 700 if (rte_mbuf_refcnt_read(cur_seg) > 1) { 701 /*If refcnt > 1, invalid bpid is set to ensure 702 * buffer is not freed by HW. 703 */ 704 sg_temp->bpid = 0xff; 705 rte_mbuf_refcnt_update(cur_seg, -1); 706 } else { 707 sg_temp->bpid = 708 DPAA_MEMPOOL_TO_BPID(cur_seg->pool); 709 } 710 cur_seg = cur_seg->next; 711 } else { 712 /* Get owner MBUF from indirect buffer */ 713 mi = rte_mbuf_from_indirect(cur_seg); 714 if (rte_mbuf_refcnt_read(mi) > 1) { 715 /*If refcnt > 1, invalid bpid is set to ensure 716 * owner buffer is not freed by HW. 717 */ 718 sg_temp->bpid = 0xff; 719 } else { 720 sg_temp->bpid = DPAA_MEMPOOL_TO_BPID(mi->pool); 721 rte_mbuf_refcnt_update(mi, 1); 722 } 723 prev_seg = cur_seg; 724 cur_seg = cur_seg->next; 725 prev_seg->next = NULL; 726 rte_pktmbuf_free(prev_seg); 727 } 728 if (cur_seg == NULL) { 729 sg_temp->final = 1; 730 cpu_to_hw_sg(sg_temp); 731 break; 732 } 733 cpu_to_hw_sg(sg_temp); 734 } 735 return 0; 736 } 737 738 /* Handle mbufs which are not segmented (non SG) */ 739 static inline void 740 tx_on_dpaa_pool_unsegmented(struct rte_mbuf *mbuf, 741 struct dpaa_bp_info *bp_info, 742 struct qm_fd *fd_arr) 743 { 744 struct rte_mbuf *mi = NULL; 745 746 if (RTE_MBUF_DIRECT(mbuf)) { 747 if (rte_mbuf_refcnt_read(mbuf) > 1) { 748 /* In case of direct mbuf and mbuf being cloned, 749 * BMAN should _not_ release buffer. 750 */ 751 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, 0xff); 752 /* Buffer should be releasd by EAL */ 753 rte_mbuf_refcnt_update(mbuf, -1); 754 } else { 755 /* In case of direct mbuf and no cloning, mbuf can be 756 * released by BMAN. 757 */ 758 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, bp_info->bpid); 759 } 760 } else { 761 /* This is data-containing core mbuf: 'mi' */ 762 mi = rte_mbuf_from_indirect(mbuf); 763 if (rte_mbuf_refcnt_read(mi) > 1) { 764 /* In case of indirect mbuf, and mbuf being cloned, 765 * BMAN should _not_ release it and let EAL release 766 * it through pktmbuf_free below. 767 */ 768 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, 0xff); 769 } else { 770 /* In case of indirect mbuf, and no cloning, core mbuf 771 * should be released by BMAN. 772 * Increate refcnt of core mbuf so that when 773 * pktmbuf_free is called and mbuf is released, EAL 774 * doesn't try to release core mbuf which would have 775 * been released by BMAN. 776 */ 777 rte_mbuf_refcnt_update(mi, 1); 778 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, bp_info->bpid); 779 } 780 rte_pktmbuf_free(mbuf); 781 } 782 783 if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK) 784 dpaa_unsegmented_checksum(mbuf, fd_arr); 785 } 786 787 /* Handle all mbufs on dpaa BMAN managed pool */ 788 static inline uint16_t 789 tx_on_dpaa_pool(struct rte_mbuf *mbuf, 790 struct dpaa_bp_info *bp_info, 791 struct qm_fd *fd_arr) 792 { 793 DPAA_DP_LOG(DEBUG, "BMAN offloaded buffer, mbuf: %p", mbuf); 794 795 if (mbuf->nb_segs == 1) { 796 /* Case for non-segmented buffers */ 797 tx_on_dpaa_pool_unsegmented(mbuf, bp_info, fd_arr); 798 } else if (mbuf->nb_segs > 1 && 799 mbuf->nb_segs <= DPAA_SGT_MAX_ENTRIES) { 800 if (dpaa_eth_mbuf_to_sg_fd(mbuf, fd_arr, bp_info->bpid)) { 801 DPAA_PMD_DEBUG("Unable to create Scatter Gather FD"); 802 return 1; 803 } 804 } else { 805 DPAA_PMD_DEBUG("Number of Segments not supported"); 806 return 1; 807 } 808 809 return 0; 810 } 811 812 /* Handle all mbufs on an external pool (non-dpaa) */ 813 static inline uint16_t 814 tx_on_external_pool(struct qman_fq *txq, struct rte_mbuf *mbuf, 815 struct qm_fd *fd_arr) 816 { 817 struct dpaa_if *dpaa_intf = txq->dpaa_intf; 818 struct rte_mbuf *dmable_mbuf; 819 820 DPAA_DP_LOG(DEBUG, "Non-BMAN offloaded buffer." 821 "Allocating an offloaded buffer"); 822 dmable_mbuf = dpaa_get_dmable_mbuf(mbuf, dpaa_intf); 823 if (!dmable_mbuf) { 824 DPAA_DP_LOG(DEBUG, "no dpaa buffers."); 825 return 1; 826 } 827 828 DPAA_MBUF_TO_CONTIG_FD(dmable_mbuf, fd_arr, dpaa_intf->bp_info->bpid); 829 830 return 0; 831 } 832 833 uint16_t 834 dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) 835 { 836 struct rte_mbuf *mbuf, *mi = NULL; 837 struct rte_mempool *mp; 838 struct dpaa_bp_info *bp_info; 839 struct qm_fd fd_arr[DPAA_TX_BURST_SIZE]; 840 uint32_t frames_to_send, loop, sent = 0; 841 uint16_t state; 842 int ret; 843 uint32_t seqn, index, flags[DPAA_TX_BURST_SIZE] = {0}; 844 845 if (unlikely(!RTE_PER_LCORE(dpaa_io))) { 846 ret = rte_dpaa_portal_init((void *)0); 847 if (ret) { 848 DPAA_PMD_ERR("Failure in affining portal"); 849 return 0; 850 } 851 } 852 853 DPAA_DP_LOG(DEBUG, "Transmitting %d buffers on queue: %p", nb_bufs, q); 854 855 while (nb_bufs) { 856 frames_to_send = (nb_bufs > DPAA_TX_BURST_SIZE) ? 857 DPAA_TX_BURST_SIZE : nb_bufs; 858 for (loop = 0; loop < frames_to_send; loop++) { 859 mbuf = *(bufs++); 860 if (likely(RTE_MBUF_DIRECT(mbuf))) { 861 mp = mbuf->pool; 862 bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 863 if (likely(mp->ops_index == 864 bp_info->dpaa_ops_index && 865 mbuf->nb_segs == 1 && 866 rte_mbuf_refcnt_read(mbuf) == 1)) { 867 DPAA_MBUF_TO_CONTIG_FD(mbuf, 868 &fd_arr[loop], bp_info->bpid); 869 if (mbuf->ol_flags & 870 DPAA_TX_CKSUM_OFFLOAD_MASK) 871 dpaa_unsegmented_checksum(mbuf, 872 &fd_arr[loop]); 873 continue; 874 } 875 } else { 876 mi = rte_mbuf_from_indirect(mbuf); 877 mp = mi->pool; 878 } 879 880 bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 881 if (likely(mp->ops_index == bp_info->dpaa_ops_index)) { 882 state = tx_on_dpaa_pool(mbuf, bp_info, 883 &fd_arr[loop]); 884 if (unlikely(state)) { 885 /* Set frames_to_send & nb_bufs so 886 * that packets are transmitted till 887 * previous frame. 888 */ 889 frames_to_send = loop; 890 nb_bufs = loop; 891 goto send_pkts; 892 } 893 } else { 894 state = tx_on_external_pool(q, mbuf, 895 &fd_arr[loop]); 896 if (unlikely(state)) { 897 /* Set frames_to_send & nb_bufs so 898 * that packets are transmitted till 899 * previous frame. 900 */ 901 frames_to_send = loop; 902 nb_bufs = loop; 903 goto send_pkts; 904 } 905 } 906 seqn = mbuf->seqn; 907 if (seqn != DPAA_INVALID_MBUF_SEQN) { 908 index = seqn - 1; 909 if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) { 910 flags[loop] = 911 ((index & QM_EQCR_DCA_IDXMASK) << 8); 912 flags[loop] |= QMAN_ENQUEUE_FLAG_DCA; 913 DPAA_PER_LCORE_DQRR_SIZE--; 914 DPAA_PER_LCORE_DQRR_HELD &= 915 ~(1 << index); 916 } 917 } 918 } 919 920 send_pkts: 921 loop = 0; 922 while (loop < frames_to_send) { 923 loop += qman_enqueue_multi(q, &fd_arr[loop], 924 &flags[loop], 925 frames_to_send - loop); 926 } 927 nb_bufs -= frames_to_send; 928 sent += frames_to_send; 929 } 930 931 DPAA_DP_LOG(DEBUG, "Transmitted %d buffers on queue: %p", sent, q); 932 933 return sent; 934 } 935 936 uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused, 937 struct rte_mbuf **bufs __rte_unused, 938 uint16_t nb_bufs __rte_unused) 939 { 940 DPAA_DP_LOG(DEBUG, "Drop all packets"); 941 942 /* Drop all incoming packets. No need to free packets here 943 * because the rte_eth f/w frees up the packets through tx_buffer 944 * callback in case this functions returns count less than nb_bufs 945 */ 946 return 0; 947 } 948