1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 4 * Copyright 2017,2019 NXP 5 * 6 */ 7 8 /* System headers */ 9 #include <inttypes.h> 10 #include <unistd.h> 11 #include <stdio.h> 12 #include <limits.h> 13 #include <sched.h> 14 #include <pthread.h> 15 16 #include <rte_byteorder.h> 17 #include <rte_common.h> 18 #include <rte_interrupts.h> 19 #include <rte_log.h> 20 #include <rte_debug.h> 21 #include <rte_pci.h> 22 #include <rte_atomic.h> 23 #include <rte_branch_prediction.h> 24 #include <rte_memory.h> 25 #include <rte_tailq.h> 26 #include <rte_eal.h> 27 #include <rte_alarm.h> 28 #include <rte_ether.h> 29 #include <rte_ethdev_driver.h> 30 #include <rte_malloc.h> 31 #include <rte_ring.h> 32 #include <rte_ip.h> 33 #include <rte_tcp.h> 34 #include <rte_udp.h> 35 #include <rte_net.h> 36 #include <rte_eventdev.h> 37 38 #include "dpaa_ethdev.h" 39 #include "dpaa_rxtx.h" 40 #include <rte_dpaa_bus.h> 41 #include <dpaa_mempool.h> 42 43 #include <qman.h> 44 #include <fsl_usd.h> 45 #include <fsl_qman.h> 46 #include <fsl_bman.h> 47 #include <of.h> 48 #include <netcfg.h> 49 50 #define DPAA_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid) \ 51 do { \ 52 (_fd)->cmd = 0; \ 53 (_fd)->opaque_addr = 0; \ 54 (_fd)->opaque = QM_FD_CONTIG << DPAA_FD_FORMAT_SHIFT; \ 55 (_fd)->opaque |= ((_mbuf)->data_off) << DPAA_FD_OFFSET_SHIFT; \ 56 (_fd)->opaque |= (_mbuf)->pkt_len; \ 57 (_fd)->addr = (_mbuf)->buf_iova; \ 58 (_fd)->bpid = _bpid; \ 59 } while (0) 60 61 #if (defined RTE_LIBRTE_DPAA_DEBUG_DRIVER) 62 static void dpaa_display_frame(const struct qm_fd *fd) 63 { 64 int ii; 65 char *ptr; 66 67 printf("%s::bpid %x addr %08x%08x, format %d off %d, len %d stat %x\n", 68 __func__, fd->bpid, fd->addr_hi, fd->addr_lo, fd->format, 69 fd->offset, fd->length20, fd->status); 70 71 ptr = (char *)rte_dpaa_mem_ptov(fd->addr); 72 ptr += fd->offset; 73 printf("%02x ", *ptr); 74 for (ii = 1; ii < fd->length20; ii++) { 75 printf("%02x ", *ptr); 76 if ((ii % 16) == 0) 77 printf("\n"); 78 ptr++; 79 } 80 printf("\n"); 81 } 82 #else 83 #define dpaa_display_frame(a) 84 #endif 85 86 static inline void dpaa_slow_parsing(struct rte_mbuf *m __rte_unused, 87 uint64_t prs __rte_unused) 88 { 89 DPAA_DP_LOG(DEBUG, "Slow parsing"); 90 /*TBD:XXX: to be implemented*/ 91 } 92 93 static inline void dpaa_eth_packet_info(struct rte_mbuf *m, void *fd_virt_addr) 94 { 95 struct annotations_t *annot = GET_ANNOTATIONS(fd_virt_addr); 96 uint64_t prs = *((uintptr_t *)(&annot->parse)) & DPAA_PARSE_MASK; 97 98 DPAA_DP_LOG(DEBUG, " Parsing mbuf: %p with annotations: %p", m, annot); 99 100 switch (prs) { 101 case DPAA_PKT_TYPE_IPV4: 102 m->packet_type = RTE_PTYPE_L2_ETHER | 103 RTE_PTYPE_L3_IPV4; 104 break; 105 case DPAA_PKT_TYPE_IPV6: 106 m->packet_type = RTE_PTYPE_L2_ETHER | 107 RTE_PTYPE_L3_IPV6; 108 break; 109 case DPAA_PKT_TYPE_ETHER: 110 m->packet_type = RTE_PTYPE_L2_ETHER; 111 break; 112 case DPAA_PKT_TYPE_IPV4_FRAG: 113 case DPAA_PKT_TYPE_IPV4_FRAG_UDP: 114 case DPAA_PKT_TYPE_IPV4_FRAG_TCP: 115 case DPAA_PKT_TYPE_IPV4_FRAG_SCTP: 116 m->packet_type = RTE_PTYPE_L2_ETHER | 117 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_FRAG; 118 break; 119 case DPAA_PKT_TYPE_IPV6_FRAG: 120 case DPAA_PKT_TYPE_IPV6_FRAG_UDP: 121 case DPAA_PKT_TYPE_IPV6_FRAG_TCP: 122 case DPAA_PKT_TYPE_IPV6_FRAG_SCTP: 123 m->packet_type = RTE_PTYPE_L2_ETHER | 124 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_FRAG; 125 break; 126 case DPAA_PKT_TYPE_IPV4_EXT: 127 m->packet_type = RTE_PTYPE_L2_ETHER | 128 RTE_PTYPE_L3_IPV4_EXT; 129 break; 130 case DPAA_PKT_TYPE_IPV6_EXT: 131 m->packet_type = RTE_PTYPE_L2_ETHER | 132 RTE_PTYPE_L3_IPV6_EXT; 133 break; 134 case DPAA_PKT_TYPE_IPV4_TCP: 135 m->packet_type = RTE_PTYPE_L2_ETHER | 136 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_TCP; 137 break; 138 case DPAA_PKT_TYPE_IPV6_TCP: 139 m->packet_type = RTE_PTYPE_L2_ETHER | 140 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_TCP; 141 break; 142 case DPAA_PKT_TYPE_IPV4_UDP: 143 m->packet_type = RTE_PTYPE_L2_ETHER | 144 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_UDP; 145 break; 146 case DPAA_PKT_TYPE_IPV6_UDP: 147 m->packet_type = RTE_PTYPE_L2_ETHER | 148 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_UDP; 149 break; 150 case DPAA_PKT_TYPE_IPV4_EXT_UDP: 151 m->packet_type = RTE_PTYPE_L2_ETHER | 152 RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_UDP; 153 break; 154 case DPAA_PKT_TYPE_IPV6_EXT_UDP: 155 m->packet_type = RTE_PTYPE_L2_ETHER | 156 RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_UDP; 157 break; 158 case DPAA_PKT_TYPE_IPV4_EXT_TCP: 159 m->packet_type = RTE_PTYPE_L2_ETHER | 160 RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_TCP; 161 break; 162 case DPAA_PKT_TYPE_IPV6_EXT_TCP: 163 m->packet_type = RTE_PTYPE_L2_ETHER | 164 RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_TCP; 165 break; 166 case DPAA_PKT_TYPE_IPV4_SCTP: 167 m->packet_type = RTE_PTYPE_L2_ETHER | 168 RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_SCTP; 169 break; 170 case DPAA_PKT_TYPE_IPV6_SCTP: 171 m->packet_type = RTE_PTYPE_L2_ETHER | 172 RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_SCTP; 173 break; 174 case DPAA_PKT_TYPE_NONE: 175 m->packet_type = 0; 176 break; 177 /* More switch cases can be added */ 178 default: 179 dpaa_slow_parsing(m, prs); 180 } 181 182 m->tx_offload = annot->parse.ip_off[0]; 183 m->tx_offload |= (annot->parse.l4_off - annot->parse.ip_off[0]) 184 << DPAA_PKT_L3_LEN_SHIFT; 185 186 /* Set the hash values */ 187 m->hash.rss = (uint32_t)(annot->hash); 188 /* All packets with Bad checksum are dropped by interface (and 189 * corresponding notification issued to RX error queues). 190 */ 191 m->ol_flags = PKT_RX_RSS_HASH | PKT_RX_IP_CKSUM_GOOD; 192 193 /* Check if Vlan is present */ 194 if (prs & DPAA_PARSE_VLAN_MASK) 195 m->ol_flags |= PKT_RX_VLAN; 196 /* Packet received without stripping the vlan */ 197 } 198 199 static inline void dpaa_checksum(struct rte_mbuf *mbuf) 200 { 201 struct rte_ether_hdr *eth_hdr = 202 rte_pktmbuf_mtod(mbuf, struct rte_ether_hdr *); 203 char *l3_hdr = (char *)eth_hdr + mbuf->l2_len; 204 struct rte_ipv4_hdr *ipv4_hdr = (struct rte_ipv4_hdr *)l3_hdr; 205 struct rte_ipv6_hdr *ipv6_hdr = (struct rte_ipv6_hdr *)l3_hdr; 206 207 DPAA_DP_LOG(DEBUG, "Calculating checksum for mbuf: %p", mbuf); 208 209 if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) || 210 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 211 RTE_PTYPE_L3_IPV4_EXT)) { 212 ipv4_hdr = (struct rte_ipv4_hdr *)l3_hdr; 213 ipv4_hdr->hdr_checksum = 0; 214 ipv4_hdr->hdr_checksum = rte_ipv4_cksum(ipv4_hdr); 215 } else if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 216 RTE_PTYPE_L3_IPV6) || 217 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 218 RTE_PTYPE_L3_IPV6_EXT)) 219 ipv6_hdr = (struct rte_ipv6_hdr *)l3_hdr; 220 221 if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP) { 222 struct rte_tcp_hdr *tcp_hdr = (struct rte_tcp_hdr *)(l3_hdr + 223 mbuf->l3_len); 224 tcp_hdr->cksum = 0; 225 if (eth_hdr->ether_type == htons(RTE_ETHER_TYPE_IPv4)) 226 tcp_hdr->cksum = rte_ipv4_udptcp_cksum(ipv4_hdr, 227 tcp_hdr); 228 else /* assume ethertype == RTE_ETHER_TYPE_IPv6 */ 229 tcp_hdr->cksum = rte_ipv6_udptcp_cksum(ipv6_hdr, 230 tcp_hdr); 231 } else if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == 232 RTE_PTYPE_L4_UDP) { 233 struct rte_udp_hdr *udp_hdr = (struct rte_udp_hdr *)(l3_hdr + 234 mbuf->l3_len); 235 udp_hdr->dgram_cksum = 0; 236 if (eth_hdr->ether_type == htons(RTE_ETHER_TYPE_IPv4)) 237 udp_hdr->dgram_cksum = rte_ipv4_udptcp_cksum(ipv4_hdr, 238 udp_hdr); 239 else /* assume ethertype == RTE_ETHER_TYPE_IPv6 */ 240 udp_hdr->dgram_cksum = rte_ipv6_udptcp_cksum(ipv6_hdr, 241 udp_hdr); 242 } 243 } 244 245 static inline void dpaa_checksum_offload(struct rte_mbuf *mbuf, 246 struct qm_fd *fd, char *prs_buf) 247 { 248 struct dpaa_eth_parse_results_t *prs; 249 250 DPAA_DP_LOG(DEBUG, " Offloading checksum for mbuf: %p", mbuf); 251 252 prs = GET_TX_PRS(prs_buf); 253 prs->l3r = 0; 254 prs->l4r = 0; 255 if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) || 256 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 257 RTE_PTYPE_L3_IPV4_EXT)) 258 prs->l3r = DPAA_L3_PARSE_RESULT_IPV4; 259 else if (((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 260 RTE_PTYPE_L3_IPV6) || 261 ((mbuf->packet_type & RTE_PTYPE_L3_MASK) == 262 RTE_PTYPE_L3_IPV6_EXT)) 263 prs->l3r = DPAA_L3_PARSE_RESULT_IPV6; 264 265 if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP) 266 prs->l4r = DPAA_L4_PARSE_RESULT_TCP; 267 else if ((mbuf->packet_type & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_UDP) 268 prs->l4r = DPAA_L4_PARSE_RESULT_UDP; 269 270 prs->ip_off[0] = mbuf->l2_len; 271 prs->l4_off = mbuf->l3_len + mbuf->l2_len; 272 /* Enable L3 (and L4, if TCP or UDP) HW checksum*/ 273 fd->cmd = DPAA_FD_CMD_RPD | DPAA_FD_CMD_DTC; 274 } 275 276 static inline void 277 dpaa_unsegmented_checksum(struct rte_mbuf *mbuf, struct qm_fd *fd_arr) 278 { 279 if (!mbuf->packet_type) { 280 struct rte_net_hdr_lens hdr_lens; 281 282 mbuf->packet_type = rte_net_get_ptype(mbuf, &hdr_lens, 283 RTE_PTYPE_L2_MASK | RTE_PTYPE_L3_MASK 284 | RTE_PTYPE_L4_MASK); 285 mbuf->l2_len = hdr_lens.l2_len; 286 mbuf->l3_len = hdr_lens.l3_len; 287 } 288 if (mbuf->data_off < (DEFAULT_TX_ICEOF + 289 sizeof(struct dpaa_eth_parse_results_t))) { 290 DPAA_DP_LOG(DEBUG, "Checksum offload Err: " 291 "Not enough Headroom " 292 "space for correct Checksum offload." 293 "So Calculating checksum in Software."); 294 dpaa_checksum(mbuf); 295 } else { 296 dpaa_checksum_offload(mbuf, fd_arr, mbuf->buf_addr); 297 } 298 } 299 300 struct rte_mbuf * 301 dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid) 302 { 303 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(fd->bpid); 304 struct rte_mbuf *first_seg, *prev_seg, *cur_seg, *temp; 305 struct qm_sg_entry *sgt, *sg_temp; 306 void *vaddr, *sg_vaddr; 307 int i = 0; 308 uint8_t fd_offset = fd->offset; 309 310 vaddr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); 311 if (!vaddr) { 312 DPAA_PMD_ERR("unable to convert physical address"); 313 return NULL; 314 } 315 sgt = vaddr + fd_offset; 316 sg_temp = &sgt[i++]; 317 hw_sg_to_cpu(sg_temp); 318 temp = (struct rte_mbuf *)((char *)vaddr - bp_info->meta_data_size); 319 sg_vaddr = DPAA_MEMPOOL_PTOV(bp_info, qm_sg_entry_get64(sg_temp)); 320 321 first_seg = (struct rte_mbuf *)((char *)sg_vaddr - 322 bp_info->meta_data_size); 323 first_seg->data_off = sg_temp->offset; 324 first_seg->data_len = sg_temp->length; 325 first_seg->pkt_len = sg_temp->length; 326 rte_mbuf_refcnt_set(first_seg, 1); 327 328 first_seg->port = ifid; 329 first_seg->nb_segs = 1; 330 first_seg->ol_flags = 0; 331 prev_seg = first_seg; 332 while (i < DPAA_SGT_MAX_ENTRIES) { 333 sg_temp = &sgt[i++]; 334 hw_sg_to_cpu(sg_temp); 335 sg_vaddr = DPAA_MEMPOOL_PTOV(bp_info, 336 qm_sg_entry_get64(sg_temp)); 337 cur_seg = (struct rte_mbuf *)((char *)sg_vaddr - 338 bp_info->meta_data_size); 339 cur_seg->data_off = sg_temp->offset; 340 cur_seg->data_len = sg_temp->length; 341 first_seg->pkt_len += sg_temp->length; 342 first_seg->nb_segs += 1; 343 rte_mbuf_refcnt_set(cur_seg, 1); 344 prev_seg->next = cur_seg; 345 if (sg_temp->final) { 346 cur_seg->next = NULL; 347 break; 348 } 349 prev_seg = cur_seg; 350 } 351 DPAA_DP_LOG(DEBUG, "Received an SG frame len =%d, num_sg =%d", 352 first_seg->pkt_len, first_seg->nb_segs); 353 354 dpaa_eth_packet_info(first_seg, vaddr); 355 rte_pktmbuf_free_seg(temp); 356 357 return first_seg; 358 } 359 360 static inline struct rte_mbuf * 361 dpaa_eth_fd_to_mbuf(const struct qm_fd *fd, uint32_t ifid) 362 { 363 struct rte_mbuf *mbuf; 364 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(fd->bpid); 365 void *ptr; 366 uint8_t format = 367 (fd->opaque & DPAA_FD_FORMAT_MASK) >> DPAA_FD_FORMAT_SHIFT; 368 uint16_t offset; 369 uint32_t length; 370 371 if (unlikely(format == qm_fd_sg)) 372 return dpaa_eth_sg_to_mbuf(fd, ifid); 373 374 offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> DPAA_FD_OFFSET_SHIFT; 375 length = fd->opaque & DPAA_FD_LENGTH_MASK; 376 377 DPAA_DP_LOG(DEBUG, " FD--->MBUF off %d len = %d", offset, length); 378 379 /* Ignoring case when format != qm_fd_contig */ 380 dpaa_display_frame(fd); 381 ptr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); 382 383 mbuf = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); 384 /* Prefetch the Parse results and packet data to L1 */ 385 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 386 387 mbuf->data_off = offset; 388 mbuf->data_len = length; 389 mbuf->pkt_len = length; 390 391 mbuf->port = ifid; 392 mbuf->nb_segs = 1; 393 mbuf->ol_flags = 0; 394 mbuf->next = NULL; 395 rte_mbuf_refcnt_set(mbuf, 1); 396 dpaa_eth_packet_info(mbuf, mbuf->buf_addr); 397 398 return mbuf; 399 } 400 401 /* Specific for LS1043 */ 402 void 403 dpaa_rx_cb_no_prefetch(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, 404 void **bufs, int num_bufs) 405 { 406 struct rte_mbuf *mbuf; 407 struct dpaa_bp_info *bp_info; 408 const struct qm_fd *fd; 409 void *ptr; 410 struct dpaa_if *dpaa_intf; 411 uint16_t offset, i; 412 uint32_t length; 413 uint8_t format; 414 415 bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[0]->fd.bpid); 416 ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[0]->fd)); 417 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 418 bufs[0] = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); 419 420 for (i = 0; i < num_bufs; i++) { 421 if (i < num_bufs - 1) { 422 bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[i + 1]->fd.bpid); 423 ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[i + 1]->fd)); 424 rte_prefetch0((void *)((uint8_t *)ptr + 425 DEFAULT_RX_ICEOF)); 426 bufs[i + 1] = (struct rte_mbuf *)((char *)ptr - 427 bp_info->meta_data_size); 428 } 429 430 fd = &dqrr[i]->fd; 431 dpaa_intf = fq[0]->dpaa_intf; 432 433 format = (fd->opaque & DPAA_FD_FORMAT_MASK) >> 434 DPAA_FD_FORMAT_SHIFT; 435 if (unlikely(format == qm_fd_sg)) { 436 bufs[i] = dpaa_eth_sg_to_mbuf(fd, dpaa_intf->ifid); 437 continue; 438 } 439 440 offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> 441 DPAA_FD_OFFSET_SHIFT; 442 length = fd->opaque & DPAA_FD_LENGTH_MASK; 443 444 mbuf = bufs[i]; 445 mbuf->data_off = offset; 446 mbuf->data_len = length; 447 mbuf->pkt_len = length; 448 mbuf->port = dpaa_intf->ifid; 449 450 mbuf->nb_segs = 1; 451 mbuf->ol_flags = 0; 452 mbuf->next = NULL; 453 rte_mbuf_refcnt_set(mbuf, 1); 454 dpaa_eth_packet_info(mbuf, mbuf->buf_addr); 455 } 456 } 457 458 void 459 dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, 460 void **bufs, int num_bufs) 461 { 462 struct rte_mbuf *mbuf; 463 const struct qm_fd *fd; 464 struct dpaa_if *dpaa_intf; 465 uint16_t offset, i; 466 uint32_t length; 467 uint8_t format; 468 469 for (i = 0; i < num_bufs; i++) { 470 fd = &dqrr[i]->fd; 471 dpaa_intf = fq[0]->dpaa_intf; 472 473 format = (fd->opaque & DPAA_FD_FORMAT_MASK) >> 474 DPAA_FD_FORMAT_SHIFT; 475 if (unlikely(format == qm_fd_sg)) { 476 bufs[i] = dpaa_eth_sg_to_mbuf(fd, dpaa_intf->ifid); 477 continue; 478 } 479 480 offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> 481 DPAA_FD_OFFSET_SHIFT; 482 length = fd->opaque & DPAA_FD_LENGTH_MASK; 483 484 mbuf = bufs[i]; 485 mbuf->data_off = offset; 486 mbuf->data_len = length; 487 mbuf->pkt_len = length; 488 mbuf->port = dpaa_intf->ifid; 489 490 mbuf->nb_segs = 1; 491 mbuf->ol_flags = 0; 492 mbuf->next = NULL; 493 rte_mbuf_refcnt_set(mbuf, 1); 494 dpaa_eth_packet_info(mbuf, mbuf->buf_addr); 495 } 496 } 497 498 void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs) 499 { 500 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(dq->fd.bpid); 501 void *ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dq->fd)); 502 503 /* In case of LS1046, annotation stashing is disabled due to L2 cache 504 * being bottleneck in case of multicore scanario for this platform. 505 * So we prefetch the annoation beforehand, so that it is available 506 * in cache when accessed. 507 */ 508 rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); 509 510 *bufs = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); 511 } 512 513 static uint16_t 514 dpaa_eth_queue_portal_rx(struct qman_fq *fq, 515 struct rte_mbuf **bufs, 516 uint16_t nb_bufs) 517 { 518 int ret; 519 520 if (unlikely(fq->qp == NULL)) { 521 ret = rte_dpaa_portal_fq_init((void *)0, fq); 522 if (ret) { 523 DPAA_PMD_ERR("Failure in affining portal %d", ret); 524 return 0; 525 } 526 } 527 528 return qman_portal_poll_rx(nb_bufs, (void **)bufs, fq->qp); 529 } 530 531 enum qman_cb_dqrr_result 532 dpaa_rx_cb_parallel(void *event, 533 struct qman_portal *qm __always_unused, 534 struct qman_fq *fq, 535 const struct qm_dqrr_entry *dqrr, 536 void **bufs) 537 { 538 u32 ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 539 struct rte_mbuf *mbuf; 540 struct rte_event *ev = (struct rte_event *)event; 541 542 mbuf = dpaa_eth_fd_to_mbuf(&dqrr->fd, ifid); 543 ev->event_ptr = (void *)mbuf; 544 ev->flow_id = fq->ev.flow_id; 545 ev->sub_event_type = fq->ev.sub_event_type; 546 ev->event_type = RTE_EVENT_TYPE_ETHDEV; 547 ev->op = RTE_EVENT_OP_NEW; 548 ev->sched_type = fq->ev.sched_type; 549 ev->queue_id = fq->ev.queue_id; 550 ev->priority = fq->ev.priority; 551 ev->impl_opaque = (uint8_t)DPAA_INVALID_MBUF_SEQN; 552 mbuf->seqn = DPAA_INVALID_MBUF_SEQN; 553 *bufs = mbuf; 554 555 return qman_cb_dqrr_consume; 556 } 557 558 enum qman_cb_dqrr_result 559 dpaa_rx_cb_atomic(void *event, 560 struct qman_portal *qm __always_unused, 561 struct qman_fq *fq, 562 const struct qm_dqrr_entry *dqrr, 563 void **bufs) 564 { 565 u8 index; 566 u32 ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 567 struct rte_mbuf *mbuf; 568 struct rte_event *ev = (struct rte_event *)event; 569 570 mbuf = dpaa_eth_fd_to_mbuf(&dqrr->fd, ifid); 571 ev->event_ptr = (void *)mbuf; 572 ev->flow_id = fq->ev.flow_id; 573 ev->sub_event_type = fq->ev.sub_event_type; 574 ev->event_type = RTE_EVENT_TYPE_ETHDEV; 575 ev->op = RTE_EVENT_OP_NEW; 576 ev->sched_type = fq->ev.sched_type; 577 ev->queue_id = fq->ev.queue_id; 578 ev->priority = fq->ev.priority; 579 580 /* Save active dqrr entries */ 581 index = DQRR_PTR2IDX(dqrr); 582 DPAA_PER_LCORE_DQRR_SIZE++; 583 DPAA_PER_LCORE_DQRR_HELD |= 1 << index; 584 DPAA_PER_LCORE_DQRR_MBUF(index) = mbuf; 585 ev->impl_opaque = index + 1; 586 mbuf->seqn = (uint32_t)index + 1; 587 *bufs = mbuf; 588 589 return qman_cb_dqrr_defer; 590 } 591 592 uint16_t dpaa_eth_queue_rx(void *q, 593 struct rte_mbuf **bufs, 594 uint16_t nb_bufs) 595 { 596 struct qman_fq *fq = q; 597 struct qm_dqrr_entry *dq; 598 uint32_t num_rx = 0, ifid = ((struct dpaa_if *)fq->dpaa_intf)->ifid; 599 int num_rx_bufs, ret; 600 uint32_t vdqcr_flags = 0; 601 602 if (unlikely(rte_dpaa_bpid_info == NULL && 603 rte_eal_process_type() == RTE_PROC_SECONDARY)) 604 rte_dpaa_bpid_info = fq->bp_array; 605 606 if (likely(fq->is_static)) 607 return dpaa_eth_queue_portal_rx(fq, bufs, nb_bufs); 608 609 if (unlikely(!RTE_PER_LCORE(dpaa_io))) { 610 ret = rte_dpaa_portal_init((void *)0); 611 if (ret) { 612 DPAA_PMD_ERR("Failure in affining portal"); 613 return 0; 614 } 615 } 616 617 /* Until request for four buffers, we provide exact number of buffers. 618 * Otherwise we do not set the QM_VDQCR_EXACT flag. 619 * Not setting QM_VDQCR_EXACT flag can provide two more buffers than 620 * requested, so we request two less in this case. 621 */ 622 if (nb_bufs < 4) { 623 vdqcr_flags = QM_VDQCR_EXACT; 624 num_rx_bufs = nb_bufs; 625 } else { 626 num_rx_bufs = nb_bufs > DPAA_MAX_DEQUEUE_NUM_FRAMES ? 627 (DPAA_MAX_DEQUEUE_NUM_FRAMES - 2) : (nb_bufs - 2); 628 } 629 ret = qman_set_vdq(fq, num_rx_bufs, vdqcr_flags); 630 if (ret) 631 return 0; 632 633 do { 634 dq = qman_dequeue(fq); 635 if (!dq) 636 continue; 637 bufs[num_rx++] = dpaa_eth_fd_to_mbuf(&dq->fd, ifid); 638 qman_dqrr_consume(fq, dq); 639 } while (fq->flags & QMAN_FQ_STATE_VDQCR); 640 641 return num_rx; 642 } 643 644 static void *dpaa_get_pktbuf(struct dpaa_bp_info *bp_info) 645 { 646 int ret; 647 size_t buf = 0; 648 struct bm_buffer bufs; 649 650 ret = bman_acquire(bp_info->bp, &bufs, 1, 0); 651 if (ret <= 0) { 652 DPAA_PMD_WARN("Failed to allocate buffers %d", ret); 653 return (void *)buf; 654 } 655 656 DPAA_DP_LOG(DEBUG, "got buffer 0x%" PRIx64 " from pool %d", 657 (uint64_t)bufs.addr, bufs.bpid); 658 659 buf = (size_t)DPAA_MEMPOOL_PTOV(bp_info, bufs.addr) 660 - bp_info->meta_data_size; 661 if (!buf) 662 goto out; 663 664 out: 665 return (void *)buf; 666 } 667 668 static struct rte_mbuf *dpaa_get_dmable_mbuf(struct rte_mbuf *mbuf, 669 struct dpaa_if *dpaa_intf) 670 { 671 struct rte_mbuf *dpaa_mbuf; 672 673 /* allocate pktbuffer on bpid for dpaa port */ 674 dpaa_mbuf = dpaa_get_pktbuf(dpaa_intf->bp_info); 675 if (!dpaa_mbuf) 676 return NULL; 677 678 memcpy((uint8_t *)(dpaa_mbuf->buf_addr) + RTE_PKTMBUF_HEADROOM, (void *) 679 ((uint8_t *)(mbuf->buf_addr) + mbuf->data_off), mbuf->pkt_len); 680 681 /* Copy only the required fields */ 682 dpaa_mbuf->data_off = RTE_PKTMBUF_HEADROOM; 683 dpaa_mbuf->pkt_len = mbuf->pkt_len; 684 dpaa_mbuf->ol_flags = mbuf->ol_flags; 685 dpaa_mbuf->packet_type = mbuf->packet_type; 686 dpaa_mbuf->tx_offload = mbuf->tx_offload; 687 rte_pktmbuf_free(mbuf); 688 return dpaa_mbuf; 689 } 690 691 int 692 dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf, 693 struct qm_fd *fd, 694 uint32_t bpid) 695 { 696 struct rte_mbuf *cur_seg = mbuf, *prev_seg = NULL; 697 struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(bpid); 698 struct rte_mbuf *temp, *mi; 699 struct qm_sg_entry *sg_temp, *sgt; 700 int i = 0; 701 702 DPAA_DP_LOG(DEBUG, "Creating SG FD to transmit"); 703 704 temp = rte_pktmbuf_alloc(bp_info->mp); 705 if (!temp) { 706 DPAA_PMD_ERR("Failure in allocation of mbuf"); 707 return -1; 708 } 709 if (temp->buf_len < ((mbuf->nb_segs * sizeof(struct qm_sg_entry)) 710 + temp->data_off)) { 711 DPAA_PMD_ERR("Insufficient space in mbuf for SG entries"); 712 return -1; 713 } 714 715 fd->cmd = 0; 716 fd->opaque_addr = 0; 717 718 if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK) { 719 if (!mbuf->packet_type) { 720 struct rte_net_hdr_lens hdr_lens; 721 722 mbuf->packet_type = rte_net_get_ptype(mbuf, &hdr_lens, 723 RTE_PTYPE_L2_MASK | RTE_PTYPE_L3_MASK 724 | RTE_PTYPE_L4_MASK); 725 mbuf->l2_len = hdr_lens.l2_len; 726 mbuf->l3_len = hdr_lens.l3_len; 727 } 728 if (temp->data_off < DEFAULT_TX_ICEOF 729 + sizeof(struct dpaa_eth_parse_results_t)) 730 temp->data_off = DEFAULT_TX_ICEOF 731 + sizeof(struct dpaa_eth_parse_results_t); 732 dcbz_64(temp->buf_addr); 733 dpaa_checksum_offload(mbuf, fd, temp->buf_addr); 734 } 735 736 sgt = temp->buf_addr + temp->data_off; 737 fd->format = QM_FD_SG; 738 fd->addr = temp->buf_iova; 739 fd->offset = temp->data_off; 740 fd->bpid = bpid; 741 fd->length20 = mbuf->pkt_len; 742 743 while (i < DPAA_SGT_MAX_ENTRIES) { 744 sg_temp = &sgt[i++]; 745 sg_temp->opaque = 0; 746 sg_temp->val = 0; 747 sg_temp->addr = cur_seg->buf_iova; 748 sg_temp->offset = cur_seg->data_off; 749 sg_temp->length = cur_seg->data_len; 750 if (RTE_MBUF_DIRECT(cur_seg)) { 751 if (rte_mbuf_refcnt_read(cur_seg) > 1) { 752 /*If refcnt > 1, invalid bpid is set to ensure 753 * buffer is not freed by HW. 754 */ 755 sg_temp->bpid = 0xff; 756 rte_mbuf_refcnt_update(cur_seg, -1); 757 } else { 758 sg_temp->bpid = 759 DPAA_MEMPOOL_TO_BPID(cur_seg->pool); 760 } 761 cur_seg = cur_seg->next; 762 } else { 763 /* Get owner MBUF from indirect buffer */ 764 mi = rte_mbuf_from_indirect(cur_seg); 765 if (rte_mbuf_refcnt_read(mi) > 1) { 766 /*If refcnt > 1, invalid bpid is set to ensure 767 * owner buffer is not freed by HW. 768 */ 769 sg_temp->bpid = 0xff; 770 } else { 771 sg_temp->bpid = DPAA_MEMPOOL_TO_BPID(mi->pool); 772 rte_mbuf_refcnt_update(mi, 1); 773 } 774 prev_seg = cur_seg; 775 cur_seg = cur_seg->next; 776 prev_seg->next = NULL; 777 rte_pktmbuf_free(prev_seg); 778 } 779 if (cur_seg == NULL) { 780 sg_temp->final = 1; 781 cpu_to_hw_sg(sg_temp); 782 break; 783 } 784 cpu_to_hw_sg(sg_temp); 785 } 786 return 0; 787 } 788 789 /* Handle mbufs which are not segmented (non SG) */ 790 static inline void 791 tx_on_dpaa_pool_unsegmented(struct rte_mbuf *mbuf, 792 struct dpaa_bp_info *bp_info, 793 struct qm_fd *fd_arr) 794 { 795 struct rte_mbuf *mi = NULL; 796 797 if (RTE_MBUF_DIRECT(mbuf)) { 798 if (rte_mbuf_refcnt_read(mbuf) > 1) { 799 /* In case of direct mbuf and mbuf being cloned, 800 * BMAN should _not_ release buffer. 801 */ 802 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, 0xff); 803 /* Buffer should be releasd by EAL */ 804 rte_mbuf_refcnt_update(mbuf, -1); 805 } else { 806 /* In case of direct mbuf and no cloning, mbuf can be 807 * released by BMAN. 808 */ 809 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, bp_info->bpid); 810 } 811 } else { 812 /* This is data-containing core mbuf: 'mi' */ 813 mi = rte_mbuf_from_indirect(mbuf); 814 if (rte_mbuf_refcnt_read(mi) > 1) { 815 /* In case of indirect mbuf, and mbuf being cloned, 816 * BMAN should _not_ release it and let EAL release 817 * it through pktmbuf_free below. 818 */ 819 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, 0xff); 820 } else { 821 /* In case of indirect mbuf, and no cloning, core mbuf 822 * should be released by BMAN. 823 * Increate refcnt of core mbuf so that when 824 * pktmbuf_free is called and mbuf is released, EAL 825 * doesn't try to release core mbuf which would have 826 * been released by BMAN. 827 */ 828 rte_mbuf_refcnt_update(mi, 1); 829 DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, bp_info->bpid); 830 } 831 rte_pktmbuf_free(mbuf); 832 } 833 834 if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK) 835 dpaa_unsegmented_checksum(mbuf, fd_arr); 836 } 837 838 /* Handle all mbufs on dpaa BMAN managed pool */ 839 static inline uint16_t 840 tx_on_dpaa_pool(struct rte_mbuf *mbuf, 841 struct dpaa_bp_info *bp_info, 842 struct qm_fd *fd_arr) 843 { 844 DPAA_DP_LOG(DEBUG, "BMAN offloaded buffer, mbuf: %p", mbuf); 845 846 if (mbuf->nb_segs == 1) { 847 /* Case for non-segmented buffers */ 848 tx_on_dpaa_pool_unsegmented(mbuf, bp_info, fd_arr); 849 } else if (mbuf->nb_segs > 1 && 850 mbuf->nb_segs <= DPAA_SGT_MAX_ENTRIES) { 851 if (dpaa_eth_mbuf_to_sg_fd(mbuf, fd_arr, bp_info->bpid)) { 852 DPAA_PMD_DEBUG("Unable to create Scatter Gather FD"); 853 return 1; 854 } 855 } else { 856 DPAA_PMD_DEBUG("Number of Segments not supported"); 857 return 1; 858 } 859 860 return 0; 861 } 862 863 /* Handle all mbufs on an external pool (non-dpaa) */ 864 static inline uint16_t 865 tx_on_external_pool(struct qman_fq *txq, struct rte_mbuf *mbuf, 866 struct qm_fd *fd_arr) 867 { 868 struct dpaa_if *dpaa_intf = txq->dpaa_intf; 869 struct rte_mbuf *dmable_mbuf; 870 871 DPAA_DP_LOG(DEBUG, "Non-BMAN offloaded buffer." 872 "Allocating an offloaded buffer"); 873 dmable_mbuf = dpaa_get_dmable_mbuf(mbuf, dpaa_intf); 874 if (!dmable_mbuf) { 875 DPAA_DP_LOG(DEBUG, "no dpaa buffers."); 876 return 1; 877 } 878 879 DPAA_MBUF_TO_CONTIG_FD(dmable_mbuf, fd_arr, dpaa_intf->bp_info->bpid); 880 if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK) 881 dpaa_unsegmented_checksum(mbuf, fd_arr); 882 883 return 0; 884 } 885 886 uint16_t 887 dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) 888 { 889 struct rte_mbuf *mbuf, *mi = NULL; 890 struct rte_mempool *mp; 891 struct dpaa_bp_info *bp_info; 892 struct qm_fd fd_arr[DPAA_TX_BURST_SIZE]; 893 uint32_t frames_to_send, loop, sent = 0; 894 uint16_t state; 895 int ret; 896 uint32_t seqn, index, flags[DPAA_TX_BURST_SIZE] = {0}; 897 898 if (unlikely(!RTE_PER_LCORE(dpaa_io))) { 899 ret = rte_dpaa_portal_init((void *)0); 900 if (ret) { 901 DPAA_PMD_ERR("Failure in affining portal"); 902 return 0; 903 } 904 } 905 906 DPAA_DP_LOG(DEBUG, "Transmitting %d buffers on queue: %p", nb_bufs, q); 907 908 while (nb_bufs) { 909 frames_to_send = (nb_bufs > DPAA_TX_BURST_SIZE) ? 910 DPAA_TX_BURST_SIZE : nb_bufs; 911 for (loop = 0; loop < frames_to_send; loop++) { 912 mbuf = *(bufs++); 913 seqn = mbuf->seqn; 914 if (seqn != DPAA_INVALID_MBUF_SEQN) { 915 index = seqn - 1; 916 if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) { 917 flags[loop] = 918 ((index & QM_EQCR_DCA_IDXMASK) << 8); 919 flags[loop] |= QMAN_ENQUEUE_FLAG_DCA; 920 DPAA_PER_LCORE_DQRR_SIZE--; 921 DPAA_PER_LCORE_DQRR_HELD &= 922 ~(1 << index); 923 } 924 } 925 926 if (likely(RTE_MBUF_DIRECT(mbuf))) { 927 mp = mbuf->pool; 928 bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 929 if (likely(mp->ops_index == 930 bp_info->dpaa_ops_index && 931 mbuf->nb_segs == 1 && 932 rte_mbuf_refcnt_read(mbuf) == 1)) { 933 DPAA_MBUF_TO_CONTIG_FD(mbuf, 934 &fd_arr[loop], bp_info->bpid); 935 if (mbuf->ol_flags & 936 DPAA_TX_CKSUM_OFFLOAD_MASK) 937 dpaa_unsegmented_checksum(mbuf, 938 &fd_arr[loop]); 939 continue; 940 } 941 } else { 942 mi = rte_mbuf_from_indirect(mbuf); 943 mp = mi->pool; 944 } 945 946 bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 947 if (likely(mp->ops_index == bp_info->dpaa_ops_index)) { 948 state = tx_on_dpaa_pool(mbuf, bp_info, 949 &fd_arr[loop]); 950 if (unlikely(state)) { 951 /* Set frames_to_send & nb_bufs so 952 * that packets are transmitted till 953 * previous frame. 954 */ 955 frames_to_send = loop; 956 nb_bufs = loop; 957 goto send_pkts; 958 } 959 } else { 960 state = tx_on_external_pool(q, mbuf, 961 &fd_arr[loop]); 962 if (unlikely(state)) { 963 /* Set frames_to_send & nb_bufs so 964 * that packets are transmitted till 965 * previous frame. 966 */ 967 frames_to_send = loop; 968 nb_bufs = loop; 969 goto send_pkts; 970 } 971 } 972 } 973 974 send_pkts: 975 loop = 0; 976 while (loop < frames_to_send) { 977 loop += qman_enqueue_multi(q, &fd_arr[loop], 978 &flags[loop], 979 frames_to_send - loop); 980 } 981 nb_bufs -= frames_to_send; 982 sent += frames_to_send; 983 } 984 985 DPAA_DP_LOG(DEBUG, "Transmitted %d buffers on queue: %p", sent, q); 986 987 return sent; 988 } 989 990 uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused, 991 struct rte_mbuf **bufs __rte_unused, 992 uint16_t nb_bufs __rte_unused) 993 { 994 DPAA_DP_LOG(DEBUG, "Drop all packets"); 995 996 /* Drop all incoming packets. No need to free packets here 997 * because the rte_eth f/w frees up the packets through tx_buffer 998 * callback in case this functions returns count less than nb_bufs 999 */ 1000 return 0; 1001 } 1002