xref: /dpdk/drivers/net/cxgbe/clip_tbl.h (revision e12a0166c80f65e35408f4715b2f3a60763c3741)
13f2c1e20SShagun Agrawal /* SPDX-License-Identifier: BSD-3-Clause
23f2c1e20SShagun Agrawal  * Copyright(c) 2018 Chelsio Communications.
33f2c1e20SShagun Agrawal  * All rights reserved.
43f2c1e20SShagun Agrawal  */
53f2c1e20SShagun Agrawal 
63f2c1e20SShagun Agrawal #ifndef _CXGBE_CLIP_H_
73f2c1e20SShagun Agrawal #define _CXGBE_CLIP_H_
83f2c1e20SShagun Agrawal 
93f2c1e20SShagun Agrawal /*
103f2c1e20SShagun Agrawal  * State for the corresponding entry of the HW CLIP table.
113f2c1e20SShagun Agrawal  */
123f2c1e20SShagun Agrawal struct clip_entry {
133f2c1e20SShagun Agrawal 	enum filter_type type;       /* entry type */
143f2c1e20SShagun Agrawal 	u32 addr[4];                 /* IPV4 or IPV6 address */
153f2c1e20SShagun Agrawal 	rte_spinlock_t lock;         /* entry lock */
16*e12a0166STyler Retzlaff 	RTE_ATOMIC(u32) refcnt;                  /* entry reference count */
173f2c1e20SShagun Agrawal };
183f2c1e20SShagun Agrawal 
193f2c1e20SShagun Agrawal struct clip_tbl {
203f2c1e20SShagun Agrawal 	unsigned int clipt_start;     /* start index of CLIP table */
213f2c1e20SShagun Agrawal 	unsigned int clipt_size;      /* size of CLIP table */
223f2c1e20SShagun Agrawal 	rte_rwlock_t lock;            /* table rw lock */
23013b4c52SBruce Richardson 	struct clip_entry cl_list[]; /* MUST BE LAST */
243f2c1e20SShagun Agrawal };
253f2c1e20SShagun Agrawal 
263f2c1e20SShagun Agrawal struct clip_tbl *t4_init_clip_tbl(unsigned int clipt_start,
273f2c1e20SShagun Agrawal 				  unsigned int clipt_end);
283f2c1e20SShagun Agrawal void t4_cleanup_clip_tbl(struct adapter *adap);
293f2c1e20SShagun Agrawal struct clip_entry *cxgbe_clip_alloc(struct rte_eth_dev *dev, u32 *lip);
303f2c1e20SShagun Agrawal void cxgbe_clip_release(struct rte_eth_dev *dev, struct clip_entry *ce);
313f2c1e20SShagun Agrawal #endif /* _CXGBE_CLIP_H_ */
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