1dd3e8765SAkhil Goyal /* SPDX-License-Identifier: BSD-3-Clause 2dd3e8765SAkhil Goyal * Copyright(C) 2023 Marvell. 3dd3e8765SAkhil Goyal */ 4dd3e8765SAkhil Goyal 5dd3e8765SAkhil Goyal #ifndef CNXK_ETHDEV_MCS_H 6dd3e8765SAkhil Goyal #define CNXK_ETHDEV_MCS_H 7dd3e8765SAkhil Goyal 8dd3e8765SAkhil Goyal #include <cnxk_ethdev.h> 9dd3e8765SAkhil Goyal 10dd3e8765SAkhil Goyal #define CNXK_MACSEC_HASH_KEY 16 11dd3e8765SAkhil Goyal 12dd3e8765SAkhil Goyal struct cnxk_mcs_dev { 13dd3e8765SAkhil Goyal uint64_t default_sci; 14dd3e8765SAkhil Goyal void *mdev; 15dd3e8765SAkhil Goyal uint8_t port_id; 16dd3e8765SAkhil Goyal uint8_t idx; 17dd3e8765SAkhil Goyal }; 18dd3e8765SAkhil Goyal 19ec0931b3SAkhil Goyal enum cnxk_mcs_rsrc_type { 20ec0931b3SAkhil Goyal CNXK_MCS_RSRC_TYPE_FLOWID, 21ec0931b3SAkhil Goyal CNXK_MCS_RSRC_TYPE_SECY, 22ec0931b3SAkhil Goyal CNXK_MCS_RSRC_TYPE_SC, 23ec0931b3SAkhil Goyal CNXK_MCS_RSRC_TYPE_SA, 24ec0931b3SAkhil Goyal CNXK_MCS_RSRC_TYPE_PORT, 25ec0931b3SAkhil Goyal }; 26ec0931b3SAkhil Goyal 2714598b31SAkhil Goyal struct cnxk_mcs_flow_opts { 2814598b31SAkhil Goyal uint32_t outer_tag_id; 2914598b31SAkhil Goyal /**< {VLAN_ID[11:0]}, or 20-bit MPLS label*/ 3014598b31SAkhil Goyal uint8_t outer_priority; 3114598b31SAkhil Goyal /**< {PCP/Pbits, DE/CFI} or {1'b0, EXP} for MPLS.*/ 3214598b31SAkhil Goyal uint32_t second_outer_tag_id; 3314598b31SAkhil Goyal /**< {VLAN_ID[11:0]}, or 20-bit MPLS label*/ 3414598b31SAkhil Goyal uint8_t second_outer_priority; 3514598b31SAkhil Goyal /**< {PCP/Pbits, DE/CFI} or {1'b0, EXP} for MPLS. */ 3614598b31SAkhil Goyal uint16_t bonus_data; 3714598b31SAkhil Goyal /**< 2 bytes of additional bonus data extracted from one of the custom tags*/ 3814598b31SAkhil Goyal uint8_t tag_match_bitmap; 3914598b31SAkhil Goyal uint8_t packet_type; 4014598b31SAkhil Goyal uint8_t outer_vlan_type; 4114598b31SAkhil Goyal uint8_t inner_vlan_type; 4214598b31SAkhil Goyal uint8_t num_tags; 4314598b31SAkhil Goyal bool express; 4414598b31SAkhil Goyal uint8_t lmac_id; 4514598b31SAkhil Goyal uint8_t flowid_user; 4614598b31SAkhil Goyal }; 4714598b31SAkhil Goyal 48dd3e8765SAkhil Goyal struct cnxk_mcs_event_data { 49dd3e8765SAkhil Goyal /* Valid for below events 50dd3e8765SAkhil Goyal * - ROC_MCS_EVENT_RX_SA_PN_SOFT_EXP 51dd3e8765SAkhil Goyal * - ROC_MCS_EVENT_TX_SA_PN_SOFT_EXP 52dd3e8765SAkhil Goyal */ 53dd3e8765SAkhil Goyal struct { 54dd3e8765SAkhil Goyal uint8_t secy_idx; 55dd3e8765SAkhil Goyal uint8_t sc_idx; 56dd3e8765SAkhil Goyal uint8_t sa_idx; 57dd3e8765SAkhil Goyal }; 58dd3e8765SAkhil Goyal /* Valid for below event 59dd3e8765SAkhil Goyal * - ROC_MCS_EVENT_FIFO_OVERFLOW 60dd3e8765SAkhil Goyal * 61dd3e8765SAkhil Goyal * Upon fatal error notification on a MCS port, driver resets below attributes of active 62dd3e8765SAkhil Goyal * flow entities(sc & sa) and then resets the port. 63dd3e8765SAkhil Goyal * - Reset NEXT_PN of active SAs to 1. 64dd3e8765SAkhil Goyal * - Reset TX active SA for each SC, TX_SA_ACTIVE = 0, SA_INDEX0_VLD = 1. 65dd3e8765SAkhil Goyal * - Clear SA_IN_USE for active ANs in RX_SA_MAP_MEM. 66dd3e8765SAkhil Goyal * - Clear all stats mapping to this port. 67dd3e8765SAkhil Goyal * - Reactivate SA_IN_USE for active ANs in RX_SA_MAP_MEM. 68dd3e8765SAkhil Goyal * 69dd3e8765SAkhil Goyal * UMD driver notifies the following flow entity(sc & sa) details in application callback, 70dd3e8765SAkhil Goyal * application is expected to exchange the Tx/Rx NEXT_PN, TX_SA_ACTIVE, active RX SC AN 71dd3e8765SAkhil Goyal * details with peer device so that peer device can resets it's MACsec flow states and than 72dd3e8765SAkhil Goyal * resume packet transfers. 73dd3e8765SAkhil Goyal */ 74dd3e8765SAkhil Goyal struct { 75dd3e8765SAkhil Goyal uint16_t *tx_sa_array; /* Tx SAs whose PN memories were reset (NEXT_PN=1) */ 76dd3e8765SAkhil Goyal uint16_t *rx_sa_array; /* Rx SAs whose PN memories were reset (NEXT_PN=1) */ 77dd3e8765SAkhil Goyal uint16_t *tx_sc_array; /* Tx SCs whose active SAs were reset (TX_SA_ACTIVE=0) */ 78dd3e8765SAkhil Goyal uint16_t *rx_sc_array; /* Rx SCs whose state was reset */ 79dd3e8765SAkhil Goyal uint8_t *sc_an_array; /* AN of Rx SCs(in rx_sc_array) which were reactivated */ 80dd3e8765SAkhil Goyal uint8_t num_tx_sa; /* num entries in tx_sa_array */ 81dd3e8765SAkhil Goyal uint8_t num_rx_sa; /* num entries in rx_sa_array */ 82dd3e8765SAkhil Goyal uint8_t num_tx_sc; /* num entries in tx_sc_array */ 83dd3e8765SAkhil Goyal uint8_t num_rx_sc; /* num entries in rx_sc_array */ 84dd3e8765SAkhil Goyal uint8_t lmac_id; /* lmac_id/port which was recovered from fatal error */ 85dd3e8765SAkhil Goyal }; 86dd3e8765SAkhil Goyal }; 87dd3e8765SAkhil Goyal 88dd3e8765SAkhil Goyal struct cnxk_mcs_event_desc { 89dd3e8765SAkhil Goyal struct rte_eth_dev *eth_dev; 90dd3e8765SAkhil Goyal enum roc_mcs_event_type type; 91dd3e8765SAkhil Goyal enum roc_mcs_event_subtype subtype; 92dd3e8765SAkhil Goyal struct cnxk_mcs_event_data metadata; 93dd3e8765SAkhil Goyal }; 94dd3e8765SAkhil Goyal 95ec0931b3SAkhil Goyal int cnxk_eth_macsec_sa_create(void *device, struct rte_security_macsec_sa *conf); 96ec0931b3SAkhil Goyal int cnxk_eth_macsec_sc_create(void *device, struct rte_security_macsec_sc *conf); 97ec0931b3SAkhil Goyal 98ec0931b3SAkhil Goyal int cnxk_eth_macsec_sa_destroy(void *device, uint16_t sa_id, 99ec0931b3SAkhil Goyal enum rte_security_macsec_direction dir); 100ec0931b3SAkhil Goyal int cnxk_eth_macsec_sc_destroy(void *device, uint16_t sc_id, 101ec0931b3SAkhil Goyal enum rte_security_macsec_direction dir); 102ec0931b3SAkhil Goyal 103*bc8147e6SAkhil Goyal int cnxk_eth_macsec_sa_stats_get(void *device, uint16_t sa_id, 104*bc8147e6SAkhil Goyal enum rte_security_macsec_direction dir, 105*bc8147e6SAkhil Goyal struct rte_security_macsec_sa_stats *stats); 106*bc8147e6SAkhil Goyal int cnxk_eth_macsec_sc_stats_get(void *device, uint16_t sa_id, 107*bc8147e6SAkhil Goyal enum rte_security_macsec_direction dir, 108*bc8147e6SAkhil Goyal struct rte_security_macsec_sc_stats *stats); 109*bc8147e6SAkhil Goyal int cnxk_eth_macsec_session_stats_get(struct cnxk_eth_dev *dev, struct cnxk_macsec_sess *sess, 110*bc8147e6SAkhil Goyal struct rte_security_stats *stats); 111*bc8147e6SAkhil Goyal 11214598b31SAkhil Goyal int cnxk_eth_macsec_session_create(struct cnxk_eth_dev *dev, struct rte_security_session_conf *conf, 11314598b31SAkhil Goyal struct rte_security_session *sess); 11414598b31SAkhil Goyal int cnxk_eth_macsec_session_destroy(struct cnxk_eth_dev *dev, struct rte_security_session *sess); 11514598b31SAkhil Goyal 116dd3e8765SAkhil Goyal #endif /* CNXK_ETHDEV_MCS_H */ 117