xref: /dpdk/drivers/net/cnxk/cn9k_ethdev.h (revision e77506397fc8005c5129e22e9e2d15d5876790fd)
15a4341c8SNithin Dabilpuram /* SPDX-License-Identifier: BSD-3-Clause
25a4341c8SNithin Dabilpuram  * Copyright(C) 2021 Marvell.
35a4341c8SNithin Dabilpuram  */
45a4341c8SNithin Dabilpuram #ifndef __CN9K_ETHDEV_H__
55a4341c8SNithin Dabilpuram #define __CN9K_ETHDEV_H__
65a4341c8SNithin Dabilpuram 
75a4341c8SNithin Dabilpuram #include <cnxk_ethdev.h>
87eabd6c6SNithin Dabilpuram #include <cnxk_security.h>
97206a1caSSrujana Challa #include <cnxk_security_ar.h>
105a4341c8SNithin Dabilpuram 
11a24af636SNithin Dabilpuram struct cn9k_eth_txq {
12ae2c2cb6SPavan Nikhilesh 	uint64_t send_hdr_w0;
13a24af636SNithin Dabilpuram 	int64_t fc_cache_pkts;
14a24af636SNithin Dabilpuram 	uint64_t *fc_mem;
15a24af636SNithin Dabilpuram 	void *lmt_addr;
16a24af636SNithin Dabilpuram 	rte_iova_t io_addr;
17a24af636SNithin Dabilpuram 	uint64_t lso_tun_fmt;
18ae2c2cb6SPavan Nikhilesh 	uint64_t ts_mem;
19a24af636SNithin Dabilpuram 	uint16_t sqes_per_sqb_log2;
20a24af636SNithin Dabilpuram 	int16_t nb_sqb_bufs_adj;
217eabd6c6SNithin Dabilpuram 	rte_iova_t cpt_io_addr;
227eabd6c6SNithin Dabilpuram 	uint64_t sa_base;
237eabd6c6SNithin Dabilpuram 	uint64_t *cpt_fc;
247eabd6c6SNithin Dabilpuram 	uint16_t cpt_desc;
2550e2c7fdSSatha Rao 	uint64_t mark_flag : 8;
2650e2c7fdSSatha Rao 	uint64_t mark_fmt : 48;
27dd944699SRakesh Kudurumalla 	struct cnxk_eth_txq_comp tx_compl;
28eabbac98SPavan Nikhilesh 	uint16_t tx_offload_flags;
29a24af636SNithin Dabilpuram } __plt_cache_aligned;
30a24af636SNithin Dabilpuram 
31a86144cdSNithin Dabilpuram struct cn9k_eth_rxq {
32a86144cdSNithin Dabilpuram 	uint64_t mbuf_initializer;
33a86144cdSNithin Dabilpuram 	uint64_t data_off;
34a86144cdSNithin Dabilpuram 	uintptr_t desc;
35a86144cdSNithin Dabilpuram 	void *lookup_mem;
36a86144cdSNithin Dabilpuram 	uintptr_t cq_door;
37a86144cdSNithin Dabilpuram 	uint64_t wdata;
38a86144cdSNithin Dabilpuram 	int64_t *cq_status;
39a86144cdSNithin Dabilpuram 	uint32_t head;
40a86144cdSNithin Dabilpuram 	uint32_t qmask;
41a86144cdSNithin Dabilpuram 	uint32_t available;
42a86144cdSNithin Dabilpuram 	uint16_t rq;
4376dff638SSunil Kumar Kori 	struct cnxk_timesync_info *tstamp;
44a86144cdSNithin Dabilpuram } __plt_cache_aligned;
45a86144cdSNithin Dabilpuram 
467eabd6c6SNithin Dabilpuram /* Private data in sw rsvd area of struct roc_onf_ipsec_inb_sa */
477eabd6c6SNithin Dabilpuram struct cn9k_inb_priv_data {
487eabd6c6SNithin Dabilpuram 	void *userdata;
497206a1caSSrujana Challa 	uint32_t replay_win_sz;
507206a1caSSrujana Challa 	struct cnxk_on_ipsec_ar ar;
517eabd6c6SNithin Dabilpuram 	struct cnxk_eth_sec_sess *eth_sec;
527eabd6c6SNithin Dabilpuram };
537eabd6c6SNithin Dabilpuram 
547eabd6c6SNithin Dabilpuram /* Private data in sw rsvd area of struct roc_onf_ipsec_outb_sa */
557eabd6c6SNithin Dabilpuram struct cn9k_outb_priv_data {
567eabd6c6SNithin Dabilpuram 	union {
577eabd6c6SNithin Dabilpuram 		uint64_t esn;
587eabd6c6SNithin Dabilpuram 		struct {
597eabd6c6SNithin Dabilpuram 			uint32_t seq;
607eabd6c6SNithin Dabilpuram 			uint32_t esn_hi;
617eabd6c6SNithin Dabilpuram 		};
627eabd6c6SNithin Dabilpuram 	};
637eabd6c6SNithin Dabilpuram 
647eabd6c6SNithin Dabilpuram 	/* Rlen computation data */
657eabd6c6SNithin Dabilpuram 	struct cnxk_ipsec_outb_rlens rlens;
667eabd6c6SNithin Dabilpuram 
677eabd6c6SNithin Dabilpuram 	/* IP identifier */
687eabd6c6SNithin Dabilpuram 	uint16_t ip_id;
697eabd6c6SNithin Dabilpuram 
707eabd6c6SNithin Dabilpuram 	/* SA index */
717eabd6c6SNithin Dabilpuram 	uint32_t sa_idx;
727eabd6c6SNithin Dabilpuram 
737eabd6c6SNithin Dabilpuram 	/* Flags */
747eabd6c6SNithin Dabilpuram 	uint16_t copy_salt : 1;
757eabd6c6SNithin Dabilpuram 
767eabd6c6SNithin Dabilpuram 	/* Salt */
777eabd6c6SNithin Dabilpuram 	uint32_t nonce;
787eabd6c6SNithin Dabilpuram 
797eabd6c6SNithin Dabilpuram 	/* User data pointer */
807eabd6c6SNithin Dabilpuram 	void *userdata;
817eabd6c6SNithin Dabilpuram 
827eabd6c6SNithin Dabilpuram 	/* Back pointer to eth sec session */
837eabd6c6SNithin Dabilpuram 	struct cnxk_eth_sec_sess *eth_sec;
844440eb88SVidya Sagar Velumuri 
854440eb88SVidya Sagar Velumuri 	/* IV in DBG mode */
864440eb88SVidya Sagar Velumuri 	uint8_t iv_dbg[ROC_IE_ON_MAX_IV_LEN];
877eabd6c6SNithin Dabilpuram };
887eabd6c6SNithin Dabilpuram 
89*e7750639SAndre Muezerie struct __rte_packed_begin cn9k_sec_sess_priv {
907eabd6c6SNithin Dabilpuram 	union {
917eabd6c6SNithin Dabilpuram 		struct {
927eabd6c6SNithin Dabilpuram 			uint32_t sa_idx;
937eabd6c6SNithin Dabilpuram 			uint8_t inb_sa : 1;
947eabd6c6SNithin Dabilpuram 			uint8_t rsvd1 : 2;
957eabd6c6SNithin Dabilpuram 			uint8_t roundup_byte : 5;
967eabd6c6SNithin Dabilpuram 			uint8_t roundup_len;
977eabd6c6SNithin Dabilpuram 			uint16_t partial_len;
987eabd6c6SNithin Dabilpuram 		};
997eabd6c6SNithin Dabilpuram 
1007eabd6c6SNithin Dabilpuram 		uint64_t u64;
1017eabd6c6SNithin Dabilpuram 	};
102*e7750639SAndre Muezerie } __rte_packed_end;
1037eabd6c6SNithin Dabilpuram 
104b951c2efSJerin Jacob /* Rx and Tx routines */
105b951c2efSJerin Jacob void cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev);
10639dc567cSJerin Jacob void cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev);
107b951c2efSJerin Jacob 
1087eabd6c6SNithin Dabilpuram /* Security context setup */
1097eabd6c6SNithin Dabilpuram void cn9k_eth_sec_ops_override(void);
1107eabd6c6SNithin Dabilpuram 
1115a965b9bSRakesh Kudurumalla static inline uint16_t
1125a965b9bSRakesh Kudurumalla nix_tx_compl_nb_pkts(struct cn9k_eth_txq *txq, const uint64_t wdata,
1135a965b9bSRakesh Kudurumalla 		const uint32_t qmask)
1145a965b9bSRakesh Kudurumalla {
1155a965b9bSRakesh Kudurumalla 	uint16_t available = txq->tx_compl.available;
1165a965b9bSRakesh Kudurumalla 
1175a965b9bSRakesh Kudurumalla 	/* Update the available count if cached value is not enough */
1185a965b9bSRakesh Kudurumalla 	if (!unlikely(available)) {
1195a965b9bSRakesh Kudurumalla 		uint64_t reg, head, tail;
1205a965b9bSRakesh Kudurumalla 
1215a965b9bSRakesh Kudurumalla 		/* Use LDADDA version to avoid reorder */
1225a965b9bSRakesh Kudurumalla 		reg = roc_atomic64_add_sync(wdata, txq->tx_compl.cq_status);
1235a965b9bSRakesh Kudurumalla 		/* CQ_OP_STATUS operation error */
1245a965b9bSRakesh Kudurumalla 		if (reg & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) ||
1255a965b9bSRakesh Kudurumalla 				reg & BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR))
1265a965b9bSRakesh Kudurumalla 			return 0;
1275a965b9bSRakesh Kudurumalla 
1285a965b9bSRakesh Kudurumalla 		tail = reg & 0xFFFFF;
1295a965b9bSRakesh Kudurumalla 		head = (reg >> 20) & 0xFFFFF;
1305a965b9bSRakesh Kudurumalla 		if (tail < head)
1315a965b9bSRakesh Kudurumalla 			available = tail - head + qmask + 1;
1325a965b9bSRakesh Kudurumalla 		else
1335a965b9bSRakesh Kudurumalla 			available = tail - head;
1345a965b9bSRakesh Kudurumalla 
1355a965b9bSRakesh Kudurumalla 		txq->tx_compl.available = available;
1365a965b9bSRakesh Kudurumalla 	}
1375a965b9bSRakesh Kudurumalla 	return available;
1385a965b9bSRakesh Kudurumalla }
1395a965b9bSRakesh Kudurumalla 
1405a965b9bSRakesh Kudurumalla static inline void
1415a965b9bSRakesh Kudurumalla handle_tx_completion_pkts(struct cn9k_eth_txq *txq, uint8_t mt_safe)
1425a965b9bSRakesh Kudurumalla {
1435a965b9bSRakesh Kudurumalla #define CNXK_NIX_CQ_ENTRY_SZ 128
1445a965b9bSRakesh Kudurumalla #define CQE_SZ(x)            ((x) * CNXK_NIX_CQ_ENTRY_SZ)
1455a965b9bSRakesh Kudurumalla 
1465a965b9bSRakesh Kudurumalla 	uint16_t tx_pkts = 0, nb_pkts;
1475a965b9bSRakesh Kudurumalla 	const uintptr_t desc = txq->tx_compl.desc_base;
1485a965b9bSRakesh Kudurumalla 	const uint64_t wdata = txq->tx_compl.wdata;
1495a965b9bSRakesh Kudurumalla 	const uint32_t qmask = txq->tx_compl.qmask;
1505a965b9bSRakesh Kudurumalla 	uint32_t head = txq->tx_compl.head;
1515a965b9bSRakesh Kudurumalla 	struct nix_cqe_hdr_s *tx_compl_cq;
1525a965b9bSRakesh Kudurumalla 	struct nix_send_comp_s *tx_compl_s0;
1535a965b9bSRakesh Kudurumalla 	struct rte_mbuf *m_next, *m;
1545a965b9bSRakesh Kudurumalla 
1555a965b9bSRakesh Kudurumalla 	if (mt_safe)
1565a965b9bSRakesh Kudurumalla 		rte_spinlock_lock(&txq->tx_compl.ext_buf_lock);
1575a965b9bSRakesh Kudurumalla 
1585a965b9bSRakesh Kudurumalla 	nb_pkts = nix_tx_compl_nb_pkts(txq, wdata, qmask);
1595a965b9bSRakesh Kudurumalla 	while (tx_pkts < nb_pkts) {
1605a965b9bSRakesh Kudurumalla 		rte_prefetch_non_temporal((void *)(desc +
1615a965b9bSRakesh Kudurumalla 					(CQE_SZ((head + 2) & qmask))));
1625a965b9bSRakesh Kudurumalla 		tx_compl_cq = (struct nix_cqe_hdr_s *)
1635a965b9bSRakesh Kudurumalla 			(desc + CQE_SZ(head));
1645a965b9bSRakesh Kudurumalla 		tx_compl_s0 = (struct nix_send_comp_s *)
1655a965b9bSRakesh Kudurumalla 			((uint64_t *)tx_compl_cq + 1);
1665a965b9bSRakesh Kudurumalla 		m = txq->tx_compl.ptr[tx_compl_s0->sqe_id];
1675a965b9bSRakesh Kudurumalla 		while (m->next != NULL) {
1685a965b9bSRakesh Kudurumalla 			m_next = m->next;
1695a965b9bSRakesh Kudurumalla 			rte_pktmbuf_free_seg(m);
1705a965b9bSRakesh Kudurumalla 			m = m_next;
1715a965b9bSRakesh Kudurumalla 		}
1725a965b9bSRakesh Kudurumalla 		rte_pktmbuf_free_seg(m);
1733232c95dSNithin Dabilpuram 		txq->tx_compl.ptr[tx_compl_s0->sqe_id] = NULL;
1745a965b9bSRakesh Kudurumalla 
1755a965b9bSRakesh Kudurumalla 		head++;
1765a965b9bSRakesh Kudurumalla 		head &= qmask;
1775a965b9bSRakesh Kudurumalla 		tx_pkts++;
1785a965b9bSRakesh Kudurumalla 	}
1795a965b9bSRakesh Kudurumalla 	txq->tx_compl.head = head;
1805a965b9bSRakesh Kudurumalla 	txq->tx_compl.available -= nb_pkts;
1815a965b9bSRakesh Kudurumalla 
1825a965b9bSRakesh Kudurumalla 	plt_write64((wdata | nb_pkts), txq->tx_compl.cq_door);
1835a965b9bSRakesh Kudurumalla 
1845a965b9bSRakesh Kudurumalla 	if (mt_safe)
1855a965b9bSRakesh Kudurumalla 		rte_spinlock_unlock(&txq->tx_compl.ext_buf_lock);
1865a965b9bSRakesh Kudurumalla }
1875a965b9bSRakesh Kudurumalla 
1885a965b9bSRakesh Kudurumalla 
1895a4341c8SNithin Dabilpuram #endif /* __CN9K_ETHDEV_H__ */
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