1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2014-2021 Broadcom 3 * All rights reserved. 4 */ 5 6 #include <inttypes.h> 7 8 #include <rte_byteorder.h> 9 #include <rte_malloc.h> 10 11 #include "bnxt.h" 12 #include "bnxt_ring.h" 13 #include "bnxt_txq.h" 14 #include "bnxt_txr.h" 15 #include "hsi_struct_def_dpdk.h" 16 #include <stdbool.h> 17 18 /* 19 * TX Ring handling 20 */ 21 22 void bnxt_free_tx_rings(struct bnxt *bp) 23 { 24 int i; 25 26 for (i = 0; i < (int)bp->tx_nr_rings; i++) { 27 struct bnxt_tx_queue *txq = bp->tx_queues[i]; 28 29 if (!txq) 30 continue; 31 32 bnxt_free_ring(txq->tx_ring->tx_ring_struct); 33 rte_free(txq->tx_ring->tx_ring_struct); 34 rte_free(txq->tx_ring); 35 36 bnxt_free_ring(txq->cp_ring->cp_ring_struct); 37 rte_free(txq->cp_ring->cp_ring_struct); 38 rte_free(txq->cp_ring); 39 40 rte_free(txq); 41 bp->tx_queues[i] = NULL; 42 } 43 } 44 45 int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq) 46 { 47 struct bnxt_tx_ring_info *txr = txq->tx_ring; 48 struct bnxt_ring *ring = txr->tx_ring_struct; 49 50 txq->tx_wake_thresh = ring->ring_size / 2; 51 ring->fw_ring_id = INVALID_HW_RING_ID; 52 53 return 0; 54 } 55 56 int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id) 57 { 58 struct bnxt_cp_ring_info *cpr; 59 struct bnxt_tx_ring_info *txr; 60 struct bnxt_ring *ring; 61 62 txr = rte_zmalloc_socket("bnxt_tx_ring", 63 sizeof(struct bnxt_tx_ring_info), 64 RTE_CACHE_LINE_SIZE, socket_id); 65 if (txr == NULL) 66 return -ENOMEM; 67 txq->tx_ring = txr; 68 69 ring = rte_zmalloc_socket("bnxt_tx_ring_struct", 70 sizeof(struct bnxt_ring), 71 RTE_CACHE_LINE_SIZE, socket_id); 72 if (ring == NULL) 73 return -ENOMEM; 74 txr->tx_ring_struct = ring; 75 ring->ring_size = rte_align32pow2(txq->nb_tx_desc); 76 ring->ring_mask = ring->ring_size - 1; 77 ring->bd = (void *)txr->tx_desc_ring; 78 ring->bd_dma = txr->tx_desc_mapping; 79 ring->vmem_size = ring->ring_size * sizeof(struct rte_mbuf *); 80 ring->vmem = (void **)&txr->tx_buf_ring; 81 ring->fw_ring_id = INVALID_HW_RING_ID; 82 83 cpr = rte_zmalloc_socket("bnxt_tx_ring", 84 sizeof(struct bnxt_cp_ring_info), 85 RTE_CACHE_LINE_SIZE, socket_id); 86 if (cpr == NULL) 87 return -ENOMEM; 88 txq->cp_ring = cpr; 89 90 ring = rte_zmalloc_socket("bnxt_tx_ring_struct", 91 sizeof(struct bnxt_ring), 92 RTE_CACHE_LINE_SIZE, socket_id); 93 if (ring == NULL) 94 return -ENOMEM; 95 cpr->cp_ring_struct = ring; 96 ring->ring_size = txr->tx_ring_struct->ring_size; 97 ring->ring_mask = ring->ring_size - 1; 98 ring->bd = (void *)cpr->cp_desc_ring; 99 ring->bd_dma = cpr->cp_desc_mapping; 100 ring->vmem_size = 0; 101 ring->vmem = NULL; 102 ring->fw_ring_id = INVALID_HW_RING_ID; 103 104 return 0; 105 } 106 107 static bool 108 bnxt_xmit_need_long_bd(struct rte_mbuf *tx_pkt, struct bnxt_tx_queue *txq) 109 { 110 if (tx_pkt->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_TCP_CKSUM | 111 PKT_TX_UDP_CKSUM | PKT_TX_IP_CKSUM | 112 PKT_TX_VLAN_PKT | PKT_TX_OUTER_IP_CKSUM | 113 PKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN | 114 PKT_TX_TUNNEL_GENEVE | PKT_TX_IEEE1588_TMST | 115 PKT_TX_QINQ_PKT) || 116 (BNXT_TRUFLOW_EN(txq->bp) && 117 (txq->bp->tx_cfa_action || txq->vfr_tx_cfa_action))) 118 return true; 119 return false; 120 } 121 122 static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt, 123 struct bnxt_tx_queue *txq, 124 uint16_t *coal_pkts, 125 struct tx_bd_long **last_txbd) 126 { 127 struct bnxt_tx_ring_info *txr = txq->tx_ring; 128 struct bnxt_ring *ring = txr->tx_ring_struct; 129 uint32_t outer_tpid_bd = 0; 130 struct tx_bd_long *txbd; 131 struct tx_bd_long_hi *txbd1 = NULL; 132 uint32_t vlan_tag_flags; 133 bool long_bd = false; 134 unsigned short nr_bds; 135 uint16_t prod; 136 struct rte_mbuf *m_seg; 137 struct rte_mbuf **tx_buf; 138 static const uint32_t lhint_arr[4] = { 139 TX_BD_LONG_FLAGS_LHINT_LT512, 140 TX_BD_LONG_FLAGS_LHINT_LT1K, 141 TX_BD_LONG_FLAGS_LHINT_LT2K, 142 TX_BD_LONG_FLAGS_LHINT_LT2K 143 }; 144 145 if (unlikely(is_bnxt_in_error(txq->bp))) 146 return -EIO; 147 148 long_bd = bnxt_xmit_need_long_bd(tx_pkt, txq); 149 nr_bds = long_bd + tx_pkt->nb_segs; 150 151 if (unlikely(bnxt_tx_avail(txq) < nr_bds)) 152 return -ENOMEM; 153 154 /* Check if number of Tx descriptors is above HW limit */ 155 if (unlikely(nr_bds > BNXT_MAX_TSO_SEGS)) { 156 PMD_DRV_LOG(ERR, 157 "Num descriptors %d exceeds HW limit\n", nr_bds); 158 return -ENOSPC; 159 } 160 161 /* If packet length is less than minimum packet size, pad it */ 162 if (unlikely(rte_pktmbuf_pkt_len(tx_pkt) < BNXT_MIN_PKT_SIZE)) { 163 uint8_t pad = BNXT_MIN_PKT_SIZE - rte_pktmbuf_pkt_len(tx_pkt); 164 char *seg = rte_pktmbuf_append(tx_pkt, pad); 165 166 if (!seg) { 167 PMD_DRV_LOG(ERR, 168 "Failed to pad mbuf by %d bytes\n", 169 pad); 170 return -ENOMEM; 171 } 172 173 /* Note: data_len, pkt len are updated in rte_pktmbuf_append */ 174 memset(seg, 0, pad); 175 } 176 177 /* Check non zero data_len */ 178 RTE_VERIFY(tx_pkt->data_len); 179 180 prod = RING_IDX(ring, txr->tx_raw_prod); 181 tx_buf = &txr->tx_buf_ring[prod]; 182 *tx_buf = tx_pkt; 183 184 txbd = &txr->tx_desc_ring[prod]; 185 txbd->opaque = *coal_pkts; 186 txbd->flags_type = nr_bds << TX_BD_LONG_FLAGS_BD_CNT_SFT; 187 txbd->flags_type |= TX_BD_SHORT_FLAGS_COAL_NOW; 188 txbd->flags_type |= TX_BD_LONG_FLAGS_NO_CMPL; 189 txbd->len = tx_pkt->data_len; 190 if (tx_pkt->pkt_len >= 2048) 191 txbd->flags_type |= TX_BD_LONG_FLAGS_LHINT_GTE2K; 192 else 193 txbd->flags_type |= lhint_arr[tx_pkt->pkt_len >> 9]; 194 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_pkt)); 195 *last_txbd = txbd; 196 197 if (long_bd) { 198 txbd->flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG; 199 vlan_tag_flags = 0; 200 201 /* HW can accelerate only outer vlan in QinQ mode */ 202 if (tx_pkt->ol_flags & PKT_TX_QINQ_PKT) { 203 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG | 204 tx_pkt->vlan_tci_outer; 205 outer_tpid_bd = txq->bp->outer_tpid_bd & 206 BNXT_OUTER_TPID_BD_MASK; 207 vlan_tag_flags |= outer_tpid_bd; 208 } else if (tx_pkt->ol_flags & PKT_TX_VLAN_PKT) { 209 /* shurd: Should this mask at 210 * TX_BD_LONG_CFA_META_VLAN_VID_MASK? 211 */ 212 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG | 213 tx_pkt->vlan_tci; 214 /* Currently supports 8021Q, 8021AD vlan offloads 215 * QINQ1, QINQ2, QINQ3 vlan headers are deprecated 216 */ 217 /* DPDK only supports 802.11q VLAN packets */ 218 vlan_tag_flags |= 219 TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100; 220 } 221 222 txr->tx_raw_prod = RING_NEXT(txr->tx_raw_prod); 223 224 prod = RING_IDX(ring, txr->tx_raw_prod); 225 txbd1 = (struct tx_bd_long_hi *)&txr->tx_desc_ring[prod]; 226 txbd1->lflags = 0; 227 txbd1->cfa_meta = vlan_tag_flags; 228 /* Legacy tx_bd_long_hi->mss = 229 * tx_bd_long_hi->kid_or_ts_high_mss 230 */ 231 txbd1->kid_or_ts_high_mss = 0; 232 233 if (txq->vfr_tx_cfa_action) 234 txbd1->cfa_action = txq->vfr_tx_cfa_action; 235 else 236 txbd1->cfa_action = txq->bp->tx_cfa_action; 237 238 if (tx_pkt->ol_flags & PKT_TX_TCP_SEG) { 239 uint16_t hdr_size; 240 241 /* TSO */ 242 txbd1->lflags |= TX_BD_LONG_LFLAGS_LSO | 243 TX_BD_LONG_LFLAGS_T_IPID; 244 hdr_size = tx_pkt->l2_len + tx_pkt->l3_len + 245 tx_pkt->l4_len; 246 hdr_size += (tx_pkt->ol_flags & PKT_TX_TUNNEL_MASK) ? 247 tx_pkt->outer_l2_len + 248 tx_pkt->outer_l3_len : 0; 249 /* The hdr_size is multiple of 16bit units not 8bit. 250 * Hence divide by 2. 251 * Also legacy hdr_size = kid_or_ts_low_hdr_size. 252 */ 253 txbd1->kid_or_ts_low_hdr_size = hdr_size >> 1; 254 txbd1->kid_or_ts_high_mss = tx_pkt->tso_segsz; 255 RTE_VERIFY(txbd1->kid_or_ts_high_mss); 256 257 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_UDP_CKSUM) == 258 PKT_TX_OIP_IIP_TCP_UDP_CKSUM) { 259 /* Outer IP, Inner IP, Inner TCP/UDP CSO */ 260 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM; 261 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_CKSUM) == 262 PKT_TX_OIP_IIP_TCP_CKSUM) { 263 /* Outer IP, Inner IP, Inner TCP/UDP CSO */ 264 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM; 265 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_UDP_CKSUM) == 266 PKT_TX_OIP_IIP_UDP_CKSUM) { 267 /* Outer IP, Inner IP, Inner TCP/UDP CSO */ 268 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM; 269 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_UDP_CKSUM) == 270 PKT_TX_IIP_TCP_UDP_CKSUM) { 271 /* (Inner) IP, (Inner) TCP/UDP CSO */ 272 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM; 273 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_UDP_CKSUM) == 274 PKT_TX_IIP_UDP_CKSUM) { 275 /* (Inner) IP, (Inner) TCP/UDP CSO */ 276 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM; 277 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_CKSUM) == 278 PKT_TX_IIP_TCP_CKSUM) { 279 /* (Inner) IP, (Inner) TCP/UDP CSO */ 280 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM; 281 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_UDP_CKSUM) == 282 PKT_TX_OIP_TCP_UDP_CKSUM) { 283 /* Outer IP, (Inner) TCP/UDP CSO */ 284 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM; 285 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_UDP_CKSUM) == 286 PKT_TX_OIP_UDP_CKSUM) { 287 /* Outer IP, (Inner) TCP/UDP CSO */ 288 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM; 289 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_CKSUM) == 290 PKT_TX_OIP_TCP_CKSUM) { 291 /* Outer IP, (Inner) TCP/UDP CSO */ 292 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM; 293 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_CKSUM) == 294 PKT_TX_OIP_IIP_CKSUM) { 295 /* Outer IP, Inner IP CSO */ 296 txbd1->lflags |= TX_BD_FLG_TIP_IP_CHKSUM; 297 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_UDP_CKSUM) == 298 PKT_TX_TCP_UDP_CKSUM) { 299 /* TCP/UDP CSO */ 300 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM; 301 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_CKSUM) == 302 PKT_TX_TCP_CKSUM) { 303 /* TCP/UDP CSO */ 304 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM; 305 } else if ((tx_pkt->ol_flags & PKT_TX_UDP_CKSUM) == 306 PKT_TX_UDP_CKSUM) { 307 /* TCP/UDP CSO */ 308 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM; 309 } else if ((tx_pkt->ol_flags & PKT_TX_IP_CKSUM) == 310 PKT_TX_IP_CKSUM) { 311 /* IP CSO */ 312 txbd1->lflags |= TX_BD_LONG_LFLAGS_IP_CHKSUM; 313 } else if ((tx_pkt->ol_flags & PKT_TX_OUTER_IP_CKSUM) == 314 PKT_TX_OUTER_IP_CKSUM) { 315 /* IP CSO */ 316 txbd1->lflags |= TX_BD_LONG_LFLAGS_T_IP_CHKSUM; 317 } else if ((tx_pkt->ol_flags & PKT_TX_IEEE1588_TMST) == 318 PKT_TX_IEEE1588_TMST) { 319 /* PTP */ 320 txbd1->lflags |= TX_BD_LONG_LFLAGS_STAMP; 321 } 322 } else { 323 txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT; 324 } 325 326 m_seg = tx_pkt->next; 327 while (m_seg) { 328 /* Check non zero data_len */ 329 RTE_VERIFY(m_seg->data_len); 330 txr->tx_raw_prod = RING_NEXT(txr->tx_raw_prod); 331 332 prod = RING_IDX(ring, txr->tx_raw_prod); 333 tx_buf = &txr->tx_buf_ring[prod]; 334 *tx_buf = m_seg; 335 336 txbd = &txr->tx_desc_ring[prod]; 337 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(m_seg)); 338 txbd->flags_type = TX_BD_SHORT_TYPE_TX_BD_SHORT; 339 txbd->len = m_seg->data_len; 340 341 m_seg = m_seg->next; 342 } 343 344 txbd->flags_type |= TX_BD_LONG_FLAGS_PACKET_END; 345 346 txr->tx_raw_prod = RING_NEXT(txr->tx_raw_prod); 347 348 return 0; 349 } 350 351 /* 352 * Transmit completion function for use when DEV_TX_OFFLOAD_MBUF_FAST_FREE 353 * is enabled. 354 */ 355 static void bnxt_tx_cmp_fast(struct bnxt_tx_queue *txq, int nr_pkts) 356 { 357 struct bnxt_tx_ring_info *txr = txq->tx_ring; 358 struct bnxt_ring *ring = txr->tx_ring_struct; 359 struct rte_mbuf **free = txq->free; 360 uint16_t raw_cons = txr->tx_raw_cons; 361 unsigned int blk = 0; 362 int i, j; 363 364 for (i = 0; i < nr_pkts; i++) { 365 struct rte_mbuf **tx_buf; 366 unsigned short nr_bds; 367 368 tx_buf = &txr->tx_buf_ring[RING_IDX(ring, raw_cons)]; 369 nr_bds = (*tx_buf)->nb_segs + 370 bnxt_xmit_need_long_bd(*tx_buf, txq); 371 for (j = 0; j < nr_bds; j++) { 372 if (*tx_buf) { 373 /* Add mbuf to the bulk free array */ 374 free[blk++] = *tx_buf; 375 *tx_buf = NULL; 376 } 377 raw_cons = RING_NEXT(raw_cons); 378 tx_buf = &txr->tx_buf_ring[RING_IDX(ring, raw_cons)]; 379 } 380 } 381 if (blk) 382 rte_mempool_put_bulk(free[0]->pool, (void *)free, blk); 383 384 txr->tx_raw_cons = raw_cons; 385 } 386 387 static void bnxt_tx_cmp(struct bnxt_tx_queue *txq, int nr_pkts) 388 { 389 struct bnxt_tx_ring_info *txr = txq->tx_ring; 390 struct bnxt_ring *ring = txr->tx_ring_struct; 391 struct rte_mempool *pool = NULL; 392 struct rte_mbuf **free = txq->free; 393 uint16_t raw_cons = txr->tx_raw_cons; 394 unsigned int blk = 0; 395 int i, j; 396 397 for (i = 0; i < nr_pkts; i++) { 398 struct rte_mbuf *mbuf; 399 struct rte_mbuf **tx_buf; 400 unsigned short nr_bds; 401 402 tx_buf = &txr->tx_buf_ring[RING_IDX(ring, raw_cons)]; 403 nr_bds = (*tx_buf)->nb_segs + 404 bnxt_xmit_need_long_bd(*tx_buf, txq); 405 for (j = 0; j < nr_bds; j++) { 406 mbuf = *tx_buf; 407 *tx_buf = NULL; 408 raw_cons = RING_NEXT(raw_cons); 409 tx_buf = &txr->tx_buf_ring[RING_IDX(ring, raw_cons)]; 410 if (!mbuf) /* long_bd's tx_buf ? */ 411 continue; 412 413 mbuf = rte_pktmbuf_prefree_seg(mbuf); 414 if (unlikely(!mbuf)) 415 continue; 416 417 /* EW - no need to unmap DMA memory? */ 418 419 if (likely(mbuf->pool == pool)) { 420 /* Add mbuf to the bulk free array */ 421 free[blk++] = mbuf; 422 } else { 423 /* Found an mbuf from a different pool. Free 424 * mbufs accumulated so far to the previous 425 * pool 426 */ 427 if (likely(pool != NULL)) 428 rte_mempool_put_bulk(pool, 429 (void *)free, 430 blk); 431 432 /* Start accumulating mbufs in a new pool */ 433 free[0] = mbuf; 434 pool = mbuf->pool; 435 blk = 1; 436 } 437 } 438 } 439 if (blk) 440 rte_mempool_put_bulk(pool, (void *)free, blk); 441 442 txr->tx_raw_cons = raw_cons; 443 } 444 445 static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq) 446 { 447 struct bnxt_cp_ring_info *cpr = txq->cp_ring; 448 uint32_t raw_cons = cpr->cp_raw_cons; 449 uint32_t cons; 450 uint32_t nb_tx_pkts = 0; 451 struct tx_cmpl *txcmp; 452 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring; 453 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct; 454 uint32_t ring_mask = cp_ring_struct->ring_mask; 455 uint32_t opaque = 0; 456 457 if (bnxt_tx_bds_in_hw(txq) < txq->tx_free_thresh) 458 return 0; 459 460 do { 461 cons = RING_CMPL(ring_mask, raw_cons); 462 txcmp = (struct tx_cmpl *)&cpr->cp_desc_ring[cons]; 463 rte_prefetch_non_temporal(&cp_desc_ring[(cons + 2) & 464 ring_mask]); 465 466 if (!CMPL_VALID(txcmp, cpr->valid)) 467 break; 468 opaque = rte_cpu_to_le_32(txcmp->opaque); 469 NEXT_CMPL(cpr, cons, cpr->valid, 1); 470 rte_prefetch0(&cp_desc_ring[cons]); 471 472 if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2) 473 nb_tx_pkts += opaque; 474 else 475 RTE_LOG_DP(ERR, PMD, 476 "Unhandled CMP type %02x\n", 477 CMP_TYPE(txcmp)); 478 raw_cons = cons; 479 } while (nb_tx_pkts < ring_mask); 480 481 if (nb_tx_pkts) { 482 if (txq->offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE) 483 bnxt_tx_cmp_fast(txq, nb_tx_pkts); 484 else 485 bnxt_tx_cmp(txq, nb_tx_pkts); 486 cpr->cp_raw_cons = raw_cons; 487 bnxt_db_cq(cpr); 488 } 489 490 return nb_tx_pkts; 491 } 492 493 uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, 494 uint16_t nb_pkts) 495 { 496 int rc; 497 uint16_t nb_tx_pkts = 0; 498 uint16_t coal_pkts = 0; 499 struct bnxt_tx_queue *txq = tx_queue; 500 struct tx_bd_long *last_txbd = NULL; 501 502 /* Handle TX completions */ 503 bnxt_handle_tx_cp(txq); 504 505 /* Tx queue was stopped; wait for it to be restarted */ 506 if (unlikely(!txq->tx_started)) { 507 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n"); 508 return 0; 509 } 510 511 /* Handle TX burst request */ 512 for (nb_tx_pkts = 0; nb_tx_pkts < nb_pkts; nb_tx_pkts++) { 513 coal_pkts++; 514 rc = bnxt_start_xmit(tx_pkts[nb_tx_pkts], txq, 515 &coal_pkts, &last_txbd); 516 517 if (unlikely(rc)) 518 break; 519 } 520 521 if (likely(nb_tx_pkts)) { 522 /* Request a completion on the last packet */ 523 last_txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL; 524 bnxt_db_write(&txq->tx_ring->tx_db, txq->tx_ring->tx_raw_prod); 525 } 526 527 return nb_tx_pkts; 528 } 529 530 /* 531 * Dummy DPDK callback for TX. 532 * 533 * This function is used to temporarily replace the real callback during 534 * unsafe control operations on the queue, or in case of error. 535 */ 536 uint16_t 537 bnxt_dummy_xmit_pkts(void *tx_queue __rte_unused, 538 struct rte_mbuf **tx_pkts __rte_unused, 539 uint16_t nb_pkts __rte_unused) 540 { 541 return 0; 542 } 543 544 int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id) 545 { 546 struct bnxt *bp = dev->data->dev_private; 547 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id]; 548 int rc = 0; 549 550 rc = is_bnxt_in_error(bp); 551 if (rc) 552 return rc; 553 554 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED; 555 txq->tx_started = true; 556 PMD_DRV_LOG(DEBUG, "Tx queue started\n"); 557 558 return 0; 559 } 560 561 int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id) 562 { 563 struct bnxt *bp = dev->data->dev_private; 564 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id]; 565 int rc = 0; 566 567 rc = is_bnxt_in_error(bp); 568 if (rc) 569 return rc; 570 571 /* Handle TX completions */ 572 bnxt_handle_tx_cp(txq); 573 574 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; 575 txq->tx_started = false; 576 PMD_DRV_LOG(DEBUG, "Tx queue stopped\n"); 577 578 return 0; 579 } 580 581 /* Sweep the Tx completion queue till HWRM_DONE for ring flush is received. 582 * The mbufs will not be freed in this call. 583 * They will be freed during ring free as a part of mem cleanup. 584 */ 585 int bnxt_flush_tx_cmp(struct bnxt_cp_ring_info *cpr) 586 { 587 uint32_t raw_cons = cpr->cp_raw_cons; 588 uint32_t cons; 589 uint32_t nb_tx_pkts = 0; 590 struct tx_cmpl *txcmp; 591 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring; 592 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct; 593 uint32_t ring_mask = cp_ring_struct->ring_mask; 594 uint32_t opaque = 0; 595 596 do { 597 cons = RING_CMPL(ring_mask, raw_cons); 598 txcmp = (struct tx_cmpl *)&cp_desc_ring[cons]; 599 600 opaque = rte_cpu_to_le_32(txcmp->opaque); 601 raw_cons = NEXT_RAW_CMP(raw_cons); 602 603 if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2) 604 nb_tx_pkts += opaque; 605 else if (CMP_TYPE(txcmp) == HWRM_CMPL_TYPE_HWRM_DONE) 606 return 1; 607 } while (nb_tx_pkts < ring_mask); 608 609 if (nb_tx_pkts) { 610 cpr->cp_raw_cons = raw_cons; 611 bnxt_db_cq(cpr); 612 } 613 614 return 0; 615 } 616