1*80317ff6SFarah Smith /* SPDX-License-Identifier: BSD-3-Clause 2*80317ff6SFarah Smith * Copyright(c) 2014-2020 Broadcom 3*80317ff6SFarah Smith * All rights reserved. 4*80317ff6SFarah Smith */ 5*80317ff6SFarah Smith 6*80317ff6SFarah Smith #ifndef _BNXT_MPC_H_ 7*80317ff6SFarah Smith #define _BNXT_MPC_H_ 8*80317ff6SFarah Smith 9*80317ff6SFarah Smith #include <inttypes.h> 10*80317ff6SFarah Smith #include <stdbool.h> 11*80317ff6SFarah Smith #include <rte_malloc.h> 12*80317ff6SFarah Smith 13*80317ff6SFarah Smith /* MPC Batch support */ 14*80317ff6SFarah Smith extern bool bnxt_tfc_mpc_batch; 15*80317ff6SFarah Smith extern uint8_t bnxt_mpc_batch_count; 16*80317ff6SFarah Smith 17*80317ff6SFarah Smith #define BNXT_MPC_RX_RETRY 100000 18*80317ff6SFarah Smith 19*80317ff6SFarah Smith #define BNXT_MPC_NB_DESC 128 20*80317ff6SFarah Smith #define BNXT_MPC_DESC_THRESH 3 21*80317ff6SFarah Smith #define BNXT_MPC_CHNL_SHIFT 16 22*80317ff6SFarah Smith #define BNXT_MPC_QIDX_MSK 0xFFFF 23*80317ff6SFarah Smith #define BNXT_MPC_CHNL(x) ((x) >> BNXT_MPC_CHNL_SHIFT) 24*80317ff6SFarah Smith #define BNXT_MPC_QIDX(x) ((x) & BNXT_MPC_QIDX_MSK) 25*80317ff6SFarah Smith #define BNXT_MPC_MAP_INDEX(x, y) (((x) << BNXT_MPC_CHNL_SHIFT) | (y)) 26*80317ff6SFarah Smith 27*80317ff6SFarah Smith #define BNXT_MPC_CHNLS_SUPPORTED 2 /* Limit to MPC TE_CFA and RE_CFA */ 28*80317ff6SFarah Smith 29*80317ff6SFarah Smith /* BNXT_MPC_RINGS_SUPPORTED set to 1 TE_CFA and 1 1 RE_CFA types. 30*80317ff6SFarah Smith * Can be set up to tx_nr_rings * BNXT_MPC_CHNLS_SUPPORTED if needed. 31*80317ff6SFarah Smith */ 32*80317ff6SFarah Smith #define BNXT_MPC_RINGS_SUPPORTED (1 * BNXT_MPC_CHNLS_SUPPORTED) 33*80317ff6SFarah Smith 34*80317ff6SFarah Smith /* Defines the number of msgs there are in an MPC msg completion event. 35*80317ff6SFarah Smith * Used to pass an opaque value into the MPC msg xmit function. The 36*80317ff6SFarah Smith * completion processing uses this value to ring the doorbell correctly to 37*80317ff6SFarah Smith * signal "completion event processing complete" to the hardware. 38*80317ff6SFarah Smith */ 39*80317ff6SFarah Smith #define BNXT_MPC_COMP_MSG_COUNT 1 40*80317ff6SFarah Smith 41*80317ff6SFarah Smith /* Defines the uS delay prior to processing an MPC completion */ 42*80317ff6SFarah Smith #define BNXT_MPC_RX_US_DELAY 1 43*80317ff6SFarah Smith 44*80317ff6SFarah Smith enum bnxt_mpc_chnl { 45*80317ff6SFarah Smith BNXT_MPC_CHNL_TCE = 0, 46*80317ff6SFarah Smith BNXT_MPC_CHNL_RCE = 1, 47*80317ff6SFarah Smith BNXT_MPC_CHNL_TE_CFA = 2, 48*80317ff6SFarah Smith BNXT_MPC_CHNL_RE_CFA = 3, 49*80317ff6SFarah Smith BNXT_MPC_CHNL_PRIMATE = 4, 50*80317ff6SFarah Smith BNXT_MPC_CHNL_MAX = 5, 51*80317ff6SFarah Smith }; 52*80317ff6SFarah Smith 53*80317ff6SFarah Smith struct bnxt_sw_mpc_bd { 54*80317ff6SFarah Smith struct bnxt_mpc_mbuf *mpc_mbuf; /* mpc mbuf associated with mpc bd */ 55*80317ff6SFarah Smith unsigned short nr_bds; 56*80317ff6SFarah Smith }; 57*80317ff6SFarah Smith 58*80317ff6SFarah Smith struct bnxt_mpc_ring_info { 59*80317ff6SFarah Smith uint16_t raw_prod; 60*80317ff6SFarah Smith uint16_t raw_cons; 61*80317ff6SFarah Smith struct bnxt_db_info db; 62*80317ff6SFarah Smith 63*80317ff6SFarah Smith struct tx_bd_mp_cmd *mpc_desc_ring; 64*80317ff6SFarah Smith struct bnxt_sw_mpc_bd *mpc_buf_ring; 65*80317ff6SFarah Smith 66*80317ff6SFarah Smith rte_iova_t mpc_desc_mapping; 67*80317ff6SFarah Smith 68*80317ff6SFarah Smith uint32_t dev_state; 69*80317ff6SFarah Smith 70*80317ff6SFarah Smith struct bnxt_ring *mpc_ring_struct; 71*80317ff6SFarah Smith uint32_t epoch; 72*80317ff6SFarah Smith }; 73*80317ff6SFarah Smith 74*80317ff6SFarah Smith struct bnxt_mpc_mbuf { 75*80317ff6SFarah Smith enum bnxt_mpc_chnl chnl_id; 76*80317ff6SFarah Smith uint8_t cmp_type; 77*80317ff6SFarah Smith uint8_t *msg_data; 78*80317ff6SFarah Smith /* MPC msg size in bytes, must be multiple of 16Bytes */ 79*80317ff6SFarah Smith uint16_t msg_size; 80*80317ff6SFarah Smith }; 81*80317ff6SFarah Smith 82*80317ff6SFarah Smith struct bnxt_mpc_txq { 83*80317ff6SFarah Smith enum bnxt_mpc_chnl chnl_id; 84*80317ff6SFarah Smith uint32_t queue_idx; 85*80317ff6SFarah Smith uint16_t nb_mpc_desc; /* number of MPC descriptors */ 86*80317ff6SFarah Smith uint16_t free_thresh;/* minimum mpc cmds before freeing */ 87*80317ff6SFarah Smith int wake_thresh; 88*80317ff6SFarah Smith uint8_t started; /* MPC queue is started */ 89*80317ff6SFarah Smith 90*80317ff6SFarah Smith struct bnxt *bp; 91*80317ff6SFarah Smith struct bnxt_mpc_ring_info *mpc_ring; 92*80317ff6SFarah Smith unsigned int cp_nr_rings; 93*80317ff6SFarah Smith struct bnxt_cp_ring_info *cp_ring; 94*80317ff6SFarah Smith const struct rte_memzone *mz; 95*80317ff6SFarah Smith struct bnxt_mpc_mbuf **free; 96*80317ff6SFarah Smith 97*80317ff6SFarah Smith void (*cmpl_handler_cb)(struct bnxt_mpc_txq *mpc_queue, 98*80317ff6SFarah Smith uint32_t nb_mpc_cmds); 99*80317ff6SFarah Smith }; 100*80317ff6SFarah Smith 101*80317ff6SFarah Smith struct bnxt_mpc { 102*80317ff6SFarah Smith uint8_t mpc_chnls_cap; 103*80317ff6SFarah Smith uint8_t mpc_chnls_en; 104*80317ff6SFarah Smith struct bnxt_mpc_txq *mpc_txq[BNXT_MPC_CHNL_MAX]; 105*80317ff6SFarah Smith }; 106*80317ff6SFarah Smith 107*80317ff6SFarah Smith int bnxt_mpc_open(struct bnxt *bp); 108*80317ff6SFarah Smith int bnxt_mpc_close(struct bnxt *bp); 109*80317ff6SFarah Smith int bnxt_mpc_send(struct bnxt *bp, 110*80317ff6SFarah Smith struct bnxt_mpc_mbuf *in_msg, 111*80317ff6SFarah Smith struct bnxt_mpc_mbuf *out_msg, 112*80317ff6SFarah Smith uint32_t *opaque, 113*80317ff6SFarah Smith bool batch); 114*80317ff6SFarah Smith int bnxt_mpc_cmd_cmpl(struct bnxt_mpc_txq *mpc_queue, struct bnxt_mpc_mbuf *out_msg); 115*80317ff6SFarah Smith int bnxt_mpc_poll_cmd_cmpls(struct bnxt_mpc_txq *mpc_queue); 116*80317ff6SFarah Smith 117*80317ff6SFarah Smith #endif 118