xref: /dpdk/drivers/net/atlantic/atl_ethdev.h (revision 295968d1740760337e16b0d7914875c5cac52850)
15bcf1649SPavel Belous /* SPDX-License-Identifier: BSD-3-Clause
25bcf1649SPavel Belous  * Copyright(c) 2018 Aquantia Corporation
35bcf1649SPavel Belous  */
45bcf1649SPavel Belous 
55bcf1649SPavel Belous #ifndef _ATLANTIC_ETHDEV_H_
65bcf1649SPavel Belous #define _ATLANTIC_ETHDEV_H_
75bcf1649SPavel Belous #include <rte_errno.h>
85bcf1649SPavel Belous #include "rte_ethdev.h"
9bb42aa9fSPavel Belous 
10bb42aa9fSPavel Belous #include "atl_types.h"
11bb42aa9fSPavel Belous #include "hw_atl/hw_atl_utils.h"
12bb42aa9fSPavel Belous 
133af0d308SIgor Russkikh #define ATL_RSS_OFFLOAD_ALL ( \
14*295968d1SFerruh Yigit 	RTE_ETH_RSS_IPV4 | \
15*295968d1SFerruh Yigit 	RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
16*295968d1SFerruh Yigit 	RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
17*295968d1SFerruh Yigit 	RTE_ETH_RSS_IPV6 | \
18*295968d1SFerruh Yigit 	RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
19*295968d1SFerruh Yigit 	RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
20*295968d1SFerruh Yigit 	RTE_ETH_RSS_IPV6_EX | \
21*295968d1SFerruh Yigit 	RTE_ETH_RSS_IPV6_TCP_EX | \
22*295968d1SFerruh Yigit 	RTE_ETH_RSS_IPV6_UDP_EX)
233af0d308SIgor Russkikh 
24bb42aa9fSPavel Belous #define ATL_DEV_PRIVATE_TO_HW(adapter) \
25bb42aa9fSPavel Belous 	(&((struct atl_adapter *)adapter)->hw)
26bb42aa9fSPavel Belous 
273d38e3dcSIgor Russkikh #define ATL_DEV_TO_ADAPTER(dev) \
283d38e3dcSIgor Russkikh 	((struct atl_adapter *)(dev)->data->dev_private)
293d38e3dcSIgor Russkikh 
307943ba05SPavel Belous #define ATL_DEV_PRIVATE_TO_INTR(adapter) \
317943ba05SPavel Belous 	(&((struct atl_adapter *)adapter)->intr)
327943ba05SPavel Belous 
333af0d308SIgor Russkikh #define ATL_DEV_PRIVATE_TO_CFG(adapter) \
343af0d308SIgor Russkikh 	(&((struct atl_adapter *)adapter)->hw_cfg)
353af0d308SIgor Russkikh 
367943ba05SPavel Belous #define ATL_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0)
379f7e206aSPavel Belous #define ATL_FLAG_MACSEC (uint32_t)(4 << 0)
387943ba05SPavel Belous 
397943ba05SPavel Belous struct atl_interrupt {
407943ba05SPavel Belous 	uint32_t flags;
417943ba05SPavel Belous 	uint32_t mask;
427943ba05SPavel Belous };
433d38e3dcSIgor Russkikh 
445bcf1649SPavel Belous /*
455bcf1649SPavel Belous  * Structure to store private data for each driver instance (for each port).
465bcf1649SPavel Belous  */
475bcf1649SPavel Belous struct atl_adapter {
48bb42aa9fSPavel Belous 	struct aq_hw_s             hw;
49bb42aa9fSPavel Belous 	struct aq_hw_cfg_s         hw_cfg;
50fbe059e8SPavel Belous 	struct atl_sw_stats        sw_stats;
517943ba05SPavel Belous 	struct atl_interrupt       intr;
525bcf1649SPavel Belous };
535bcf1649SPavel Belous 
54b78958e2SPavel Belous /*
55b78958e2SPavel Belous  * RX/TX function prototypes
56b78958e2SPavel Belous  */
577483341aSXueming Li void atl_rx_queue_release(struct rte_eth_dev *dev, uint16_t rx_queue_id);
587483341aSXueming Li void atl_tx_queue_release(struct rte_eth_dev *dev, uint16_t tx_queue_id);
593d38e3dcSIgor Russkikh 
603d38e3dcSIgor Russkikh int atl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
613d38e3dcSIgor Russkikh 		uint16_t nb_rx_desc, unsigned int socket_id,
623d38e3dcSIgor Russkikh 		const struct rte_eth_rxconf *rx_conf,
633d38e3dcSIgor Russkikh 		struct rte_mempool *mb_pool);
643d38e3dcSIgor Russkikh 
652b1472d7SPavel Belous int atl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
662b1472d7SPavel Belous 		uint16_t nb_tx_desc, unsigned int socket_id,
672b1472d7SPavel Belous 		const struct rte_eth_txconf *tx_conf);
682b1472d7SPavel Belous 
698d7d4fcdSKonstantin Ananyev uint32_t atl_rx_queue_count(void *rx_queue);
70391de329SPavel Belous 
71391de329SPavel Belous int atl_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
72391de329SPavel Belous int atl_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
73391de329SPavel Belous 
747943ba05SPavel Belous int atl_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev,
757943ba05SPavel Belous 				 uint16_t queue_id);
767943ba05SPavel Belous int atl_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev,
777943ba05SPavel Belous 				  uint16_t queue_id);
787943ba05SPavel Belous 
79b78958e2SPavel Belous int atl_rx_init(struct rte_eth_dev *dev);
80b78958e2SPavel Belous int atl_tx_init(struct rte_eth_dev *dev);
81b78958e2SPavel Belous 
823d38e3dcSIgor Russkikh int atl_start_queues(struct rte_eth_dev *dev);
833d38e3dcSIgor Russkikh int atl_stop_queues(struct rte_eth_dev *dev);
843d38e3dcSIgor Russkikh void atl_free_queues(struct rte_eth_dev *dev);
853d38e3dcSIgor Russkikh 
863d38e3dcSIgor Russkikh int atl_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
873d38e3dcSIgor Russkikh int atl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
883d38e3dcSIgor Russkikh 
892b1472d7SPavel Belous int atl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
902b1472d7SPavel Belous int atl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
913d38e3dcSIgor Russkikh 
92391de329SPavel Belous void atl_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
93391de329SPavel Belous 	struct rte_eth_rxq_info *qinfo);
94391de329SPavel Belous 
95391de329SPavel Belous void atl_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
96391de329SPavel Belous 	struct rte_eth_txq_info *qinfo);
97391de329SPavel Belous 
98b78958e2SPavel Belous uint16_t atl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
99b78958e2SPavel Belous 		uint16_t nb_pkts);
100b78958e2SPavel Belous 
101b78958e2SPavel Belous uint16_t atl_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
102b78958e2SPavel Belous 		uint16_t nb_pkts);
103b78958e2SPavel Belous 
104b78958e2SPavel Belous uint16_t atl_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
105b78958e2SPavel Belous 		uint16_t nb_pkts);
106b78958e2SPavel Belous 
107ec0dec44SPavel Belous int atl_macsec_enable(struct rte_eth_dev *dev, uint8_t encr, uint8_t repl_prot);
108ec0dec44SPavel Belous int atl_macsec_disable(struct rte_eth_dev *dev);
109ec0dec44SPavel Belous int atl_macsec_config_txsc(struct rte_eth_dev *dev, uint8_t *mac);
110ec0dec44SPavel Belous int atl_macsec_config_rxsc(struct rte_eth_dev *dev,
111ec0dec44SPavel Belous 			   uint8_t *mac, uint16_t pi);
112ec0dec44SPavel Belous int atl_macsec_select_txsa(struct rte_eth_dev *dev, uint8_t idx,
113ec0dec44SPavel Belous 			   uint8_t an, uint32_t pn, uint8_t *key);
114ec0dec44SPavel Belous int atl_macsec_select_rxsa(struct rte_eth_dev *dev, uint8_t idx,
115ec0dec44SPavel Belous 			   uint8_t an, uint32_t pn, uint8_t *key);
116ec0dec44SPavel Belous 
117ec0dec44SPavel Belous bool is_atlantic_supported(struct rte_eth_dev *dev);
118ec0dec44SPavel Belous 
1195bcf1649SPavel Belous #endif /* _ATLANTIC_ETHDEV_H_ */
120