1540914bcSEd Czeck /* SPDX-License-Identifier: BSD-3-Clause 29ee9e0d3SEd Czeck * Copyright (c) 2015-2021 Atomic Rules LLC 3c33d45afSEd Czeck */ 4c33d45afSEd Czeck 5c33d45afSEd Czeck #include <unistd.h> 6c33d45afSEd Czeck 7c33d45afSEd Czeck #include "ark_ethdev_tx.h" 8c33d45afSEd Czeck #include "ark_global.h" 9c33d45afSEd Czeck #include "ark_mpu.h" 10c33d45afSEd Czeck #include "ark_ddm.h" 11c33d45afSEd Czeck #include "ark_logs.h" 12c33d45afSEd Czeck 13c33d45afSEd Czeck #define ARK_TX_META_SIZE 32 14c33d45afSEd Czeck #define ARK_TX_META_OFFSET (RTE_PKTMBUF_HEADROOM - ARK_TX_META_SIZE) 15c33d45afSEd Czeck #define ARK_TX_MAX_NOCHAIN (RTE_MBUF_DEFAULT_DATAROOM) 16c33d45afSEd Czeck 17e274fbfeSEd Czeck #ifndef RTE_LIBRTE_ARK_MIN_TX_PKTLEN 18e274fbfeSEd Czeck #define ARK_MIN_TX_PKTLEN 0 19e274fbfeSEd Czeck #else 20e274fbfeSEd Czeck #define ARK_MIN_TX_PKTLEN RTE_LIBRTE_ARK_MIN_TX_PKTLEN 21e274fbfeSEd Czeck #endif 22c33d45afSEd Czeck 23c33d45afSEd Czeck /* ************************************************************************* */ 2427595cd8STyler Retzlaff struct __rte_cache_aligned ark_tx_queue { 259ee9e0d3SEd Czeck union ark_tx_meta *meta_q; 26c33d45afSEd Czeck struct rte_mbuf **bufs; 27c33d45afSEd Czeck 28c33d45afSEd Czeck /* handles for hw objects */ 29c33d45afSEd Czeck struct ark_mpu_t *mpu; 30c33d45afSEd Czeck struct ark_ddm_t *ddm; 31c33d45afSEd Czeck 32c33d45afSEd Czeck /* Stats HW tracks bytes and packets, need to count send errors */ 33c33d45afSEd Czeck uint64_t tx_errors; 34c33d45afSEd Czeck 356c7f491eSEd Czeck tx_user_meta_hook_fn tx_user_meta_hook; 366c7f491eSEd Czeck void *ext_user_data; 376c7f491eSEd Czeck 38c33d45afSEd Czeck uint32_t queue_size; 39c33d45afSEd Czeck uint32_t queue_mask; 40c33d45afSEd Czeck 41c33d45afSEd Czeck /* 3 indexes to the paired data rings. */ 42*73c0e26cSEd Czeck uint32_t prod_index; /* where to put the next one */ 43*73c0e26cSEd Czeck uint32_t free_index; /* mbuf has been freed */ 44c33d45afSEd Czeck 45c33d45afSEd Czeck /* The queue Id is used to identify the HW Q */ 46c33d45afSEd Czeck uint16_t phys_qid; 47c33d45afSEd Czeck /* The queue Index within the dpdk device structures */ 48c33d45afSEd Czeck uint16_t queue_index; 49c33d45afSEd Czeck 506c7f491eSEd Czeck /* next cache line - fields written by device */ 5127595cd8STyler Retzlaff alignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1; 52*73c0e26cSEd Czeck volatile uint32_t cons_index; /* hw is done, can be freed */ 5327595cd8STyler Retzlaff }; 54c33d45afSEd Czeck 55c33d45afSEd Czeck /* Forward declarations */ 569ee9e0d3SEd Czeck static int eth_ark_tx_jumbo(struct ark_tx_queue *queue, 579ee9e0d3SEd Czeck struct rte_mbuf *mbuf, 589ee9e0d3SEd Czeck uint32_t *user_meta, uint8_t meta_cnt); 59c33d45afSEd Czeck static int eth_ark_tx_hw_queue_config(struct ark_tx_queue *queue); 60c33d45afSEd Czeck static void free_completed_tx(struct ark_tx_queue *queue); 61c33d45afSEd Czeck 62c33d45afSEd Czeck /* ************************************************************************* */ 63c33d45afSEd Czeck static inline void 649ee9e0d3SEd Czeck eth_ark_tx_desc_fill(struct ark_tx_queue *queue, 659ee9e0d3SEd Czeck struct rte_mbuf *mbuf, 669ee9e0d3SEd Czeck uint8_t flags, 679ee9e0d3SEd Czeck uint32_t *user_meta, 689ee9e0d3SEd Czeck uint8_t meta_cnt /* 0 to 5 */ 699ee9e0d3SEd Czeck ) 70c33d45afSEd Czeck { 719ee9e0d3SEd Czeck uint32_t tx_idx; 729ee9e0d3SEd Czeck union ark_tx_meta *meta; 739ee9e0d3SEd Czeck uint8_t m; 749ee9e0d3SEd Czeck 759ee9e0d3SEd Czeck /* Header */ 769ee9e0d3SEd Czeck tx_idx = queue->prod_index & queue->queue_mask; 779ee9e0d3SEd Czeck meta = &queue->meta_q[tx_idx]; 78c33d45afSEd Czeck meta->data_len = rte_pktmbuf_data_len(mbuf); 79c33d45afSEd Czeck meta->flags = flags; 809ee9e0d3SEd Czeck meta->meta_cnt = meta_cnt / 2; 819ee9e0d3SEd Czeck meta->user1 = meta_cnt ? (*user_meta++) : 0; 829ee9e0d3SEd Czeck queue->prod_index++; 839ee9e0d3SEd Czeck 849ee9e0d3SEd Czeck queue->bufs[tx_idx] = mbuf; 859ee9e0d3SEd Czeck 869ee9e0d3SEd Czeck /* 1 or 2 user meta data entries, user words 1,2 and 3,4 */ 879ee9e0d3SEd Czeck for (m = 1; m < meta_cnt; m += 2) { 889ee9e0d3SEd Czeck tx_idx = queue->prod_index & queue->queue_mask; 899ee9e0d3SEd Czeck meta = &queue->meta_q[tx_idx]; 909ee9e0d3SEd Czeck meta->usermeta0 = *user_meta++; 919ee9e0d3SEd Czeck meta->usermeta1 = *user_meta++; 929ee9e0d3SEd Czeck queue->prod_index++; 93c33d45afSEd Czeck } 94c33d45afSEd Czeck 959ee9e0d3SEd Czeck tx_idx = queue->prod_index & queue->queue_mask; 969ee9e0d3SEd Czeck meta = &queue->meta_q[tx_idx]; 979ee9e0d3SEd Czeck meta->physaddr = rte_mbuf_data_iova(mbuf); 989ee9e0d3SEd Czeck queue->prod_index++; 999ee9e0d3SEd Czeck } 1009ee9e0d3SEd Czeck 1019ee9e0d3SEd Czeck 102c33d45afSEd Czeck /* ************************************************************************* */ 103c33d45afSEd Czeck uint16_t 104c33d45afSEd Czeck eth_ark_xmit_pkts(void *vtxq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) 105c33d45afSEd Czeck { 106c33d45afSEd Czeck struct ark_tx_queue *queue; 107c33d45afSEd Czeck struct rte_mbuf *mbuf; 1086c7f491eSEd Czeck uint32_t user_meta[5]; 109c33d45afSEd Czeck 110c33d45afSEd Czeck int stat; 111*73c0e26cSEd Czeck uint32_t prod_index_limit; 112c33d45afSEd Czeck uint16_t nb; 1136c7f491eSEd Czeck uint8_t user_len = 0; 114e274fbfeSEd Czeck const uint32_t min_pkt_len = ARK_MIN_TX_PKTLEN; 1156c7f491eSEd Czeck tx_user_meta_hook_fn tx_user_meta_hook; 116c33d45afSEd Czeck 117c33d45afSEd Czeck queue = (struct ark_tx_queue *)vtxq; 1186c7f491eSEd Czeck tx_user_meta_hook = queue->tx_user_meta_hook; 119c33d45afSEd Czeck 120c33d45afSEd Czeck /* free any packets after the HW is done with them */ 121c33d45afSEd Czeck free_completed_tx(queue); 122c33d45afSEd Czeck 1239ee9e0d3SEd Czeck /* leave 4 elements mpu data */ 1249ee9e0d3SEd Czeck prod_index_limit = queue->queue_size + queue->free_index - 4; 125c33d45afSEd Czeck 126*73c0e26cSEd Czeck /* Populate the buffer bringing prod_index up to or slightly beyond 127*73c0e26cSEd Czeck * prod_index_limit. Prod_index will increment by 2 or more each 128*73c0e26cSEd Czeck * iteration. Note: indexes are uint32_t, cast to (signed) int32_t 129*73c0e26cSEd Czeck * to catch the slight overage case; e.g. (200 - 201) 130*73c0e26cSEd Czeck */ 131c33d45afSEd Czeck for (nb = 0; 132*73c0e26cSEd Czeck (nb < nb_pkts) && (int32_t)(prod_index_limit - queue->prod_index) > 0; 133c33d45afSEd Czeck ++nb) { 134c33d45afSEd Czeck mbuf = tx_pkts[nb]; 135c33d45afSEd Czeck 136e274fbfeSEd Czeck if (min_pkt_len && 137e274fbfeSEd Czeck unlikely(rte_pktmbuf_pkt_len(mbuf) < min_pkt_len)) { 138c33d45afSEd Czeck /* this packet even if it is small can be split, 139c33d45afSEd Czeck * be sure to add to the end mbuf 140c33d45afSEd Czeck */ 141e274fbfeSEd Czeck uint16_t to_add = min_pkt_len - 142e274fbfeSEd Czeck rte_pktmbuf_pkt_len(mbuf); 143c33d45afSEd Czeck char *appended = 144c33d45afSEd Czeck rte_pktmbuf_append(mbuf, to_add); 145c33d45afSEd Czeck 146c33d45afSEd Czeck if (appended == 0) { 147c33d45afSEd Czeck /* This packet is in error, 148c33d45afSEd Czeck * we cannot send it so just 149c33d45afSEd Czeck * count it and delete it. 150c33d45afSEd Czeck */ 151c33d45afSEd Czeck queue->tx_errors += 1; 152c33d45afSEd Czeck rte_pktmbuf_free(mbuf); 153c33d45afSEd Czeck continue; 154c33d45afSEd Czeck } 155c33d45afSEd Czeck memset(appended, 0, to_add); 156c33d45afSEd Czeck } 157c33d45afSEd Czeck 1586c7f491eSEd Czeck if (tx_user_meta_hook) 1596c7f491eSEd Czeck tx_user_meta_hook(mbuf, user_meta, &user_len, 1606c7f491eSEd Czeck queue->ext_user_data); 161c33d45afSEd Czeck if (unlikely(mbuf->nb_segs != 1)) { 1629ee9e0d3SEd Czeck stat = eth_ark_tx_jumbo(queue, mbuf, 1636c7f491eSEd Czeck user_meta, user_len); 164c33d45afSEd Czeck if (unlikely(stat != 0)) 165c33d45afSEd Czeck break; /* Queue is full */ 166c33d45afSEd Czeck } else { 1679ee9e0d3SEd Czeck eth_ark_tx_desc_fill(queue, mbuf, 1689ee9e0d3SEd Czeck ARK_DDM_SOP | ARK_DDM_EOP, 1696c7f491eSEd Czeck user_meta, user_len); 170c33d45afSEd Czeck } 171c33d45afSEd Czeck } 172c33d45afSEd Czeck 1731502d443SEd Czeck if (ARK_DEBUG_CORE && nb != nb_pkts) { 1741502d443SEd Czeck ARK_PMD_LOG(DEBUG, "TX: Failure to send:" 175c33d45afSEd Czeck " req: %" PRIU32 176c33d45afSEd Czeck " sent: %" PRIU32 177c33d45afSEd Czeck " prod: %" PRIU32 178c33d45afSEd Czeck " cons: %" PRIU32 179c33d45afSEd Czeck " free: %" PRIU32 "\n", 180c33d45afSEd Czeck nb_pkts, nb, 181c33d45afSEd Czeck queue->prod_index, 182c33d45afSEd Czeck queue->cons_index, 183c33d45afSEd Czeck queue->free_index); 184c33d45afSEd Czeck ark_mpu_dump(queue->mpu, 185c33d45afSEd Czeck "TX Failure MPU: ", 186c33d45afSEd Czeck queue->phys_qid); 187c33d45afSEd Czeck } 188c33d45afSEd Czeck 189c33d45afSEd Czeck /* let FPGA know producer index. */ 190c33d45afSEd Czeck if (likely(nb != 0)) 191c33d45afSEd Czeck ark_mpu_set_producer(queue->mpu, queue->prod_index); 192c33d45afSEd Czeck 193c33d45afSEd Czeck return nb; 194c33d45afSEd Czeck } 195c33d45afSEd Czeck 196c33d45afSEd Czeck /* ************************************************************************* */ 1979ee9e0d3SEd Czeck static int 1989ee9e0d3SEd Czeck eth_ark_tx_jumbo(struct ark_tx_queue *queue, struct rte_mbuf *mbuf, 1999ee9e0d3SEd Czeck uint32_t *user_meta, uint8_t meta_cnt) 200c33d45afSEd Czeck { 201c33d45afSEd Czeck struct rte_mbuf *next; 202*73c0e26cSEd Czeck uint32_t free_queue_space; 203c33d45afSEd Czeck uint8_t flags = ARK_DDM_SOP; 204c33d45afSEd Czeck 205c33d45afSEd Czeck free_queue_space = queue->queue_mask - 206c33d45afSEd Czeck (queue->prod_index - queue->free_index); 2079ee9e0d3SEd Czeck /* We need up to 4 mbufs for first header and 2 for subsequent ones */ 208*73c0e26cSEd Czeck if (unlikely(free_queue_space < (2U + (2U * mbuf->nb_segs)))) 209c33d45afSEd Czeck return -1; 210c33d45afSEd Czeck 211c33d45afSEd Czeck while (mbuf != NULL) { 212c33d45afSEd Czeck next = mbuf->next; 213c33d45afSEd Czeck flags |= (next == NULL) ? ARK_DDM_EOP : 0; 2149ee9e0d3SEd Czeck 2159ee9e0d3SEd Czeck eth_ark_tx_desc_fill(queue, mbuf, flags, user_meta, meta_cnt); 216c33d45afSEd Czeck 217c33d45afSEd Czeck flags &= ~ARK_DDM_SOP; /* drop SOP flags */ 2189ee9e0d3SEd Czeck meta_cnt = 0; /* Meta only on SOP */ 219c33d45afSEd Czeck mbuf = next; 220c33d45afSEd Czeck } 221c33d45afSEd Czeck 222c33d45afSEd Czeck return 0; 223c33d45afSEd Czeck } 224c33d45afSEd Czeck 225c33d45afSEd Czeck /* ************************************************************************* */ 226c33d45afSEd Czeck int 227c33d45afSEd Czeck eth_ark_tx_queue_setup(struct rte_eth_dev *dev, 228c33d45afSEd Czeck uint16_t queue_idx, 229c33d45afSEd Czeck uint16_t nb_desc, 230c33d45afSEd Czeck unsigned int socket_id, 231c33d45afSEd Czeck const struct rte_eth_txconf *tx_conf __rte_unused) 232c33d45afSEd Czeck { 2330bf8b0f1SStephen Hemminger struct ark_adapter *ark = dev->data->dev_private; 234c33d45afSEd Czeck struct ark_tx_queue *queue; 235c33d45afSEd Czeck int status; 236c33d45afSEd Czeck 237bf73ee28SEd Czeck int qidx = ark->qbase + queue_idx; 238c33d45afSEd Czeck 239c33d45afSEd Czeck if (!rte_is_power_of_2(nb_desc)) { 2401502d443SEd Czeck ARK_PMD_LOG(ERR, 241c33d45afSEd Czeck "DPDK Arkville configuration queue size" 242c33d45afSEd Czeck " must be power of two %u (%s)\n", 243c33d45afSEd Czeck nb_desc, __func__); 244c33d45afSEd Czeck return -1; 245c33d45afSEd Czeck } 246c33d45afSEd Czeck 2479ee9e0d3SEd Czeck /* Each packet requires at least 2 mpu elements - double desc count */ 2489ee9e0d3SEd Czeck nb_desc = 2 * nb_desc; 2499ee9e0d3SEd Czeck 250c33d45afSEd Czeck /* Allocate queue struct */ 251c33d45afSEd Czeck queue = rte_zmalloc_socket("Ark_txqueue", 252c33d45afSEd Czeck sizeof(struct ark_tx_queue), 253c33d45afSEd Czeck 64, 254c33d45afSEd Czeck socket_id); 255c33d45afSEd Czeck if (queue == 0) { 2561502d443SEd Czeck ARK_PMD_LOG(ERR, "Failed to allocate tx " 257c33d45afSEd Czeck "queue memory in %s\n", 258c33d45afSEd Czeck __func__); 259c33d45afSEd Czeck return -ENOMEM; 260c33d45afSEd Czeck } 261c33d45afSEd Czeck 262c33d45afSEd Czeck /* we use zmalloc no need to initialize fields */ 263c33d45afSEd Czeck queue->queue_size = nb_desc; 264c33d45afSEd Czeck queue->queue_mask = nb_desc - 1; 265c33d45afSEd Czeck queue->phys_qid = qidx; 266c33d45afSEd Czeck queue->queue_index = queue_idx; 267c33d45afSEd Czeck dev->data->tx_queues[queue_idx] = queue; 2686c7f491eSEd Czeck queue->tx_user_meta_hook = ark->user_ext.tx_user_meta_hook; 2696c7f491eSEd Czeck queue->ext_user_data = ark->user_data[dev->data->port_id]; 270c33d45afSEd Czeck 271c33d45afSEd Czeck queue->meta_q = 272c33d45afSEd Czeck rte_zmalloc_socket("Ark_txqueue meta", 2739ee9e0d3SEd Czeck nb_desc * sizeof(union ark_tx_meta), 274c33d45afSEd Czeck 64, 275c33d45afSEd Czeck socket_id); 276c33d45afSEd Czeck queue->bufs = 277c33d45afSEd Czeck rte_zmalloc_socket("Ark_txqueue bufs", 278c33d45afSEd Czeck nb_desc * sizeof(struct rte_mbuf *), 279c33d45afSEd Czeck 64, 280c33d45afSEd Czeck socket_id); 281c33d45afSEd Czeck 282c33d45afSEd Czeck if (queue->meta_q == 0 || queue->bufs == 0) { 2831502d443SEd Czeck ARK_PMD_LOG(ERR, "Failed to allocate " 284c33d45afSEd Czeck "queue memory in %s\n", __func__); 285c33d45afSEd Czeck rte_free(queue->meta_q); 286c33d45afSEd Czeck rte_free(queue->bufs); 287c33d45afSEd Czeck rte_free(queue); 288c33d45afSEd Czeck return -ENOMEM; 289c33d45afSEd Czeck } 290c33d45afSEd Czeck 291c33d45afSEd Czeck queue->ddm = RTE_PTR_ADD(ark->ddm.v, qidx * ARK_DDM_QOFFSET); 292c33d45afSEd Czeck queue->mpu = RTE_PTR_ADD(ark->mputx.v, qidx * ARK_MPU_QOFFSET); 293c33d45afSEd Czeck 294c33d45afSEd Czeck status = eth_ark_tx_hw_queue_config(queue); 295c33d45afSEd Czeck 296c33d45afSEd Czeck if (unlikely(status != 0)) { 297c33d45afSEd Czeck rte_free(queue->meta_q); 298c33d45afSEd Czeck rte_free(queue->bufs); 299c33d45afSEd Czeck rte_free(queue); 300c33d45afSEd Czeck return -1; /* ERROR CODE */ 301c33d45afSEd Czeck } 302c33d45afSEd Czeck 303c33d45afSEd Czeck return 0; 304c33d45afSEd Czeck } 305c33d45afSEd Czeck 306c33d45afSEd Czeck /* ************************************************************************* */ 307c33d45afSEd Czeck static int 308c33d45afSEd Czeck eth_ark_tx_hw_queue_config(struct ark_tx_queue *queue) 309c33d45afSEd Czeck { 310df6e0a06SSantosh Shukla rte_iova_t queue_base, ring_base, cons_index_addr; 311c33d45afSEd Czeck 312c33d45afSEd Czeck /* Verify HW -- MPU */ 3139ee9e0d3SEd Czeck if (ark_mpu_verify(queue->mpu, sizeof(union ark_tx_meta))) 314c33d45afSEd Czeck return -1; 315c33d45afSEd Czeck 31687cf4c6cSThomas Monjalon queue_base = rte_malloc_virt2iova(queue); 31787cf4c6cSThomas Monjalon ring_base = rte_malloc_virt2iova(queue->meta_q); 318c33d45afSEd Czeck cons_index_addr = 319c33d45afSEd Czeck queue_base + offsetof(struct ark_tx_queue, cons_index); 320c33d45afSEd Czeck 321c33d45afSEd Czeck ark_mpu_stop(queue->mpu); 322c33d45afSEd Czeck ark_mpu_reset(queue->mpu); 323c33d45afSEd Czeck 324c33d45afSEd Czeck /* Stop and Reset and configure MPU */ 325c33d45afSEd Czeck ark_mpu_configure(queue->mpu, ring_base, queue->queue_size, 1); 326c33d45afSEd Czeck 327c33d45afSEd Czeck /* Completion address in UDM */ 32838a4657eSEd Czeck ark_ddm_queue_setup(queue->ddm, cons_index_addr); 32938a4657eSEd Czeck ark_ddm_queue_reset_stats(queue->ddm); 330c33d45afSEd Czeck 331c33d45afSEd Czeck return 0; 332c33d45afSEd Czeck } 333c33d45afSEd Czeck 334c33d45afSEd Czeck /* ************************************************************************* */ 335c33d45afSEd Czeck void 336c33d45afSEd Czeck eth_ark_tx_queue_release(void *vtx_queue) 337c33d45afSEd Czeck { 338c33d45afSEd Czeck struct ark_tx_queue *queue; 339c33d45afSEd Czeck 340c33d45afSEd Czeck queue = (struct ark_tx_queue *)vtx_queue; 341c33d45afSEd Czeck 34238a4657eSEd Czeck ark_ddm_queue_enable(queue->ddm, 0); 34338a4657eSEd Czeck ark_mpu_stop(queue->mpu); 344c33d45afSEd Czeck 345c33d45afSEd Czeck queue->cons_index = queue->prod_index; 346c33d45afSEd Czeck free_completed_tx(queue); 347c33d45afSEd Czeck 348c33d45afSEd Czeck rte_free(queue->meta_q); 349c33d45afSEd Czeck rte_free(queue->bufs); 350c33d45afSEd Czeck rte_free(queue); 351c33d45afSEd Czeck } 352c33d45afSEd Czeck 353c33d45afSEd Czeck /* ************************************************************************* */ 354c33d45afSEd Czeck int 355c33d45afSEd Czeck eth_ark_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id) 356c33d45afSEd Czeck { 357c33d45afSEd Czeck struct ark_tx_queue *queue; 358c33d45afSEd Czeck int cnt = 0; 359c33d45afSEd Czeck 360c33d45afSEd Czeck queue = dev->data->tx_queues[queue_id]; 361c33d45afSEd Czeck 362c33d45afSEd Czeck /* Wait for DDM to send out all packets. */ 363c33d45afSEd Czeck while (queue->cons_index != queue->prod_index) { 364c33d45afSEd Czeck usleep(100); 365c33d45afSEd Czeck if (cnt++ > 10000) 366c33d45afSEd Czeck return -1; 367c33d45afSEd Czeck } 368c33d45afSEd Czeck 36938a4657eSEd Czeck ark_ddm_queue_enable(queue->ddm, 0); 370c33d45afSEd Czeck ark_mpu_stop(queue->mpu); 371c33d45afSEd Czeck free_completed_tx(queue); 372c33d45afSEd Czeck 373c33d45afSEd Czeck dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED; 374c33d45afSEd Czeck 375c33d45afSEd Czeck return 0; 376c33d45afSEd Czeck } 377c33d45afSEd Czeck 378c33d45afSEd Czeck int 379c33d45afSEd Czeck eth_ark_tx_queue_start(struct rte_eth_dev *dev, uint16_t queue_id) 380c33d45afSEd Czeck { 381c33d45afSEd Czeck struct ark_tx_queue *queue; 382c33d45afSEd Czeck 383c33d45afSEd Czeck queue = dev->data->tx_queues[queue_id]; 384c33d45afSEd Czeck if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_STARTED) 385c33d45afSEd Czeck return 0; 386c33d45afSEd Czeck 387c33d45afSEd Czeck ark_mpu_start(queue->mpu); 38838a4657eSEd Czeck ark_ddm_queue_enable(queue->ddm, 1); 389c33d45afSEd Czeck dev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STARTED; 390c33d45afSEd Czeck 391c33d45afSEd Czeck return 0; 392c33d45afSEd Czeck } 393c33d45afSEd Czeck 394c33d45afSEd Czeck /* ************************************************************************* */ 395c33d45afSEd Czeck static void 396c33d45afSEd Czeck free_completed_tx(struct ark_tx_queue *queue) 397c33d45afSEd Czeck { 398c33d45afSEd Czeck struct rte_mbuf *mbuf; 3999ee9e0d3SEd Czeck union ark_tx_meta *meta; 400*73c0e26cSEd Czeck uint32_t top_index; 401c33d45afSEd Czeck 402c33d45afSEd Czeck top_index = queue->cons_index; /* read once */ 403*73c0e26cSEd Czeck 404*73c0e26cSEd Czeck while ((int32_t)(top_index - queue->free_index) > 0) { 405c33d45afSEd Czeck meta = &queue->meta_q[queue->free_index & queue->queue_mask]; 406c33d45afSEd Czeck if (likely((meta->flags & ARK_DDM_SOP) != 0)) { 4079ee9e0d3SEd Czeck mbuf = queue->bufs[queue->free_index & 4089ee9e0d3SEd Czeck queue->queue_mask]; 409c33d45afSEd Czeck /* ref count of the mbuf is checked in this call. */ 410c33d45afSEd Czeck rte_pktmbuf_free(mbuf); 411c33d45afSEd Czeck } 4129ee9e0d3SEd Czeck queue->free_index += (meta->meta_cnt + 2); 413c33d45afSEd Czeck } 414c33d45afSEd Czeck } 415c33d45afSEd Czeck 416c33d45afSEd Czeck /* ************************************************************************* */ 417c33d45afSEd Czeck void 418c33d45afSEd Czeck eth_tx_queue_stats_get(void *vqueue, struct rte_eth_stats *stats) 419c33d45afSEd Czeck { 420c33d45afSEd Czeck struct ark_tx_queue *queue; 421c33d45afSEd Czeck struct ark_ddm_t *ddm; 422c33d45afSEd Czeck uint64_t bytes, pkts; 423c33d45afSEd Czeck 424c33d45afSEd Czeck queue = vqueue; 425c33d45afSEd Czeck ddm = queue->ddm; 426c33d45afSEd Czeck 427c33d45afSEd Czeck bytes = ark_ddm_queue_byte_count(ddm); 428c33d45afSEd Czeck pkts = ark_ddm_queue_pkt_count(ddm); 429c33d45afSEd Czeck 430c33d45afSEd Czeck stats->q_opackets[queue->queue_index] = pkts; 431c33d45afSEd Czeck stats->q_obytes[queue->queue_index] = bytes; 432c33d45afSEd Czeck stats->opackets += pkts; 433c33d45afSEd Czeck stats->obytes += bytes; 434c33d45afSEd Czeck stats->oerrors += queue->tx_errors; 435c33d45afSEd Czeck } 436c33d45afSEd Czeck 437c33d45afSEd Czeck void 438c33d45afSEd Czeck eth_tx_queue_stats_reset(void *vqueue) 439c33d45afSEd Czeck { 440c33d45afSEd Czeck struct ark_tx_queue *queue; 441c33d45afSEd Czeck struct ark_ddm_t *ddm; 442c33d45afSEd Czeck 443c33d45afSEd Czeck queue = vqueue; 444c33d45afSEd Czeck ddm = queue->ddm; 445c33d45afSEd Czeck 446c33d45afSEd Czeck ark_ddm_queue_reset_stats(ddm); 447c33d45afSEd Czeck queue->tx_errors = 0; 448c33d45afSEd Czeck } 449