1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Cavium, Inc 3 */ 4 5 #include <stdlib.h> 6 #include <string.h> 7 #include <stdbool.h> 8 #include <stdio.h> 9 #include <unistd.h> 10 #include <fcntl.h> 11 #include <errno.h> 12 #include <sys/mman.h> 13 14 #include <rte_atomic.h> 15 #include <rte_eal.h> 16 #include <rte_bus_pci.h> 17 #include <rte_errno.h> 18 #include <rte_memory.h> 19 #include <rte_malloc.h> 20 #include <rte_spinlock.h> 21 #include <rte_mbuf.h> 22 23 #include "octeontx_mbox.h" 24 #include "octeontx_fpavf.h" 25 26 /* FPA Mbox Message */ 27 #define IDENTIFY 0x0 28 29 #define FPA_CONFIGSET 0x1 30 #define FPA_CONFIGGET 0x2 31 #define FPA_START_COUNT 0x3 32 #define FPA_STOP_COUNT 0x4 33 #define FPA_ATTACHAURA 0x5 34 #define FPA_DETACHAURA 0x6 35 #define FPA_SETAURALVL 0x7 36 #define FPA_GETAURALVL 0x8 37 38 #define FPA_COPROC 0x1 39 40 /* fpa mbox struct */ 41 struct octeontx_mbox_fpa_cfg { 42 int aid; 43 uint64_t pool_cfg; 44 uint64_t pool_stack_base; 45 uint64_t pool_stack_end; 46 uint64_t aura_cfg; 47 }; 48 49 struct __attribute__((__packed__)) gen_req { 50 uint32_t value; 51 }; 52 53 struct __attribute__((__packed__)) idn_req { 54 uint8_t domain_id; 55 }; 56 57 struct __attribute__((__packed__)) gen_resp { 58 uint16_t domain_id; 59 uint16_t vfid; 60 }; 61 62 struct __attribute__((__packed__)) dcfg_resp { 63 uint8_t sso_count; 64 uint8_t ssow_count; 65 uint8_t fpa_count; 66 uint8_t pko_count; 67 uint8_t tim_count; 68 uint8_t net_port_count; 69 uint8_t virt_port_count; 70 }; 71 72 #define FPA_MAX_POOL 32 73 #define FPA_PF_PAGE_SZ 4096 74 75 #define FPA_LN_SIZE 128 76 #define FPA_ROUND_UP(x, size) \ 77 ((((unsigned long)(x)) + size-1) & (~(size-1))) 78 #define FPA_OBJSZ_2_CACHE_LINE(sz) (((sz) + RTE_CACHE_LINE_MASK) >> 7) 79 #define FPA_CACHE_LINE_2_OBJSZ(sz) ((sz) << 7) 80 81 #define POOL_ENA (0x1 << 0) 82 #define POOL_DIS (0x0 << 0) 83 #define POOL_SET_NAT_ALIGN (0x1 << 1) 84 #define POOL_DIS_NAT_ALIGN (0x0 << 1) 85 #define POOL_STYPE(x) (((x) & 0x1) << 2) 86 #define POOL_LTYPE(x) (((x) & 0x3) << 3) 87 #define POOL_BUF_OFFSET(x) (((x) & 0x7fffULL) << 16) 88 #define POOL_BUF_SIZE(x) (((x) & 0x7ffULL) << 32) 89 90 struct fpavf_res { 91 void *pool_stack_base; 92 void *bar0; 93 uint64_t stack_ln_ptr; 94 uint16_t domain_id; 95 uint16_t vf_id; /* gpool_id */ 96 uint16_t sz128; /* Block size in cache lines */ 97 bool is_inuse; 98 }; 99 100 struct octeontx_fpadev { 101 rte_spinlock_t lock; 102 uint8_t total_gpool_cnt; 103 struct fpavf_res pool[FPA_VF_MAX]; 104 }; 105 106 static struct octeontx_fpadev fpadev; 107 108 int octeontx_logtype_fpavf; 109 int octeontx_logtype_fpavf_mbox; 110 111 RTE_INIT(otx_pool_init_log); 112 static void 113 otx_pool_init_log(void) 114 { 115 octeontx_logtype_fpavf = rte_log_register("pmd.mempool.octeontx"); 116 if (octeontx_logtype_fpavf >= 0) 117 rte_log_set_level(octeontx_logtype_fpavf, RTE_LOG_NOTICE); 118 } 119 120 /* lock is taken by caller */ 121 static int 122 octeontx_fpa_gpool_alloc(unsigned int object_size) 123 { 124 struct fpavf_res *res = NULL; 125 uint16_t gpool; 126 unsigned int sz128; 127 128 sz128 = FPA_OBJSZ_2_CACHE_LINE(object_size); 129 130 for (gpool = 0; gpool < FPA_VF_MAX; gpool++) { 131 132 /* Skip VF that is not mapped Or _inuse */ 133 if ((fpadev.pool[gpool].bar0 == NULL) || 134 (fpadev.pool[gpool].is_inuse == true)) 135 continue; 136 137 res = &fpadev.pool[gpool]; 138 139 RTE_ASSERT(res->domain_id != (uint16_t)~0); 140 RTE_ASSERT(res->vf_id != (uint16_t)~0); 141 RTE_ASSERT(res->stack_ln_ptr != 0); 142 143 if (res->sz128 == 0) { 144 res->sz128 = sz128; 145 146 fpavf_log_dbg("gpool %d blk_sz %d\n", gpool, sz128); 147 return gpool; 148 } 149 } 150 151 return -ENOSPC; 152 } 153 154 /* lock is taken by caller */ 155 static __rte_always_inline uintptr_t 156 octeontx_fpa_gpool2handle(uint16_t gpool) 157 { 158 struct fpavf_res *res = NULL; 159 160 RTE_ASSERT(gpool < FPA_VF_MAX); 161 162 res = &fpadev.pool[gpool]; 163 return (uintptr_t)res->bar0 | gpool; 164 } 165 166 static __rte_always_inline bool 167 octeontx_fpa_handle_valid(uintptr_t handle) 168 { 169 struct fpavf_res *res = NULL; 170 uint8_t gpool; 171 int i; 172 bool ret = false; 173 174 if (unlikely(!handle)) 175 return ret; 176 177 /* get the gpool */ 178 gpool = octeontx_fpa_bufpool_gpool(handle); 179 180 /* get the bar address */ 181 handle &= ~(uint64_t)FPA_GPOOL_MASK; 182 for (i = 0; i < FPA_VF_MAX; i++) { 183 if ((uintptr_t)fpadev.pool[i].bar0 != handle) 184 continue; 185 186 /* validate gpool */ 187 if (gpool != i) 188 return false; 189 190 res = &fpadev.pool[i]; 191 192 if (res->sz128 == 0 || res->domain_id == (uint16_t)~0 || 193 res->stack_ln_ptr == 0) 194 ret = false; 195 else 196 ret = true; 197 break; 198 } 199 200 return ret; 201 } 202 203 static int 204 octeontx_fpapf_pool_setup(unsigned int gpool, unsigned int buf_size, 205 signed short buf_offset, unsigned int max_buf_count) 206 { 207 void *memptr = NULL; 208 rte_iova_t phys_addr; 209 unsigned int memsz; 210 struct fpavf_res *fpa = NULL; 211 uint64_t reg; 212 struct octeontx_mbox_hdr hdr; 213 struct dcfg_resp resp; 214 struct octeontx_mbox_fpa_cfg cfg; 215 int ret = -1; 216 217 fpa = &fpadev.pool[gpool]; 218 memsz = FPA_ROUND_UP(max_buf_count / fpa->stack_ln_ptr, FPA_LN_SIZE) * 219 FPA_LN_SIZE; 220 221 /* Round-up to page size */ 222 memsz = (memsz + FPA_PF_PAGE_SZ - 1) & ~(uintptr_t)(FPA_PF_PAGE_SZ-1); 223 memptr = rte_malloc(NULL, memsz, RTE_CACHE_LINE_SIZE); 224 if (memptr == NULL) { 225 ret = -ENOMEM; 226 goto err; 227 } 228 229 /* Configure stack */ 230 fpa->pool_stack_base = memptr; 231 phys_addr = rte_malloc_virt2iova(memptr); 232 233 buf_size /= FPA_LN_SIZE; 234 235 /* POOL setup */ 236 hdr.coproc = FPA_COPROC; 237 hdr.msg = FPA_CONFIGSET; 238 hdr.vfid = fpa->vf_id; 239 hdr.res_code = 0; 240 241 buf_offset /= FPA_LN_SIZE; 242 reg = POOL_BUF_SIZE(buf_size) | POOL_BUF_OFFSET(buf_offset) | 243 POOL_LTYPE(0x2) | POOL_STYPE(0) | POOL_SET_NAT_ALIGN | 244 POOL_ENA; 245 246 cfg.aid = 0; 247 cfg.pool_cfg = reg; 248 cfg.pool_stack_base = phys_addr; 249 cfg.pool_stack_end = phys_addr + memsz; 250 cfg.aura_cfg = (1 << 9); 251 252 ret = octeontx_mbox_send(&hdr, &cfg, 253 sizeof(struct octeontx_mbox_fpa_cfg), 254 &resp, sizeof(resp)); 255 if (ret < 0) { 256 ret = -EACCES; 257 goto err; 258 } 259 260 fpavf_log_dbg(" vfid %d gpool %d aid %d pool_cfg 0x%x pool_stack_base %" PRIx64 " pool_stack_end %" PRIx64" aura_cfg %" PRIx64 "\n", 261 fpa->vf_id, gpool, cfg.aid, (unsigned int)cfg.pool_cfg, 262 cfg.pool_stack_base, cfg.pool_stack_end, cfg.aura_cfg); 263 264 /* Now pool is in_use */ 265 fpa->is_inuse = true; 266 267 err: 268 if (ret < 0) 269 rte_free(memptr); 270 271 return ret; 272 } 273 274 static int 275 octeontx_fpapf_pool_destroy(unsigned int gpool_index) 276 { 277 struct octeontx_mbox_hdr hdr; 278 struct dcfg_resp resp; 279 struct octeontx_mbox_fpa_cfg cfg; 280 struct fpavf_res *fpa = NULL; 281 int ret = -1; 282 283 fpa = &fpadev.pool[gpool_index]; 284 285 hdr.coproc = FPA_COPROC; 286 hdr.msg = FPA_CONFIGSET; 287 hdr.vfid = fpa->vf_id; 288 hdr.res_code = 0; 289 290 /* reset and free the pool */ 291 cfg.aid = 0; 292 cfg.pool_cfg = 0; 293 cfg.pool_stack_base = 0; 294 cfg.pool_stack_end = 0; 295 cfg.aura_cfg = 0; 296 297 ret = octeontx_mbox_send(&hdr, &cfg, 298 sizeof(struct octeontx_mbox_fpa_cfg), 299 &resp, sizeof(resp)); 300 if (ret < 0) { 301 ret = -EACCES; 302 goto err; 303 } 304 305 ret = 0; 306 err: 307 /* anycase free pool stack memory */ 308 rte_free(fpa->pool_stack_base); 309 fpa->pool_stack_base = NULL; 310 return ret; 311 } 312 313 static int 314 octeontx_fpapf_aura_attach(unsigned int gpool_index) 315 { 316 struct octeontx_mbox_hdr hdr; 317 struct dcfg_resp resp; 318 struct octeontx_mbox_fpa_cfg cfg; 319 int ret = 0; 320 321 if (gpool_index >= FPA_MAX_POOL) { 322 ret = -EINVAL; 323 goto err; 324 } 325 hdr.coproc = FPA_COPROC; 326 hdr.msg = FPA_ATTACHAURA; 327 hdr.vfid = gpool_index; 328 hdr.res_code = 0; 329 memset(&cfg, 0x0, sizeof(struct octeontx_mbox_fpa_cfg)); 330 cfg.aid = gpool_index; /* gpool is guara */ 331 332 ret = octeontx_mbox_send(&hdr, &cfg, 333 sizeof(struct octeontx_mbox_fpa_cfg), 334 &resp, sizeof(resp)); 335 if (ret < 0) { 336 fpavf_log_err("Could not attach fpa "); 337 fpavf_log_err("aura %d to pool %d. Err=%d. FuncErr=%d\n", 338 gpool_index, gpool_index, ret, hdr.res_code); 339 ret = -EACCES; 340 goto err; 341 } 342 err: 343 return ret; 344 } 345 346 static int 347 octeontx_fpapf_aura_detach(unsigned int gpool_index) 348 { 349 struct octeontx_mbox_fpa_cfg cfg = {0}; 350 struct octeontx_mbox_hdr hdr = {0}; 351 int ret = 0; 352 353 if (gpool_index >= FPA_MAX_POOL) { 354 ret = -EINVAL; 355 goto err; 356 } 357 358 cfg.aid = gpool_index; /* gpool is gaura */ 359 hdr.coproc = FPA_COPROC; 360 hdr.msg = FPA_DETACHAURA; 361 hdr.vfid = gpool_index; 362 ret = octeontx_mbox_send(&hdr, &cfg, sizeof(cfg), NULL, 0); 363 if (ret < 0) { 364 fpavf_log_err("Couldn't detach FPA aura %d Err=%d FuncErr=%d\n", 365 gpool_index, ret, hdr.res_code); 366 ret = -EINVAL; 367 } 368 369 err: 370 return ret; 371 } 372 373 int 374 octeontx_fpavf_pool_set_range(uintptr_t handle, unsigned long memsz, 375 void *memva, uint16_t gpool) 376 { 377 uint64_t va_end; 378 379 if (unlikely(!handle)) 380 return -ENODEV; 381 382 va_end = (uintptr_t)memva + memsz; 383 va_end &= ~RTE_CACHE_LINE_MASK; 384 385 /* VHPOOL setup */ 386 fpavf_write64((uintptr_t)memva, 387 (void *)((uintptr_t)handle + 388 FPA_VF_VHPOOL_START_ADDR(gpool))); 389 fpavf_write64(va_end, 390 (void *)((uintptr_t)handle + 391 FPA_VF_VHPOOL_END_ADDR(gpool))); 392 return 0; 393 } 394 395 static int 396 octeontx_fpapf_start_count(uint16_t gpool_index) 397 { 398 int ret = 0; 399 struct octeontx_mbox_hdr hdr = {0}; 400 401 if (gpool_index >= FPA_MAX_POOL) { 402 ret = -EINVAL; 403 goto err; 404 } 405 406 hdr.coproc = FPA_COPROC; 407 hdr.msg = FPA_START_COUNT; 408 hdr.vfid = gpool_index; 409 ret = octeontx_mbox_send(&hdr, NULL, 0, NULL, 0); 410 if (ret < 0) { 411 fpavf_log_err("Could not start buffer counting for "); 412 fpavf_log_err("FPA pool %d. Err=%d. FuncErr=%d\n", 413 gpool_index, ret, hdr.res_code); 414 ret = -EINVAL; 415 goto err; 416 } 417 418 err: 419 return ret; 420 } 421 422 static __rte_always_inline int 423 octeontx_fpavf_free(unsigned int gpool) 424 { 425 int ret = 0; 426 427 if (gpool >= FPA_MAX_POOL) { 428 ret = -EINVAL; 429 goto err; 430 } 431 432 /* Pool is free */ 433 fpadev.pool[gpool].is_inuse = false; 434 435 err: 436 return ret; 437 } 438 439 static __rte_always_inline int 440 octeontx_gpool_free(uint16_t gpool) 441 { 442 if (fpadev.pool[gpool].sz128 != 0) { 443 fpadev.pool[gpool].sz128 = 0; 444 return 0; 445 } 446 return -EINVAL; 447 } 448 449 /* 450 * Return buffer size for a given pool 451 */ 452 int 453 octeontx_fpa_bufpool_block_size(uintptr_t handle) 454 { 455 struct fpavf_res *res = NULL; 456 uint8_t gpool; 457 458 if (unlikely(!octeontx_fpa_handle_valid(handle))) 459 return -EINVAL; 460 461 /* get the gpool */ 462 gpool = octeontx_fpa_bufpool_gpool(handle); 463 res = &fpadev.pool[gpool]; 464 return FPA_CACHE_LINE_2_OBJSZ(res->sz128); 465 } 466 467 int 468 octeontx_fpa_bufpool_free_count(uintptr_t handle) 469 { 470 uint64_t cnt, limit, avail; 471 uint8_t gpool; 472 uintptr_t pool_bar; 473 474 if (unlikely(!octeontx_fpa_handle_valid(handle))) 475 return -EINVAL; 476 477 /* get the gpool */ 478 gpool = octeontx_fpa_bufpool_gpool(handle); 479 480 /* Get pool bar address from handle */ 481 pool_bar = handle & ~(uint64_t)FPA_GPOOL_MASK; 482 483 cnt = fpavf_read64((void *)((uintptr_t)pool_bar + 484 FPA_VF_VHAURA_CNT(gpool))); 485 limit = fpavf_read64((void *)((uintptr_t)pool_bar + 486 FPA_VF_VHAURA_CNT_LIMIT(gpool))); 487 488 avail = fpavf_read64((void *)((uintptr_t)pool_bar + 489 FPA_VF_VHPOOL_AVAILABLE(gpool))); 490 491 return RTE_MIN(avail, (limit - cnt)); 492 } 493 494 uintptr_t 495 octeontx_fpa_bufpool_create(unsigned int object_size, unsigned int object_count, 496 unsigned int buf_offset, int node_id) 497 { 498 unsigned int gpool; 499 uintptr_t gpool_handle; 500 uintptr_t pool_bar; 501 int res; 502 503 RTE_SET_USED(node_id); 504 RTE_BUILD_BUG_ON(sizeof(struct rte_mbuf) > OCTEONTX_FPAVF_BUF_OFFSET); 505 506 object_size = RTE_CACHE_LINE_ROUNDUP(object_size); 507 if (object_size > FPA_MAX_OBJ_SIZE) { 508 errno = EINVAL; 509 goto error_end; 510 } 511 512 rte_spinlock_lock(&fpadev.lock); 513 res = octeontx_fpa_gpool_alloc(object_size); 514 515 /* Bail if failed */ 516 if (unlikely(res < 0)) { 517 errno = res; 518 goto error_unlock; 519 } 520 521 /* get fpavf */ 522 gpool = res; 523 524 /* get pool handle */ 525 gpool_handle = octeontx_fpa_gpool2handle(gpool); 526 if (!octeontx_fpa_handle_valid(gpool_handle)) { 527 errno = ENOSPC; 528 goto error_gpool_free; 529 } 530 531 /* Get pool bar address from handle */ 532 pool_bar = gpool_handle & ~(uint64_t)FPA_GPOOL_MASK; 533 534 res = octeontx_fpapf_pool_setup(gpool, object_size, buf_offset, 535 object_count); 536 if (res < 0) { 537 errno = res; 538 goto error_gpool_free; 539 } 540 541 /* populate AURA fields */ 542 res = octeontx_fpapf_aura_attach(gpool); 543 if (res < 0) { 544 errno = res; 545 goto error_pool_destroy; 546 } 547 548 /* Release lock */ 549 rte_spinlock_unlock(&fpadev.lock); 550 551 /* populate AURA registers */ 552 fpavf_write64(object_count, (void *)((uintptr_t)pool_bar + 553 FPA_VF_VHAURA_CNT(gpool))); 554 fpavf_write64(object_count, (void *)((uintptr_t)pool_bar + 555 FPA_VF_VHAURA_CNT_LIMIT(gpool))); 556 fpavf_write64(object_count + 1, (void *)((uintptr_t)pool_bar + 557 FPA_VF_VHAURA_CNT_THRESHOLD(gpool))); 558 559 octeontx_fpapf_start_count(gpool); 560 561 return gpool_handle; 562 563 error_pool_destroy: 564 octeontx_fpavf_free(gpool); 565 octeontx_fpapf_pool_destroy(gpool); 566 error_gpool_free: 567 octeontx_gpool_free(gpool); 568 error_unlock: 569 rte_spinlock_unlock(&fpadev.lock); 570 error_end: 571 return (uintptr_t)NULL; 572 } 573 574 /* 575 * Destroy a buffer pool. 576 */ 577 int 578 octeontx_fpa_bufpool_destroy(uintptr_t handle, int node_id) 579 { 580 void **node, **curr, *head = NULL; 581 uint64_t sz; 582 uint64_t cnt, avail; 583 uint8_t gpool; 584 uintptr_t pool_bar; 585 int ret; 586 587 RTE_SET_USED(node_id); 588 589 /* Wait for all outstanding writes to be committed */ 590 rte_smp_wmb(); 591 592 if (unlikely(!octeontx_fpa_handle_valid(handle))) 593 return -EINVAL; 594 595 /* get the pool */ 596 gpool = octeontx_fpa_bufpool_gpool(handle); 597 598 /* Get pool bar address from handle */ 599 pool_bar = handle & ~(uint64_t)FPA_GPOOL_MASK; 600 601 /* Check for no outstanding buffers */ 602 cnt = fpavf_read64((void *)((uintptr_t)pool_bar + 603 FPA_VF_VHAURA_CNT(gpool))); 604 if (cnt) { 605 fpavf_log_dbg("buffer exist in pool cnt %" PRId64 "\n", cnt); 606 return -EBUSY; 607 } 608 609 rte_spinlock_lock(&fpadev.lock); 610 611 avail = fpavf_read64((void *)((uintptr_t)pool_bar + 612 FPA_VF_VHPOOL_AVAILABLE(gpool))); 613 614 /* Prepare to empty the entire POOL */ 615 fpavf_write64(avail, (void *)((uintptr_t)pool_bar + 616 FPA_VF_VHAURA_CNT_LIMIT(gpool))); 617 fpavf_write64(avail + 1, (void *)((uintptr_t)pool_bar + 618 FPA_VF_VHAURA_CNT_THRESHOLD(gpool))); 619 620 /* Empty the pool */ 621 /* Invalidate the POOL */ 622 octeontx_gpool_free(gpool); 623 624 /* Process all buffers in the pool */ 625 while (avail--) { 626 627 /* Yank a buffer from the pool */ 628 node = (void *)(uintptr_t) 629 fpavf_read64((void *) 630 (pool_bar + FPA_VF_VHAURA_OP_ALLOC(gpool))); 631 632 if (node == NULL) { 633 fpavf_log_err("GAURA[%u] missing %" PRIx64 " buf\n", 634 gpool, avail); 635 break; 636 } 637 638 /* Imsert it into an ordered linked list */ 639 for (curr = &head; curr[0] != NULL; curr = curr[0]) { 640 if ((uintptr_t)node <= (uintptr_t)curr[0]) 641 break; 642 } 643 node[0] = curr[0]; 644 curr[0] = node; 645 } 646 647 /* Verify the linked list to be a perfect series */ 648 sz = octeontx_fpa_bufpool_block_size(handle) << 7; 649 for (curr = head; curr != NULL && curr[0] != NULL; 650 curr = curr[0]) { 651 if (curr == curr[0] || 652 ((uintptr_t)curr != ((uintptr_t)curr[0] - sz))) { 653 fpavf_log_err("POOL# %u buf sequence err (%p vs. %p)\n", 654 gpool, curr, curr[0]); 655 } 656 } 657 658 /* Disable pool operation */ 659 fpavf_write64(~0ul, (void *)((uintptr_t)pool_bar + 660 FPA_VF_VHPOOL_START_ADDR(gpool))); 661 fpavf_write64(~0ul, (void *)((uintptr_t)pool_bar + 662 FPA_VF_VHPOOL_END_ADDR(gpool))); 663 664 (void)octeontx_fpapf_pool_destroy(gpool); 665 666 /* Deactivate the AURA */ 667 fpavf_write64(0, (void *)((uintptr_t)pool_bar + 668 FPA_VF_VHAURA_CNT_LIMIT(gpool))); 669 fpavf_write64(0, (void *)((uintptr_t)pool_bar + 670 FPA_VF_VHAURA_CNT_THRESHOLD(gpool))); 671 672 ret = octeontx_fpapf_aura_detach(gpool); 673 if (ret) { 674 fpavf_log_err("Failed to dettach gaura %u. error code=%d\n", 675 gpool, ret); 676 } 677 678 /* Free VF */ 679 (void)octeontx_fpavf_free(gpool); 680 681 rte_spinlock_unlock(&fpadev.lock); 682 return 0; 683 } 684 685 static void 686 octeontx_fpavf_setup(void) 687 { 688 uint8_t i; 689 static bool init_once; 690 691 if (!init_once) { 692 rte_spinlock_init(&fpadev.lock); 693 fpadev.total_gpool_cnt = 0; 694 695 for (i = 0; i < FPA_VF_MAX; i++) { 696 697 fpadev.pool[i].domain_id = ~0; 698 fpadev.pool[i].stack_ln_ptr = 0; 699 fpadev.pool[i].sz128 = 0; 700 fpadev.pool[i].bar0 = NULL; 701 fpadev.pool[i].pool_stack_base = NULL; 702 fpadev.pool[i].is_inuse = false; 703 } 704 init_once = 1; 705 } 706 } 707 708 static int 709 octeontx_fpavf_identify(void *bar0) 710 { 711 uint64_t val; 712 uint16_t domain_id; 713 uint16_t vf_id; 714 uint64_t stack_ln_ptr; 715 716 val = fpavf_read64((void *)((uintptr_t)bar0 + 717 FPA_VF_VHAURA_CNT_THRESHOLD(0))); 718 719 domain_id = (val >> 8) & 0xffff; 720 vf_id = (val >> 24) & 0xffff; 721 722 stack_ln_ptr = fpavf_read64((void *)((uintptr_t)bar0 + 723 FPA_VF_VHPOOL_THRESHOLD(0))); 724 if (vf_id >= FPA_VF_MAX) { 725 fpavf_log_err("vf_id(%d) greater than max vf (32)\n", vf_id); 726 return -1; 727 } 728 729 if (fpadev.pool[vf_id].is_inuse) { 730 fpavf_log_err("vf_id %d is_inuse\n", vf_id); 731 return -1; 732 } 733 734 fpadev.pool[vf_id].domain_id = domain_id; 735 fpadev.pool[vf_id].vf_id = vf_id; 736 fpadev.pool[vf_id].bar0 = bar0; 737 fpadev.pool[vf_id].stack_ln_ptr = stack_ln_ptr; 738 739 /* SUCCESS */ 740 return vf_id; 741 } 742 743 /* FPAVF pcie device aka mempool probe */ 744 static int 745 fpavf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) 746 { 747 uint8_t *idreg; 748 int res; 749 struct fpavf_res *fpa = NULL; 750 751 RTE_SET_USED(pci_drv); 752 RTE_SET_USED(fpa); 753 754 /* For secondary processes, the primary has done all the work */ 755 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 756 return 0; 757 758 if (pci_dev->mem_resource[0].addr == NULL) { 759 fpavf_log_err("Empty bars %p ", pci_dev->mem_resource[0].addr); 760 return -ENODEV; 761 } 762 idreg = pci_dev->mem_resource[0].addr; 763 764 octeontx_fpavf_setup(); 765 766 res = octeontx_fpavf_identify(idreg); 767 if (res < 0) 768 return -1; 769 770 fpa = &fpadev.pool[res]; 771 fpadev.total_gpool_cnt++; 772 rte_wmb(); 773 774 fpavf_log_dbg("total_fpavfs %d bar0 %p domain %d vf %d stk_ln_ptr 0x%x", 775 fpadev.total_gpool_cnt, fpa->bar0, fpa->domain_id, 776 fpa->vf_id, (unsigned int)fpa->stack_ln_ptr); 777 778 return 0; 779 } 780 781 static const struct rte_pci_id pci_fpavf_map[] = { 782 { 783 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 784 PCI_DEVICE_ID_OCTEONTX_FPA_VF) 785 }, 786 { 787 .vendor_id = 0, 788 }, 789 }; 790 791 static struct rte_pci_driver pci_fpavf = { 792 .id_table = pci_fpavf_map, 793 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA, 794 .probe = fpavf_probe, 795 }; 796 797 RTE_PMD_REGISTER_PCI(octeontx_fpavf, pci_fpavf); 798