xref: /dpdk/drivers/event/cnxk/tx/cn10k/tx_all_offload.c (revision eabbac98af1345157e07c431e18543296c37c355)
1*eabbac98SPavan Nikhilesh /* SPDX-License-Identifier: BSD-3-Clause
2*eabbac98SPavan Nikhilesh  * Copyright(C) 2022 Marvell.
3*eabbac98SPavan Nikhilesh  */
4*eabbac98SPavan Nikhilesh 
5*eabbac98SPavan Nikhilesh #include "cn10k_tx_worker.h"
6*eabbac98SPavan Nikhilesh 
7*eabbac98SPavan Nikhilesh #ifdef _ROC_API_H_
8*eabbac98SPavan Nikhilesh #error "roc_api.h is included"
9*eabbac98SPavan Nikhilesh #endif
10*eabbac98SPavan Nikhilesh 
11*eabbac98SPavan Nikhilesh #if defined(CNXK_DIS_TMPLT_FUNC)
12*eabbac98SPavan Nikhilesh 
13*eabbac98SPavan Nikhilesh uint16_t __rte_hot
cn10k_sso_hws_tx_adptr_enq_seg_all_offload(void * port,struct rte_event ev[],uint16_t nb_events)14*eabbac98SPavan Nikhilesh cn10k_sso_hws_tx_adptr_enq_seg_all_offload(void *port, struct rte_event ev[], uint16_t nb_events)
15*eabbac98SPavan Nikhilesh {
16*eabbac98SPavan Nikhilesh 	const uint32_t flags = (NIX_TX_OFFLOAD_L3_L4_CSUM_F | NIX_TX_OFFLOAD_MBUF_NOFF_F |
17*eabbac98SPavan Nikhilesh 				NIX_TX_MULTI_SEG_F | NIX_TX_OFFLOAD_SECURITY_F);
18*eabbac98SPavan Nikhilesh 	uint64_t cmd[8 + CNXK_NIX_TX_MSEG_SG_DWORDS - 2];
19*eabbac98SPavan Nikhilesh 
20*eabbac98SPavan Nikhilesh 	struct cn10k_sso_hws *ws = port;
21*eabbac98SPavan Nikhilesh 	RTE_SET_USED(nb_events);
22*eabbac98SPavan Nikhilesh 	return cn10k_sso_hws_event_tx(ws, &ev[0], cmd, (const uint64_t *)ws->tx_adptr_data, flags);
23*eabbac98SPavan Nikhilesh }
24*eabbac98SPavan Nikhilesh 
25*eabbac98SPavan Nikhilesh uint16_t __rte_hot
cn10k_sso_hws_tx_adptr_enq_seg_all_offload_tst(void * port,struct rte_event ev[],uint16_t nb_events)26*eabbac98SPavan Nikhilesh cn10k_sso_hws_tx_adptr_enq_seg_all_offload_tst(void *port, struct rte_event ev[],
27*eabbac98SPavan Nikhilesh 					       uint16_t nb_events)
28*eabbac98SPavan Nikhilesh {
29*eabbac98SPavan Nikhilesh 	const uint32_t flags =
30*eabbac98SPavan Nikhilesh 		(NIX_TX_OFFLOAD_L3_L4_CSUM_F | NIX_TX_OFFLOAD_OL3_OL4_CSUM_F |
31*eabbac98SPavan Nikhilesh 		 NIX_TX_OFFLOAD_VLAN_QINQ_F | NIX_TX_OFFLOAD_MBUF_NOFF_F | NIX_TX_OFFLOAD_TSO_F |
32*eabbac98SPavan Nikhilesh 		 NIX_TX_OFFLOAD_TSTAMP_F | NIX_TX_OFFLOAD_SECURITY_F | NIX_TX_MULTI_SEG_F);
33*eabbac98SPavan Nikhilesh 	uint64_t cmd[8 + CNXK_NIX_TX_MSEG_SG_DWORDS - 2];
34*eabbac98SPavan Nikhilesh 
35*eabbac98SPavan Nikhilesh 	struct cn10k_sso_hws *ws = port;
36*eabbac98SPavan Nikhilesh 	RTE_SET_USED(nb_events);
37*eabbac98SPavan Nikhilesh 	return cn10k_sso_hws_event_tx(ws, &ev[0], cmd, (const uint64_t *)ws->tx_adptr_data, flags);
38*eabbac98SPavan Nikhilesh }
39*eabbac98SPavan Nikhilesh 
40*eabbac98SPavan Nikhilesh #endif
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