1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Marvell International Ltd. 3 * Copyright(c) 2017 Semihalf. 4 * All rights reserved. 5 */ 6 7 #include <string.h> 8 9 #include <rte_common.h> 10 #include <rte_malloc.h> 11 #include <rte_cryptodev_pmd.h> 12 13 #include "rte_mrvl_pmd_private.h" 14 15 /** 16 * Capabilities list to be used in reporting to DPDK. 17 */ 18 static const struct rte_cryptodev_capabilities 19 mrvl_crypto_pmd_capabilities[] = { 20 { /* MD5 HMAC */ 21 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 22 {.sym = { 23 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 24 {.auth = { 25 .algo = RTE_CRYPTO_AUTH_MD5_HMAC, 26 .block_size = 64, 27 .key_size = { 28 .min = 1, 29 .max = 64, 30 .increment = 1 31 }, 32 .digest_size = { 33 .min = 12, 34 .max = 16, 35 .increment = 4 36 }, 37 }, } 38 }, } 39 }, 40 { /* MD5 */ 41 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 42 {.sym = { 43 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 44 {.auth = { 45 .algo = RTE_CRYPTO_AUTH_MD5, 46 .block_size = 64, 47 .key_size = { 48 .min = 0, 49 .max = 0, 50 .increment = 0 51 }, 52 .digest_size = { 53 .min = 12, 54 .max = 16, 55 .increment = 4 56 }, 57 }, } 58 }, } 59 }, 60 { /* SHA1 HMAC */ 61 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 62 {.sym = { 63 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 64 {.auth = { 65 .algo = RTE_CRYPTO_AUTH_SHA1_HMAC, 66 .block_size = 64, 67 .key_size = { 68 .min = 1, 69 .max = 64, 70 .increment = 1 71 }, 72 .digest_size = { 73 .min = 12, 74 .max = 20, 75 .increment = 4 76 }, 77 }, } 78 }, } 79 }, 80 { /* SHA1 */ 81 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 82 {.sym = { 83 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 84 {.auth = { 85 .algo = RTE_CRYPTO_AUTH_SHA1, 86 .block_size = 64, 87 .key_size = { 88 .min = 0, 89 .max = 0, 90 .increment = 0 91 }, 92 .digest_size = { 93 .min = 12, 94 .max = 20, 95 .increment = 4 96 }, 97 }, } 98 }, } 99 }, 100 { 101 /* SHA224 HMAC */ 102 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 103 {.sym = { 104 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 105 {.auth = { 106 .algo = RTE_CRYPTO_AUTH_SHA224_HMAC, 107 .block_size = 64, 108 .key_size = { 109 .min = 1, 110 .max = 64, 111 .increment = 1 112 }, 113 .digest_size = { 114 .min = 28, 115 .max = 28, 116 .increment = 0 117 }, 118 }, } 119 }, } 120 }, 121 { /* SHA224 */ 122 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 123 {.sym = { 124 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 125 {.auth = { 126 .algo = RTE_CRYPTO_AUTH_SHA224, 127 .block_size = 64, 128 .key_size = { 129 .min = 0, 130 .max = 0, 131 .increment = 0 132 }, 133 .digest_size = { 134 .min = 12, 135 .max = 28, 136 .increment = 4 137 }, 138 }, } 139 }, } 140 }, 141 { /* SHA256 HMAC */ 142 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 143 {.sym = { 144 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 145 {.auth = { 146 .algo = RTE_CRYPTO_AUTH_SHA256_HMAC, 147 .block_size = 64, 148 .key_size = { 149 .min = 1, 150 .max = 64, 151 .increment = 1 152 }, 153 .digest_size = { 154 .min = 12, 155 .max = 32, 156 .increment = 4 157 }, 158 }, } 159 }, } 160 }, 161 { /* SHA256 */ 162 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 163 {.sym = { 164 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 165 {.auth = { 166 .algo = RTE_CRYPTO_AUTH_SHA256, 167 .block_size = 64, 168 .key_size = { 169 .min = 0, 170 .max = 0, 171 .increment = 0 172 }, 173 .digest_size = { 174 .min = 12, 175 .max = 32, 176 .increment = 4 177 }, 178 }, } 179 }, } 180 }, 181 { /* SHA384 HMAC */ 182 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 183 {.sym = { 184 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 185 {.auth = { 186 .algo = RTE_CRYPTO_AUTH_SHA384_HMAC, 187 .block_size = 128, 188 .key_size = { 189 .min = 1, 190 .max = 128, 191 .increment = 1 192 }, 193 .digest_size = { 194 .min = 12, 195 .max = 48, 196 .increment = 4 197 }, 198 }, } 199 }, } 200 }, 201 { /* SHA384 */ 202 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 203 {.sym = { 204 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 205 {.auth = { 206 .algo = RTE_CRYPTO_AUTH_SHA384, 207 .block_size = 128, 208 .key_size = { 209 .min = 0, 210 .max = 0, 211 .increment = 0 212 }, 213 .digest_size = { 214 .min = 12, 215 .max = 48, 216 .increment = 4 217 }, 218 }, } 219 }, } 220 }, 221 { /* SHA512 HMAC */ 222 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 223 {.sym = { 224 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 225 {.auth = { 226 .algo = RTE_CRYPTO_AUTH_SHA512_HMAC, 227 .block_size = 128, 228 .key_size = { 229 .min = 1, 230 .max = 128, 231 .increment = 1 232 }, 233 .digest_size = { 234 .min = 12, 235 .max = 48, 236 .increment = 4 237 }, 238 }, } 239 }, } 240 }, 241 { /* SHA512 */ 242 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 243 {.sym = { 244 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 245 {.auth = { 246 .algo = RTE_CRYPTO_AUTH_SHA512, 247 .block_size = 128, 248 .key_size = { 249 .min = 0, 250 .max = 0, 251 .increment = 0 252 }, 253 .digest_size = { 254 .min = 12, 255 .max = 48, 256 .increment = 0 257 }, 258 }, } 259 }, } 260 }, 261 { /* AES CBC */ 262 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 263 {.sym = { 264 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 265 {.cipher = { 266 .algo = RTE_CRYPTO_CIPHER_AES_CBC, 267 .block_size = 16, 268 .key_size = { 269 .min = 16, 270 .max = 32, 271 .increment = 8 272 }, 273 .iv_size = { 274 .min = 16, 275 .max = 16, 276 .increment = 0 277 } 278 }, } 279 }, } 280 }, 281 { /* AES CTR */ 282 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 283 {.sym = { 284 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 285 {.cipher = { 286 .algo = RTE_CRYPTO_CIPHER_AES_CTR, 287 .block_size = 16, 288 .key_size = { 289 .min = 16, 290 .max = 32, 291 .increment = 8 292 }, 293 .iv_size = { 294 .min = 16, 295 .max = 16, 296 .increment = 0 297 } 298 }, } 299 }, } 300 }, 301 { /* AES ECB */ 302 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 303 {.sym = { 304 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 305 {.cipher = { 306 .algo = RTE_CRYPTO_CIPHER_AES_ECB, 307 .block_size = 16, 308 .key_size = { 309 .min = 16, 310 .max = 32, 311 .increment = 8 312 }, 313 .iv_size = { 314 .min = 0, 315 .max = 0, 316 .increment = 0 317 } 318 }, } 319 }, } 320 }, 321 { /* AES GCM */ 322 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 323 {.sym = { 324 .xform_type = RTE_CRYPTO_SYM_XFORM_AEAD, 325 {.aead = { 326 .algo = RTE_CRYPTO_AEAD_AES_GCM, 327 .block_size = 16, 328 .key_size = { 329 .min = 16, 330 .max = 32, 331 .increment = 8 332 }, 333 .digest_size = { 334 .min = 16, 335 .max = 16, 336 .increment = 0 337 }, 338 .aad_size = { 339 .min = 8, 340 .max = 12, 341 .increment = 4 342 }, 343 .iv_size = { 344 .min = 12, 345 .max = 16, 346 .increment = 4 347 } 348 }, } 349 }, } 350 }, 351 { /* AES GMAC (AUTH) */ 352 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 353 {.sym = { 354 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 355 {.auth = { 356 .algo = RTE_CRYPTO_AUTH_AES_GMAC, 357 .block_size = 16, 358 .key_size = { 359 .min = 16, 360 .max = 32, 361 .increment = 8 362 }, 363 .digest_size = { 364 .min = 16, 365 .max = 16, 366 .increment = 0 367 }, 368 .iv_size = { 369 .min = 8, 370 .max = 65532, 371 .increment = 4 372 } 373 }, } 374 }, } 375 }, 376 { /* 3DES CBC */ 377 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 378 {.sym = { 379 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 380 {.cipher = { 381 .algo = RTE_CRYPTO_CIPHER_3DES_CBC, 382 .block_size = 8, 383 .key_size = { 384 .min = 24, 385 .max = 24, 386 .increment = 0 387 }, 388 .iv_size = { 389 .min = 8, 390 .max = 8, 391 .increment = 0 392 } 393 }, } 394 }, } 395 }, 396 { /* 3DES CTR */ 397 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 398 {.sym = { 399 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 400 {.cipher = { 401 .algo = RTE_CRYPTO_CIPHER_3DES_CTR, 402 .block_size = 8, 403 .key_size = { 404 .min = 24, 405 .max = 24, 406 .increment = 0 407 }, 408 .iv_size = { 409 .min = 8, 410 .max = 8, 411 .increment = 0 412 } 413 }, } 414 }, } 415 }, 416 { /* 3DES ECB */ 417 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 418 {.sym = { 419 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 420 {.cipher = { 421 .algo = RTE_CRYPTO_CIPHER_3DES_ECB, 422 .block_size = 8, 423 .key_size = { 424 .min = 24, 425 .max = 24, 426 .increment = 0 427 }, 428 .iv_size = { 429 .min = 0, 430 .max = 0, 431 .increment = 0 432 } 433 }, } 434 }, } 435 }, 436 { /* NULL (AUTH) */ 437 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 438 {.sym = { 439 .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 440 {.auth = { 441 .algo = RTE_CRYPTO_AUTH_NULL, 442 .block_size = 1, 443 .key_size = { 444 .min = 0, 445 .max = 0, 446 .increment = 0 447 }, 448 .digest_size = { 449 .min = 0, 450 .max = 0, 451 .increment = 0 452 }, 453 .iv_size = { 454 .min = 0, 455 .max = 0, 456 .increment = 0 457 } 458 }, }, 459 }, }, 460 }, 461 { /* NULL (CIPHER) */ 462 .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 463 {.sym = { 464 .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 465 {.cipher = { 466 .algo = RTE_CRYPTO_CIPHER_NULL, 467 .block_size = 1, 468 .key_size = { 469 .min = 0, 470 .max = 0, 471 .increment = 0 472 }, 473 .iv_size = { 474 .min = 0, 475 .max = 0, 476 .increment = 0 477 } 478 }, }, 479 }, } 480 }, 481 482 RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() 483 }; 484 485 486 /** 487 * Configure device (PMD ops callback). 488 * 489 * @param dev Pointer to the device structure. 490 * @param config Pointer to configuration structure. 491 * @returns 0. Always. 492 */ 493 static int 494 mrvl_crypto_pmd_config(__rte_unused struct rte_cryptodev *dev, 495 __rte_unused struct rte_cryptodev_config *config) 496 { 497 return 0; 498 } 499 500 /** 501 * Start device (PMD ops callback). 502 * 503 * @param dev Pointer to the device structure. 504 * @returns 0. Always. 505 */ 506 static int 507 mrvl_crypto_pmd_start(__rte_unused struct rte_cryptodev *dev) 508 { 509 return 0; 510 } 511 512 /** 513 * Stop device (PMD ops callback). 514 * 515 * @param dev Pointer to the device structure. 516 * @returns 0. Always. 517 */ 518 static void 519 mrvl_crypto_pmd_stop(__rte_unused struct rte_cryptodev *dev) 520 { 521 } 522 523 /** 524 * Get device statistics (PMD ops callback). 525 * 526 * @param dev Pointer to the device structure. 527 * @param stats Pointer to statistics structure [out]. 528 */ 529 static void 530 mrvl_crypto_pmd_stats_get(struct rte_cryptodev *dev, 531 struct rte_cryptodev_stats *stats) 532 { 533 int qp_id; 534 535 for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) { 536 struct mrvl_crypto_qp *qp = dev->data->queue_pairs[qp_id]; 537 538 stats->enqueued_count += qp->stats.enqueued_count; 539 stats->dequeued_count += qp->stats.dequeued_count; 540 541 stats->enqueue_err_count += qp->stats.enqueue_err_count; 542 stats->dequeue_err_count += qp->stats.dequeue_err_count; 543 } 544 } 545 546 /** 547 * Reset device statistics (PMD ops callback). 548 * 549 * @param dev Pointer to the device structure. 550 */ 551 static void 552 mrvl_crypto_pmd_stats_reset(struct rte_cryptodev *dev) 553 { 554 int qp_id; 555 556 for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) { 557 struct mrvl_crypto_qp *qp = dev->data->queue_pairs[qp_id]; 558 559 memset(&qp->stats, 0, sizeof(qp->stats)); 560 } 561 } 562 563 /** 564 * Get device info (PMD ops callback). 565 * 566 * @param dev Pointer to the device structure. 567 * @param dev_info Pointer to the device info structure [out]. 568 */ 569 static void 570 mrvl_crypto_pmd_info_get(struct rte_cryptodev *dev, 571 struct rte_cryptodev_info *dev_info) 572 { 573 struct mrvl_crypto_private *internals = dev->data->dev_private; 574 575 if (dev_info != NULL) { 576 dev_info->driver_id = dev->driver_id; 577 dev_info->feature_flags = dev->feature_flags; 578 dev_info->capabilities = mrvl_crypto_pmd_capabilities; 579 dev_info->max_nb_queue_pairs = internals->max_nb_qpairs; 580 dev_info->sym.max_nb_sessions = internals->max_nb_sessions; 581 } 582 } 583 584 /** 585 * Release queue pair (PMD ops callback). 586 * 587 * @param dev Pointer to the device structure. 588 * @param qp_id ID of Queue Pair to release. 589 * @returns 0. Always. 590 */ 591 static int 592 mrvl_crypto_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id) 593 { 594 struct mrvl_crypto_qp *qp = 595 (struct mrvl_crypto_qp *)dev->data->queue_pairs[qp_id]; 596 597 if (dev->data->queue_pairs[qp_id] != NULL) { 598 sam_cio_flush(qp->cio); 599 sam_cio_deinit(qp->cio); 600 rte_free(dev->data->queue_pairs[qp_id]); 601 dev->data->queue_pairs[qp_id] = NULL; 602 } 603 604 return 0; 605 } 606 607 /** 608 * Close device (PMD ops callback). 609 * 610 * @param dev Pointer to the device structure. 611 * @returns 0. Always. 612 */ 613 static int 614 mrvl_crypto_pmd_close(struct rte_cryptodev *dev) 615 { 616 int qp_id; 617 618 for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) 619 mrvl_crypto_pmd_qp_release(dev, qp_id); 620 621 return 0; 622 } 623 624 /** 625 * Setup a queue pair (PMD ops callback). 626 * 627 * @param dev Pointer to the device structure. 628 * @param qp_id ID of the Queue Pair. 629 * @param qp_conf Queue pair configuration (nb of descriptors). 630 * @param socket_id NUMA socket to allocate memory on. 631 * @returns 0 upon success, negative value otherwise. 632 */ 633 static int 634 mrvl_crypto_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id, 635 const struct rte_cryptodev_qp_conf *qp_conf, 636 int socket_id) 637 { 638 struct mrvl_crypto_qp *qp = NULL; 639 char match[RTE_CRYPTODEV_NAME_MAX_LEN]; 640 unsigned int n; 641 642 /* Allocate the queue pair data structure. */ 643 qp = rte_zmalloc_socket("MRVL Crypto PMD Queue Pair", sizeof(*qp), 644 RTE_CACHE_LINE_SIZE, socket_id); 645 if (qp == NULL) 646 return -ENOMEM; 647 648 /* Free old qp prior setup if needed. */ 649 if (dev->data->queue_pairs[qp_id] != NULL) 650 mrvl_crypto_pmd_qp_release(dev, qp_id); 651 652 do { /* Error handling block */ 653 654 /* 655 * This extra check is necessary due to a bug in 656 * crypto library. 657 */ 658 int num = sam_get_num_inst(); 659 if (num == 0) { 660 MRVL_LOG(ERR, "No crypto engines detected!"); 661 return -1; 662 } 663 664 /* 665 * In case two crypto engines are enabled qps will 666 * be evenly spread among them. Even and odd qps will 667 * be handled by cio-0 and cio-1 respectively. qp-cio mapping 668 * will look as follows: 669 * 670 * qp: 0 1 2 3 671 * cio-x:y: cio-0:0, cio-1:0, cio-0:1, cio-1:1 672 * 673 * qp: 4 5 6 7 674 * cio-x:y: cio-0:2, cio-1:2, cio-0:3, cio-1:3 675 * 676 * In case just one engine is enabled mapping will look as 677 * follows: 678 * qp: 0 1 2 3 679 * cio-x:y: cio-0:0, cio-0:1, cio-0:2, cio-0:3 680 */ 681 n = snprintf(match, sizeof(match), "cio-%u:%u", 682 qp_id % num, qp_id / num); 683 684 if (n >= sizeof(match)) 685 break; 686 687 qp->cio_params.match = match; 688 qp->cio_params.size = qp_conf->nb_descriptors; 689 690 if (sam_cio_init(&qp->cio_params, &qp->cio) < 0) 691 break; 692 693 qp->sess_mp = qp_conf->mp_session; 694 qp->sess_mp_priv = qp_conf->mp_session_private; 695 696 memset(&qp->stats, 0, sizeof(qp->stats)); 697 dev->data->queue_pairs[qp_id] = qp; 698 return 0; 699 } while (0); 700 701 rte_free(qp); 702 return -1; 703 } 704 705 /** Return the number of allocated queue pairs (PMD ops callback). 706 * 707 * @param dev Pointer to the device structure. 708 * @returns Number of allocated queue pairs. 709 */ 710 static uint32_t 711 mrvl_crypto_pmd_qp_count(struct rte_cryptodev *dev) 712 { 713 return dev->data->nb_queue_pairs; 714 } 715 716 /** Returns the size of the session structure (PMD ops callback). 717 * 718 * @param dev Pointer to the device structure [Unused]. 719 * @returns Size of Marvell crypto session. 720 */ 721 static unsigned 722 mrvl_crypto_pmd_sym_session_get_size(__rte_unused struct rte_cryptodev *dev) 723 { 724 return sizeof(struct mrvl_crypto_session); 725 } 726 727 /** Configure the session from a crypto xform chain (PMD ops callback). 728 * 729 * @param dev Pointer to the device structure. 730 * @param xform Pointer to the crypto configuration structure. 731 * @param sess Pointer to the empty session structure. 732 * @returns 0 upon success, negative value otherwise. 733 */ 734 static int 735 mrvl_crypto_pmd_sym_session_configure(__rte_unused struct rte_cryptodev *dev, 736 struct rte_crypto_sym_xform *xform, 737 struct rte_cryptodev_sym_session *sess, 738 struct rte_mempool *mp) 739 { 740 struct mrvl_crypto_session *mrvl_sess; 741 void *sess_private_data; 742 int ret; 743 744 if (sess == NULL) { 745 MRVL_LOG(ERR, "Invalid session struct!"); 746 return -EINVAL; 747 } 748 749 if (rte_mempool_get(mp, &sess_private_data)) { 750 CDEV_LOG_ERR("Couldn't get object from session mempool."); 751 return -ENOMEM; 752 } 753 754 memset(sess_private_data, 0, sizeof(struct mrvl_crypto_session)); 755 756 ret = mrvl_crypto_set_session_parameters(sess_private_data, xform); 757 if (ret != 0) { 758 MRVL_LOG(ERR, "Failed to configure session parameters!"); 759 760 /* Return session to mempool */ 761 rte_mempool_put(mp, sess_private_data); 762 return ret; 763 } 764 765 set_sym_session_private_data(sess, dev->driver_id, sess_private_data); 766 767 mrvl_sess = (struct mrvl_crypto_session *)sess_private_data; 768 if (sam_session_create(&mrvl_sess->sam_sess_params, 769 &mrvl_sess->sam_sess) < 0) { 770 MRVL_LOG(DEBUG, "Failed to create session!"); 771 return -EIO; 772 } 773 774 /* free the keys memory allocated for session creation */ 775 if (mrvl_sess->sam_sess_params.cipher_key != NULL) 776 free(mrvl_sess->sam_sess_params.cipher_key); 777 if (mrvl_sess->sam_sess_params.auth_key != NULL) 778 free(mrvl_sess->sam_sess_params.auth_key); 779 780 return 0; 781 } 782 783 /** 784 * Clear the memory of session so it doesn't leave key material behind. 785 * 786 * @param dev Pointer to the device structure. 787 * @returns 0. Always. 788 */ 789 static void 790 mrvl_crypto_pmd_sym_session_clear(struct rte_cryptodev *dev, 791 struct rte_cryptodev_sym_session *sess) 792 { 793 794 uint8_t index = dev->driver_id; 795 void *sess_priv = get_sym_session_private_data(sess, index); 796 797 /* Zero out the whole structure */ 798 if (sess_priv) { 799 struct mrvl_crypto_session *mrvl_sess = 800 (struct mrvl_crypto_session *)sess_priv; 801 802 if (mrvl_sess->sam_sess && 803 sam_session_destroy(mrvl_sess->sam_sess) < 0) { 804 MRVL_LOG(ERR, "Error while destroying session!"); 805 } 806 807 memset(sess, 0, sizeof(struct mrvl_crypto_session)); 808 struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv); 809 set_sym_session_private_data(sess, index, NULL); 810 rte_mempool_put(sess_mp, sess_priv); 811 } 812 } 813 814 /** 815 * PMD handlers for crypto ops. 816 */ 817 static struct rte_cryptodev_ops mrvl_crypto_pmd_ops = { 818 .dev_configure = mrvl_crypto_pmd_config, 819 .dev_start = mrvl_crypto_pmd_start, 820 .dev_stop = mrvl_crypto_pmd_stop, 821 .dev_close = mrvl_crypto_pmd_close, 822 823 .dev_infos_get = mrvl_crypto_pmd_info_get, 824 825 .stats_get = mrvl_crypto_pmd_stats_get, 826 .stats_reset = mrvl_crypto_pmd_stats_reset, 827 828 .queue_pair_setup = mrvl_crypto_pmd_qp_setup, 829 .queue_pair_release = mrvl_crypto_pmd_qp_release, 830 .queue_pair_count = mrvl_crypto_pmd_qp_count, 831 832 .sym_session_get_size = mrvl_crypto_pmd_sym_session_get_size, 833 .sym_session_configure = mrvl_crypto_pmd_sym_session_configure, 834 .sym_session_clear = mrvl_crypto_pmd_sym_session_clear 835 }; 836 837 struct rte_cryptodev_ops *rte_mrvl_crypto_pmd_ops = &mrvl_crypto_pmd_ops; 838