1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved. 3 */ 4 5 #ifndef _CCP_CRYPTO_H_ 6 #define _CCP_CRYPTO_H_ 7 8 #include <limits.h> 9 #include <stdbool.h> 10 #include <stdint.h> 11 #include <string.h> 12 13 #include <rte_atomic.h> 14 #include <rte_byteorder.h> 15 #include <rte_io.h> 16 #include <rte_pci.h> 17 #include <rte_spinlock.h> 18 #include <rte_crypto_sym.h> 19 #include <rte_cryptodev.h> 20 21 #include "ccp_dev.h" 22 23 #define AES_BLOCK_SIZE 16 24 #define CMAC_PAD_VALUE 0x80 25 #define CTR_NONCE_SIZE 4 26 #define CTR_IV_SIZE 8 27 #define CCP_SHA3_CTX_SIZE 200 28 29 /**Macro helpers for CCP command creation*/ 30 #define CCP_AES_SIZE(p) ((p)->aes.size) 31 #define CCP_AES_ENCRYPT(p) ((p)->aes.encrypt) 32 #define CCP_AES_MODE(p) ((p)->aes.mode) 33 #define CCP_AES_TYPE(p) ((p)->aes.type) 34 #define CCP_DES_ENCRYPT(p) ((p)->des.encrypt) 35 #define CCP_DES_MODE(p) ((p)->des.mode) 36 #define CCP_DES_TYPE(p) ((p)->des.type) 37 #define CCP_PT_BYTESWAP(p) ((p)->pt.byteswap) 38 #define CCP_PT_BITWISE(p) ((p)->pt.bitwise) 39 40 /** 41 * CCP supported AES modes 42 */ 43 enum ccp_aes_mode { 44 CCP_AES_MODE_ECB = 0, 45 CCP_AES_MODE_CBC, 46 CCP_AES_MODE_OFB, 47 CCP_AES_MODE_CFB, 48 CCP_AES_MODE_CTR, 49 CCP_AES_MODE_CMAC, 50 CCP_AES_MODE_GHASH, 51 CCP_AES_MODE_GCTR, 52 CCP_AES_MODE__LAST, 53 }; 54 55 /** 56 * CCP AES GHASH mode 57 */ 58 enum ccp_aes_ghash_mode { 59 CCP_AES_MODE_GHASH_AAD = 0, 60 CCP_AES_MODE_GHASH_FINAL 61 }; 62 63 /** 64 * CCP supported AES types 65 */ 66 enum ccp_aes_type { 67 CCP_AES_TYPE_128 = 0, 68 CCP_AES_TYPE_192, 69 CCP_AES_TYPE_256, 70 CCP_AES_TYPE__LAST, 71 }; 72 73 /***** 3DES engine *****/ 74 75 /** 76 * CCP supported DES/3DES modes 77 */ 78 enum ccp_des_mode { 79 CCP_DES_MODE_ECB = 0, /* Not supported */ 80 CCP_DES_MODE_CBC, 81 CCP_DES_MODE_CFB, 82 }; 83 84 /** 85 * CCP supported DES types 86 */ 87 enum ccp_des_type { 88 CCP_DES_TYPE_128 = 0, /* 112 + 16 parity */ 89 CCP_DES_TYPE_192, /* 168 + 24 parity */ 90 CCP_DES_TYPE__LAST, 91 }; 92 93 /***** SHA engine *****/ 94 95 /** 96 * ccp_sha_type - type of SHA operation 97 * 98 * @CCP_SHA_TYPE_1: SHA-1 operation 99 * @CCP_SHA_TYPE_224: SHA-224 operation 100 * @CCP_SHA_TYPE_256: SHA-256 operation 101 */ 102 enum ccp_sha_type { 103 CCP_SHA_TYPE_1 = 1, 104 CCP_SHA_TYPE_224, 105 CCP_SHA_TYPE_256, 106 CCP_SHA_TYPE_384, 107 CCP_SHA_TYPE_512, 108 CCP_SHA_TYPE_RSVD1, 109 CCP_SHA_TYPE_RSVD2, 110 CCP_SHA3_TYPE_224, 111 CCP_SHA3_TYPE_256, 112 CCP_SHA3_TYPE_384, 113 CCP_SHA3_TYPE_512, 114 CCP_SHA_TYPE__LAST, 115 }; 116 117 /** 118 * CCP supported cipher algorithms 119 */ 120 enum ccp_cipher_algo { 121 CCP_CIPHER_ALGO_AES_CBC = 0, 122 CCP_CIPHER_ALGO_AES_ECB, 123 CCP_CIPHER_ALGO_AES_CTR, 124 CCP_CIPHER_ALGO_AES_GCM, 125 CCP_CIPHER_ALGO_3DES_CBC, 126 }; 127 128 /** 129 * CCP cipher operation type 130 */ 131 enum ccp_cipher_dir { 132 CCP_CIPHER_DIR_DECRYPT = 0, 133 CCP_CIPHER_DIR_ENCRYPT = 1, 134 }; 135 136 /** 137 * CCP supported hash algorithms 138 */ 139 enum ccp_hash_algo { 140 CCP_AUTH_ALGO_SHA1 = 0, 141 CCP_AUTH_ALGO_SHA1_HMAC, 142 CCP_AUTH_ALGO_SHA224, 143 CCP_AUTH_ALGO_SHA224_HMAC, 144 CCP_AUTH_ALGO_SHA3_224, 145 CCP_AUTH_ALGO_SHA3_224_HMAC, 146 CCP_AUTH_ALGO_SHA256, 147 CCP_AUTH_ALGO_SHA256_HMAC, 148 CCP_AUTH_ALGO_SHA3_256, 149 CCP_AUTH_ALGO_SHA3_256_HMAC, 150 CCP_AUTH_ALGO_SHA384, 151 CCP_AUTH_ALGO_SHA384_HMAC, 152 CCP_AUTH_ALGO_SHA3_384, 153 CCP_AUTH_ALGO_SHA3_384_HMAC, 154 CCP_AUTH_ALGO_SHA512, 155 CCP_AUTH_ALGO_SHA512_HMAC, 156 CCP_AUTH_ALGO_SHA3_512, 157 CCP_AUTH_ALGO_SHA3_512_HMAC, 158 CCP_AUTH_ALGO_AES_CMAC, 159 CCP_AUTH_ALGO_AES_GCM, 160 #ifdef RTE_LIBRTE_PMD_CCP_CPU_AUTH 161 CCP_AUTH_ALGO_MD5_HMAC, 162 #endif 163 }; 164 165 /** 166 * CCP hash operation type 167 */ 168 enum ccp_hash_op { 169 CCP_AUTH_OP_GENERATE = 0, 170 CCP_AUTH_OP_VERIFY = 1, 171 }; 172 173 /* CCP crypto private session structure */ 174 struct ccp_session { 175 enum ccp_cmd_order cmd_id; 176 /**< chain order mode */ 177 struct { 178 uint16_t length; 179 uint16_t offset; 180 } iv; 181 /**< IV parameters */ 182 struct { 183 enum ccp_cipher_algo algo; 184 enum ccp_engine engine; 185 union { 186 enum ccp_aes_mode aes_mode; 187 enum ccp_des_mode des_mode; 188 } um; 189 union { 190 enum ccp_aes_type aes_type; 191 enum ccp_des_type des_type; 192 } ut; 193 enum ccp_cipher_dir dir; 194 uint64_t key_length; 195 /**< max cipher key size 256 bits */ 196 uint8_t key[32]; 197 /**ccp key format*/ 198 uint8_t key_ccp[32]; 199 phys_addr_t key_phys; 200 /**AES-ctr nonce(4) iv(8) ctr*/ 201 uint8_t nonce[32]; 202 phys_addr_t nonce_phys; 203 } cipher; 204 /**< Cipher Parameters */ 205 206 struct { 207 enum ccp_hash_algo algo; 208 enum ccp_engine engine; 209 union { 210 enum ccp_aes_mode aes_mode; 211 } um; 212 union { 213 enum ccp_sha_type sha_type; 214 enum ccp_aes_type aes_type; 215 } ut; 216 enum ccp_hash_op op; 217 uint64_t key_length; 218 /**< max hash key size 144 bytes (struct capabilties) */ 219 uint8_t key[144]; 220 /**< max be key size of AES is 32*/ 221 uint8_t key_ccp[32]; 222 phys_addr_t key_phys; 223 uint64_t digest_length; 224 void *ctx; 225 int ctx_len; 226 int offset; 227 int block_size; 228 /**< Buffer to store Software generated precomute values*/ 229 /**< For HMAC H(ipad ^ key) and H(opad ^ key) */ 230 /**< For CMAC K1 IV and K2 IV*/ 231 uint8_t pre_compute[2 * CCP_SHA3_CTX_SIZE]; 232 /**< SHA3 initial ctx all zeros*/ 233 uint8_t sha3_ctx[200]; 234 int aad_length; 235 } auth; 236 /**< Authentication Parameters */ 237 enum rte_crypto_aead_algorithm aead_algo; 238 /**< AEAD Algorithm */ 239 240 uint32_t reserved; 241 } __rte_cache_aligned; 242 243 extern uint8_t ccp_cryptodev_driver_id; 244 245 struct ccp_qp; 246 247 /** 248 * Set and validate CCP crypto session parameters 249 * 250 * @param sess ccp private session 251 * @param xform crypto xform for this session 252 * @return 0 on success otherwise -1 253 */ 254 int ccp_set_session_parameters(struct ccp_session *sess, 255 const struct rte_crypto_sym_xform *xform); 256 257 /** 258 * Find count of slots 259 * 260 * @param session CCP private session 261 * @return count of free slots available 262 */ 263 int ccp_compute_slot_count(struct ccp_session *session); 264 265 /** 266 * process crypto ops to be enqueued 267 * 268 * @param qp CCP crypto queue-pair 269 * @param op crypto ops table 270 * @param cmd_q CCP cmd queue 271 * @param nb_ops No. of ops to be submitted 272 * @return 0 on success otherwise -1 273 */ 274 int process_ops_to_enqueue(const struct ccp_qp *qp, 275 struct rte_crypto_op **op, 276 struct ccp_queue *cmd_q, 277 uint16_t nb_ops, 278 int slots_req); 279 280 /** 281 * process crypto ops to be dequeued 282 * 283 * @param qp CCP crypto queue-pair 284 * @param op crypto ops table 285 * @param nb_ops requested no. of ops 286 * @return 0 on success otherwise -1 287 */ 288 int process_ops_to_dequeue(struct ccp_qp *qp, 289 struct rte_crypto_op **op, 290 uint16_t nb_ops); 291 292 #endif /* _CCP_CRYPTO_H_ */ 293