1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2015-2019 Intel Corporation 3 */ 4 5 #include <rte_malloc.h> 6 7 #include "qat_comp.h" 8 #include "qat_comp_pmd.h" 9 10 #define QAT_PMD_COMP_SGL_DEF_SEGMENTS 16 11 12 static const struct rte_compressdev_capabilities qat_comp_gen_capabilities[] = { 13 {/* COMPRESSION - deflate */ 14 .algo = RTE_COMP_ALGO_DEFLATE, 15 .comp_feature_flags = RTE_COMP_FF_MULTI_PKT_CHECKSUM | 16 RTE_COMP_FF_CRC32_CHECKSUM | 17 RTE_COMP_FF_ADLER32_CHECKSUM | 18 RTE_COMP_FF_CRC32_ADLER32_CHECKSUM | 19 RTE_COMP_FF_SHAREABLE_PRIV_XFORM | 20 RTE_COMP_FF_HUFFMAN_FIXED | 21 RTE_COMP_FF_HUFFMAN_DYNAMIC | 22 RTE_COMP_FF_OOP_SGL_IN_SGL_OUT | 23 RTE_COMP_FF_OOP_SGL_IN_LB_OUT | 24 RTE_COMP_FF_OOP_LB_IN_SGL_OUT, 25 .window_size = {.min = 15, .max = 15, .increment = 0} }, 26 {RTE_COMP_ALGO_LIST_END, 0, {0, 0, 0} } }; 27 28 static void 29 qat_comp_stats_get(struct rte_compressdev *dev, 30 struct rte_compressdev_stats *stats) 31 { 32 struct qat_common_stats qat_stats = {0}; 33 struct qat_comp_dev_private *qat_priv; 34 35 if (stats == NULL || dev == NULL) { 36 QAT_LOG(ERR, "invalid ptr: stats %p, dev %p", stats, dev); 37 return; 38 } 39 qat_priv = dev->data->dev_private; 40 41 qat_stats_get(qat_priv->qat_dev, &qat_stats, QAT_SERVICE_COMPRESSION); 42 stats->enqueued_count = qat_stats.enqueued_count; 43 stats->dequeued_count = qat_stats.dequeued_count; 44 stats->enqueue_err_count = qat_stats.enqueue_err_count; 45 stats->dequeue_err_count = qat_stats.dequeue_err_count; 46 } 47 48 static void 49 qat_comp_stats_reset(struct rte_compressdev *dev) 50 { 51 struct qat_comp_dev_private *qat_priv; 52 53 if (dev == NULL) { 54 QAT_LOG(ERR, "invalid compressdev ptr %p", dev); 55 return; 56 } 57 qat_priv = dev->data->dev_private; 58 59 qat_stats_reset(qat_priv->qat_dev, QAT_SERVICE_COMPRESSION); 60 61 } 62 63 static int 64 qat_comp_qp_release(struct rte_compressdev *dev, uint16_t queue_pair_id) 65 { 66 struct qat_comp_dev_private *qat_private = dev->data->dev_private; 67 struct qat_qp **qp_addr = 68 (struct qat_qp **)&(dev->data->queue_pairs[queue_pair_id]); 69 struct qat_qp *qp = (struct qat_qp *)*qp_addr; 70 uint32_t i; 71 72 QAT_LOG(DEBUG, "Release comp qp %u on device %d", 73 queue_pair_id, dev->data->dev_id); 74 75 qat_private->qat_dev->qps_in_use[QAT_SERVICE_COMPRESSION][queue_pair_id] 76 = NULL; 77 78 for (i = 0; i < qp->nb_descriptors; i++) { 79 80 struct qat_comp_op_cookie *cookie = qp->op_cookies[i]; 81 82 rte_free(cookie->qat_sgl_src_d); 83 rte_free(cookie->qat_sgl_dst_d); 84 } 85 86 return qat_qp_release((struct qat_qp **) 87 &(dev->data->queue_pairs[queue_pair_id])); 88 } 89 90 static int 91 qat_comp_qp_setup(struct rte_compressdev *dev, uint16_t qp_id, 92 uint32_t max_inflight_ops, int socket_id) 93 { 94 struct qat_qp *qp; 95 int ret = 0; 96 uint32_t i; 97 struct qat_qp_config qat_qp_conf; 98 99 struct qat_qp **qp_addr = 100 (struct qat_qp **)&(dev->data->queue_pairs[qp_id]); 101 struct qat_comp_dev_private *qat_private = dev->data->dev_private; 102 const struct qat_qp_hw_data *comp_hw_qps = 103 qat_gen_config[qat_private->qat_dev->qat_dev_gen] 104 .qp_hw_data[QAT_SERVICE_COMPRESSION]; 105 const struct qat_qp_hw_data *qp_hw_data = comp_hw_qps + qp_id; 106 107 /* If qp is already in use free ring memory and qp metadata. */ 108 if (*qp_addr != NULL) { 109 ret = qat_comp_qp_release(dev, qp_id); 110 if (ret < 0) 111 return ret; 112 } 113 if (qp_id >= qat_qps_per_service(comp_hw_qps, 114 QAT_SERVICE_COMPRESSION)) { 115 QAT_LOG(ERR, "qp_id %u invalid for this device", qp_id); 116 return -EINVAL; 117 } 118 119 qat_qp_conf.hw = qp_hw_data; 120 qat_qp_conf.build_request = qat_comp_build_request; 121 qat_qp_conf.cookie_size = sizeof(struct qat_comp_op_cookie); 122 qat_qp_conf.nb_descriptors = max_inflight_ops; 123 qat_qp_conf.socket_id = socket_id; 124 qat_qp_conf.service_str = "comp"; 125 126 ret = qat_qp_setup(qat_private->qat_dev, qp_addr, qp_id, &qat_qp_conf); 127 if (ret != 0) 128 return ret; 129 130 /* store a link to the qp in the qat_pci_device */ 131 qat_private->qat_dev->qps_in_use[QAT_SERVICE_COMPRESSION][qp_id] 132 = *qp_addr; 133 134 qp = (struct qat_qp *)*qp_addr; 135 136 for (i = 0; i < qp->nb_descriptors; i++) { 137 138 struct qat_comp_op_cookie *cookie = 139 qp->op_cookies[i]; 140 141 cookie->qat_sgl_src_d = rte_zmalloc_socket(NULL, 142 sizeof(struct qat_sgl) + 143 sizeof(struct qat_flat_buf) * 144 QAT_PMD_COMP_SGL_DEF_SEGMENTS, 145 64, dev->data->socket_id); 146 147 cookie->qat_sgl_dst_d = rte_zmalloc_socket(NULL, 148 sizeof(struct qat_sgl) + 149 sizeof(struct qat_flat_buf) * 150 QAT_PMD_COMP_SGL_DEF_SEGMENTS, 151 64, dev->data->socket_id); 152 153 if (cookie->qat_sgl_src_d == NULL || 154 cookie->qat_sgl_dst_d == NULL) { 155 QAT_LOG(ERR, "Can't allocate SGL" 156 " for device %s", 157 qat_private->qat_dev->name); 158 return -ENOMEM; 159 } 160 161 cookie->qat_sgl_src_phys_addr = 162 rte_malloc_virt2iova(cookie->qat_sgl_src_d); 163 164 cookie->qat_sgl_dst_phys_addr = 165 rte_malloc_virt2iova(cookie->qat_sgl_dst_d); 166 167 cookie->dst_nb_elems = cookie->src_nb_elems = 168 QAT_PMD_COMP_SGL_DEF_SEGMENTS; 169 170 cookie->socket_id = dev->data->socket_id; 171 } 172 173 return ret; 174 } 175 176 177 #define QAT_IM_BUFFER_DEBUG 0 178 static const struct rte_memzone * 179 qat_comp_setup_inter_buffers(struct qat_comp_dev_private *comp_dev, 180 uint32_t buff_size) 181 { 182 char inter_buff_mz_name[RTE_MEMZONE_NAMESIZE]; 183 const struct rte_memzone *memzone; 184 uint8_t *mz_start = NULL; 185 rte_iova_t mz_start_phys = 0; 186 struct array_of_ptrs *array_of_pointers; 187 int size_of_ptr_array; 188 uint32_t full_size; 189 uint32_t offset_of_sgls, offset_of_flat_buffs = 0; 190 int i; 191 int num_im_sgls = qat_gen_config[ 192 comp_dev->qat_dev->qat_dev_gen].comp_num_im_bufs_required; 193 194 QAT_LOG(DEBUG, "QAT COMP device %s needs %d sgls", 195 comp_dev->qat_dev->name, num_im_sgls); 196 snprintf(inter_buff_mz_name, RTE_MEMZONE_NAMESIZE, 197 "%s_inter_buff", comp_dev->qat_dev->name); 198 memzone = rte_memzone_lookup(inter_buff_mz_name); 199 if (memzone != NULL) { 200 QAT_LOG(DEBUG, "QAT COMP im buffer memzone created already"); 201 return memzone; 202 } 203 204 /* Create a memzone to hold intermediate buffers and associated 205 * meta-data needed by the firmware. The memzone contains 3 parts: 206 * - a list of num_im_sgls physical pointers to sgls 207 * - the num_im_sgl sgl structures, each pointing to 208 * QAT_NUM_BUFS_IN_IM_SGL flat buffers 209 * - the flat buffers: num_im_sgl * QAT_NUM_BUFS_IN_IM_SGL 210 * buffers, each of buff_size 211 * num_im_sgls depends on the hardware generation of the device 212 * buff_size comes from the user via the config file 213 */ 214 215 size_of_ptr_array = num_im_sgls * sizeof(phys_addr_t); 216 offset_of_sgls = (size_of_ptr_array + (~QAT_64_BYTE_ALIGN_MASK)) 217 & QAT_64_BYTE_ALIGN_MASK; 218 offset_of_flat_buffs = 219 offset_of_sgls + num_im_sgls * sizeof(struct qat_inter_sgl); 220 full_size = offset_of_flat_buffs + 221 num_im_sgls * buff_size * QAT_NUM_BUFS_IN_IM_SGL; 222 223 memzone = rte_memzone_reserve_aligned(inter_buff_mz_name, full_size, 224 comp_dev->compressdev->data->socket_id, 225 RTE_MEMZONE_IOVA_CONTIG, QAT_64_BYTE_ALIGN); 226 if (memzone == NULL) { 227 QAT_LOG(ERR, "Can't allocate intermediate buffers" 228 " for device %s", comp_dev->qat_dev->name); 229 return NULL; 230 } 231 232 mz_start = (uint8_t *)memzone->addr; 233 mz_start_phys = memzone->phys_addr; 234 QAT_LOG(DEBUG, "Memzone %s: addr = %p, phys = 0x%"PRIx64 235 ", size required %d, size created %zu", 236 inter_buff_mz_name, mz_start, mz_start_phys, 237 full_size, memzone->len); 238 239 array_of_pointers = (struct array_of_ptrs *)mz_start; 240 for (i = 0; i < num_im_sgls; i++) { 241 uint32_t curr_sgl_offset = 242 offset_of_sgls + i * sizeof(struct qat_inter_sgl); 243 struct qat_inter_sgl *sgl = 244 (struct qat_inter_sgl *)(mz_start + curr_sgl_offset); 245 int lb; 246 array_of_pointers->pointer[i] = mz_start_phys + curr_sgl_offset; 247 248 sgl->num_bufs = QAT_NUM_BUFS_IN_IM_SGL; 249 sgl->num_mapped_bufs = 0; 250 sgl->resrvd = 0; 251 252 #if QAT_IM_BUFFER_DEBUG 253 QAT_LOG(DEBUG, " : phys addr of sgl[%i] in array_of_pointers" 254 " = 0x%"PRIx64, i, array_of_pointers->pointer[i]); 255 QAT_LOG(DEBUG, " : virt address of sgl[%i] = %p", i, sgl); 256 #endif 257 for (lb = 0; lb < QAT_NUM_BUFS_IN_IM_SGL; lb++) { 258 sgl->buffers[lb].addr = 259 mz_start_phys + offset_of_flat_buffs + 260 (((i * QAT_NUM_BUFS_IN_IM_SGL) + lb) * buff_size); 261 sgl->buffers[lb].len = buff_size; 262 sgl->buffers[lb].resrvd = 0; 263 #if QAT_IM_BUFFER_DEBUG 264 QAT_LOG(DEBUG, 265 " : sgl->buffers[%d].addr = 0x%"PRIx64", len=%d", 266 lb, sgl->buffers[lb].addr, sgl->buffers[lb].len); 267 #endif 268 } 269 } 270 #if QAT_IM_BUFFER_DEBUG 271 QAT_DP_HEXDUMP_LOG(DEBUG, "IM buffer memzone start:", 272 mz_start, offset_of_flat_buffs + 32); 273 #endif 274 return memzone; 275 } 276 277 static struct rte_mempool * 278 qat_comp_create_xform_pool(struct qat_comp_dev_private *comp_dev, 279 uint32_t num_elements) 280 { 281 char xform_pool_name[RTE_MEMPOOL_NAMESIZE]; 282 struct rte_mempool *mp; 283 284 snprintf(xform_pool_name, RTE_MEMPOOL_NAMESIZE, 285 "%s_xforms", comp_dev->qat_dev->name); 286 287 QAT_LOG(DEBUG, "xformpool: %s", xform_pool_name); 288 mp = rte_mempool_lookup(xform_pool_name); 289 290 if (mp != NULL) { 291 QAT_LOG(DEBUG, "xformpool already created"); 292 if (mp->size != num_elements) { 293 QAT_LOG(DEBUG, "xformpool wrong size - delete it"); 294 rte_mempool_free(mp); 295 mp = NULL; 296 comp_dev->xformpool = NULL; 297 } 298 } 299 300 if (mp == NULL) 301 mp = rte_mempool_create(xform_pool_name, 302 num_elements, 303 qat_comp_xform_size(), 0, 0, 304 NULL, NULL, NULL, NULL, rte_socket_id(), 305 0); 306 if (mp == NULL) { 307 QAT_LOG(ERR, "Err creating mempool %s w %d elements of size %d", 308 xform_pool_name, num_elements, qat_comp_xform_size()); 309 return NULL; 310 } 311 312 return mp; 313 } 314 315 static void 316 _qat_comp_dev_config_clear(struct qat_comp_dev_private *comp_dev) 317 { 318 /* Free intermediate buffers */ 319 if (comp_dev->interm_buff_mz) { 320 rte_memzone_free(comp_dev->interm_buff_mz); 321 comp_dev->interm_buff_mz = NULL; 322 } 323 324 /* Free private_xform pool */ 325 if (comp_dev->xformpool) { 326 /* Free internal mempool for private xforms */ 327 rte_mempool_free(comp_dev->xformpool); 328 comp_dev->xformpool = NULL; 329 } 330 } 331 332 static int 333 qat_comp_dev_config(struct rte_compressdev *dev, 334 struct rte_compressdev_config *config) 335 { 336 struct qat_comp_dev_private *comp_dev = dev->data->dev_private; 337 int ret = 0; 338 339 if (config->max_nb_streams != 0) { 340 QAT_LOG(ERR, 341 "QAT device does not support STATEFUL so max_nb_streams must be 0"); 342 return -EINVAL; 343 } 344 345 if (RTE_PMD_QAT_COMP_IM_BUFFER_SIZE == 0) { 346 QAT_LOG(WARNING, 347 "RTE_PMD_QAT_COMP_IM_BUFFER_SIZE = 0 in config file, so" 348 " QAT device can't be used for Dynamic Deflate. " 349 "Did you really intend to do this?"); 350 } else { 351 comp_dev->interm_buff_mz = 352 qat_comp_setup_inter_buffers(comp_dev, 353 RTE_PMD_QAT_COMP_IM_BUFFER_SIZE); 354 if (comp_dev->interm_buff_mz == NULL) { 355 ret = -ENOMEM; 356 goto error_out; 357 } 358 } 359 360 comp_dev->xformpool = qat_comp_create_xform_pool(comp_dev, 361 config->max_nb_priv_xforms); 362 if (comp_dev->xformpool == NULL) { 363 364 ret = -ENOMEM; 365 goto error_out; 366 } 367 return 0; 368 369 error_out: 370 _qat_comp_dev_config_clear(comp_dev); 371 return ret; 372 } 373 374 static int 375 qat_comp_dev_start(struct rte_compressdev *dev __rte_unused) 376 { 377 return 0; 378 } 379 380 static void 381 qat_comp_dev_stop(struct rte_compressdev *dev __rte_unused) 382 { 383 384 } 385 386 static int 387 qat_comp_dev_close(struct rte_compressdev *dev) 388 { 389 int i; 390 int ret = 0; 391 struct qat_comp_dev_private *comp_dev = dev->data->dev_private; 392 393 for (i = 0; i < dev->data->nb_queue_pairs; i++) { 394 ret = qat_comp_qp_release(dev, i); 395 if (ret < 0) 396 return ret; 397 } 398 399 _qat_comp_dev_config_clear(comp_dev); 400 401 return ret; 402 } 403 404 405 static void 406 qat_comp_dev_info_get(struct rte_compressdev *dev, 407 struct rte_compressdev_info *info) 408 { 409 struct qat_comp_dev_private *comp_dev = dev->data->dev_private; 410 const struct qat_qp_hw_data *comp_hw_qps = 411 qat_gen_config[comp_dev->qat_dev->qat_dev_gen] 412 .qp_hw_data[QAT_SERVICE_COMPRESSION]; 413 414 if (info != NULL) { 415 info->max_nb_queue_pairs = 416 qat_qps_per_service(comp_hw_qps, 417 QAT_SERVICE_COMPRESSION); 418 info->feature_flags = dev->feature_flags; 419 info->capabilities = comp_dev->qat_dev_capabilities; 420 } 421 } 422 423 static uint16_t 424 qat_comp_pmd_enqueue_op_burst(void *qp, struct rte_comp_op **ops, 425 uint16_t nb_ops) 426 { 427 return qat_enqueue_op_burst(qp, (void **)ops, nb_ops); 428 } 429 430 static uint16_t 431 qat_comp_pmd_dequeue_op_burst(void *qp, struct rte_comp_op **ops, 432 uint16_t nb_ops) 433 { 434 return qat_dequeue_op_burst(qp, (void **)ops, nb_ops); 435 } 436 437 static uint16_t 438 qat_comp_pmd_enq_deq_dummy_op_burst(void *qp __rte_unused, 439 struct rte_comp_op **ops __rte_unused, 440 uint16_t nb_ops __rte_unused) 441 { 442 QAT_DP_LOG(ERR, "QAT PMD detected wrong FW version !"); 443 return 0; 444 } 445 446 static struct rte_compressdev_ops compress_qat_dummy_ops = { 447 448 /* Device related operations */ 449 .dev_configure = NULL, 450 .dev_start = NULL, 451 .dev_stop = qat_comp_dev_stop, 452 .dev_close = qat_comp_dev_close, 453 .dev_infos_get = NULL, 454 455 .stats_get = NULL, 456 .stats_reset = qat_comp_stats_reset, 457 .queue_pair_setup = NULL, 458 .queue_pair_release = qat_comp_qp_release, 459 460 /* Compression related operations */ 461 .private_xform_create = NULL, 462 .private_xform_free = qat_comp_private_xform_free 463 }; 464 465 static uint16_t 466 qat_comp_pmd_dequeue_frst_op_burst(void *qp, struct rte_comp_op **ops, 467 uint16_t nb_ops) 468 { 469 uint16_t ret = qat_dequeue_op_burst(qp, (void **)ops, nb_ops); 470 struct qat_qp *tmp_qp = (struct qat_qp *)qp; 471 472 if (ret) { 473 if ((*ops)->debug_status == 474 (uint64_t)ERR_CODE_QAT_COMP_WRONG_FW) { 475 tmp_qp->qat_dev->comp_dev->compressdev->enqueue_burst = 476 qat_comp_pmd_enq_deq_dummy_op_burst; 477 tmp_qp->qat_dev->comp_dev->compressdev->dequeue_burst = 478 qat_comp_pmd_enq_deq_dummy_op_burst; 479 480 tmp_qp->qat_dev->comp_dev->compressdev->dev_ops = 481 &compress_qat_dummy_ops; 482 QAT_LOG(ERR, "QAT PMD detected wrong FW version !"); 483 484 } else { 485 tmp_qp->qat_dev->comp_dev->compressdev->dequeue_burst = 486 qat_comp_pmd_dequeue_op_burst; 487 } 488 } 489 return ret; 490 } 491 492 static struct rte_compressdev_ops compress_qat_ops = { 493 494 /* Device related operations */ 495 .dev_configure = qat_comp_dev_config, 496 .dev_start = qat_comp_dev_start, 497 .dev_stop = qat_comp_dev_stop, 498 .dev_close = qat_comp_dev_close, 499 .dev_infos_get = qat_comp_dev_info_get, 500 501 .stats_get = qat_comp_stats_get, 502 .stats_reset = qat_comp_stats_reset, 503 .queue_pair_setup = qat_comp_qp_setup, 504 .queue_pair_release = qat_comp_qp_release, 505 506 /* Compression related operations */ 507 .private_xform_create = qat_comp_private_xform_create, 508 .private_xform_free = qat_comp_private_xform_free 509 }; 510 511 /* An rte_driver is needed in the registration of the device with compressdev. 512 * The actual qat pci's rte_driver can't be used as its name represents 513 * the whole pci device with all services. Think of this as a holder for a name 514 * for the compression part of the pci device. 515 */ 516 static const char qat_comp_drv_name[] = RTE_STR(COMPRESSDEV_NAME_QAT_PMD); 517 static const struct rte_driver compdev_qat_driver = { 518 .name = qat_comp_drv_name, 519 .alias = qat_comp_drv_name 520 }; 521 int 522 qat_comp_dev_create(struct qat_pci_device *qat_pci_dev) 523 { 524 if (qat_pci_dev->qat_dev_gen == QAT_GEN3) { 525 QAT_LOG(ERR, "Compression PMD not supported on QAT c4xxx"); 526 return 0; 527 } 528 529 struct rte_compressdev_pmd_init_params init_params = { 530 .name = "", 531 .socket_id = qat_pci_dev->pci_dev->device.numa_node, 532 }; 533 char name[RTE_COMPRESSDEV_NAME_MAX_LEN]; 534 struct rte_compressdev *compressdev; 535 struct qat_comp_dev_private *comp_dev; 536 537 snprintf(name, RTE_COMPRESSDEV_NAME_MAX_LEN, "%s_%s", 538 qat_pci_dev->name, "comp"); 539 QAT_LOG(DEBUG, "Creating QAT COMP device %s", name); 540 541 /* Populate subset device to use in compressdev device creation */ 542 qat_pci_dev->comp_rte_dev.driver = &compdev_qat_driver; 543 qat_pci_dev->comp_rte_dev.numa_node = 544 qat_pci_dev->pci_dev->device.numa_node; 545 qat_pci_dev->comp_rte_dev.devargs = NULL; 546 547 compressdev = rte_compressdev_pmd_create(name, 548 &(qat_pci_dev->comp_rte_dev), 549 sizeof(struct qat_comp_dev_private), 550 &init_params); 551 552 if (compressdev == NULL) 553 return -ENODEV; 554 555 compressdev->dev_ops = &compress_qat_ops; 556 557 compressdev->enqueue_burst = qat_comp_pmd_enqueue_op_burst; 558 compressdev->dequeue_burst = qat_comp_pmd_dequeue_frst_op_burst; 559 560 compressdev->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED; 561 562 comp_dev = compressdev->data->dev_private; 563 comp_dev->qat_dev = qat_pci_dev; 564 comp_dev->compressdev = compressdev; 565 qat_pci_dev->comp_dev = comp_dev; 566 567 switch (qat_pci_dev->qat_dev_gen) { 568 case QAT_GEN1: 569 case QAT_GEN2: 570 case QAT_GEN3: 571 comp_dev->qat_dev_capabilities = qat_comp_gen_capabilities; 572 break; 573 default: 574 comp_dev->qat_dev_capabilities = qat_comp_gen_capabilities; 575 QAT_LOG(DEBUG, 576 "QAT gen %d capabilities unknown, default to GEN1", 577 qat_pci_dev->qat_dev_gen); 578 break; 579 } 580 581 QAT_LOG(DEBUG, 582 "Created QAT COMP device %s as compressdev instance %d", 583 name, compressdev->data->dev_id); 584 return 0; 585 } 586 587 int 588 qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev) 589 { 590 struct qat_comp_dev_private *comp_dev; 591 592 if (qat_pci_dev == NULL) 593 return -ENODEV; 594 595 comp_dev = qat_pci_dev->comp_dev; 596 if (comp_dev == NULL) 597 return 0; 598 599 /* clean up any resources used by the device */ 600 qat_comp_dev_close(comp_dev->compressdev); 601 602 rte_compressdev_pmd_destroy(comp_dev->compressdev); 603 qat_pci_dev->comp_dev = NULL; 604 605 return 0; 606 } 607