1*2d148597SFan Zhang /* SPDX-License-Identifier: BSD-3-Clause 2*2d148597SFan Zhang * Copyright(c) 2021 Intel Corporation 3*2d148597SFan Zhang */ 4*2d148597SFan Zhang 5*2d148597SFan Zhang #include "qat_comp_pmd.h" 6*2d148597SFan Zhang #include "qat_comp_pmd_gens.h" 7*2d148597SFan Zhang 8*2d148597SFan Zhang #define QAT_NUM_INTERM_BUFS_GEN3 64 9*2d148597SFan Zhang 10*2d148597SFan Zhang static unsigned int qat_comp_get_num_im_bufs_required_gen3(void)11*2d148597SFan Zhangqat_comp_get_num_im_bufs_required_gen3(void) 12*2d148597SFan Zhang { 13*2d148597SFan Zhang return QAT_NUM_INTERM_BUFS_GEN3; 14*2d148597SFan Zhang } 15*2d148597SFan Zhang RTE_INIT(qat_comp_pmd_gen3_init)16*2d148597SFan ZhangRTE_INIT(qat_comp_pmd_gen3_init) 17*2d148597SFan Zhang { 18*2d148597SFan Zhang qat_comp_gen_dev_ops[QAT_GEN3].compressdev_ops = 19*2d148597SFan Zhang &qat_comp_ops_gen1; 20*2d148597SFan Zhang qat_comp_gen_dev_ops[QAT_GEN3].qat_comp_get_capabilities = 21*2d148597SFan Zhang qat_comp_cap_get_gen1; 22*2d148597SFan Zhang qat_comp_gen_dev_ops[QAT_GEN3].qat_comp_get_num_im_bufs_required = 23*2d148597SFan Zhang qat_comp_get_num_im_bufs_required_gen3; 24*2d148597SFan Zhang qat_comp_gen_dev_ops[QAT_GEN3].qat_comp_get_ram_bank_flags = 25*2d148597SFan Zhang qat_comp_get_ram_bank_flags_gen1; 26*2d148597SFan Zhang qat_comp_gen_dev_ops[QAT_GEN3].qat_comp_set_slice_cfg_word = 27*2d148597SFan Zhang qat_comp_set_slice_cfg_word_gen1; 28*2d148597SFan Zhang qat_comp_gen_dev_ops[QAT_GEN3].qat_comp_get_feature_flags = 29*2d148597SFan Zhang qat_comp_get_features_gen1; 30*2d148597SFan Zhang } 31