1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Cavium, Inc 3 */ 4 5 #ifndef _RTE_OCTEONTX_ZIP_VF_H_ 6 #define _RTE_OCTEONTX_ZIP_VF_H_ 7 8 #include <unistd.h> 9 10 #include <bus_pci_driver.h> 11 #include <rte_comp.h> 12 #include <rte_compressdev.h> 13 #include <rte_compressdev_pmd.h> 14 #include <rte_malloc.h> 15 #include <rte_memory.h> 16 #include <rte_spinlock.h> 17 18 #include <zip_regs.h> 19 20 extern int octtx_zip_logtype_driver; 21 22 /* ZIP VF Control/Status registers (CSRs): */ 23 /* VF_BAR0: */ 24 #define ZIP_VQ_ENA (0x10) 25 #define ZIP_VQ_SBUF_ADDR (0x20) 26 #define ZIP_VF_PF_MBOXX(x) (0x400 | (x)<<3) 27 #define ZIP_VQ_DOORBELL (0x1000) 28 29 /**< Vendor ID */ 30 #define PCI_VENDOR_ID_CAVIUM 0x177D 31 /**< PCI device id of ZIP VF */ 32 #define PCI_DEVICE_ID_OCTEONTX_ZIPVF 0xA037 33 #define PCI_DEVICE_ID_OCTEONTX2_ZIPVF 0xA083 34 35 /* maximum number of zip vf devices */ 36 #define ZIP_MAX_VFS 8 37 38 /* max size of one chunk */ 39 #define ZIP_MAX_CHUNK_SIZE 8192 40 41 /* each instruction is fixed 128 bytes */ 42 #define ZIP_CMD_SIZE 128 43 44 #define ZIP_CMD_SIZE_WORDS (ZIP_CMD_SIZE >> 3) /* 16 64_bit words */ 45 46 /* size of next chunk buffer pointer */ 47 #define ZIP_MAX_NCBP_SIZE 8 48 49 /* size of instruction queue in units of instruction size */ 50 #define ZIP_MAX_NUM_CMDS ((ZIP_MAX_CHUNK_SIZE - ZIP_MAX_NCBP_SIZE) / \ 51 ZIP_CMD_SIZE) /* 63 */ 52 53 /* size of instruct queue in bytes */ 54 #define ZIP_MAX_CMDQ_SIZE ((ZIP_MAX_NUM_CMDS * ZIP_CMD_SIZE) + \ 55 ZIP_MAX_NCBP_SIZE)/* ~8072ull */ 56 57 #define ZIP_BUF_SIZE 256 58 #define ZIP_BURST_SIZE 64 59 60 #define ZIP_MAXSEG_SIZE 59460 61 #define ZIP_EXTRABUF_SIZE 4096 62 63 #define ZIP_SGPTR_ALIGN 16 64 #define ZIP_CMDQ_ALIGN 128 65 #define MAX_SG_LEN ((ZIP_BUF_SIZE - ZIP_SGPTR_ALIGN) / sizeof(void *)) 66 67 /**< ZIP PMD specified queue pairs */ 68 #define ZIP_MAX_VF_QUEUE 1 69 70 #define ZIP_ALIGN_ROUNDUP(x, _align) \ 71 ((_align) * (((x) + (_align) - 1) / (_align))) 72 73 /**< ZIP PMD device name */ 74 #define COMPRESSDEV_NAME_ZIP_PMD compress_octeontx 75 76 #define ZIP_PMD_LOG(level, fmt, args...) \ 77 rte_log(RTE_LOG_ ## level, \ 78 octtx_zip_logtype_driver, "%s(): "fmt "\n", \ 79 __func__, ##args) 80 81 #define ZIP_PMD_INFO(fmt, args...) \ 82 ZIP_PMD_LOG(INFO, fmt, ## args) 83 #define ZIP_PMD_ERR(fmt, args...) \ 84 ZIP_PMD_LOG(ERR, fmt, ## args) 85 86 /* resources required to process stream */ 87 enum NUM_BUFS_PER_STREAM { 88 RES_BUF = 0, 89 CMD_BUF, 90 HASH_CTX_BUF, 91 DECOMP_CTX_BUF, 92 IN_DATA_BUF, 93 OUT_DATA_BUF, 94 HISTORY_DATA_BUF, 95 MAX_BUFS_PER_STREAM 96 }; 97 98 struct zip_stream; 99 struct zipvf_qp; 100 101 /* Algorithm handler function prototype */ 102 typedef int (*comp_func_t)(struct rte_comp_op *op, struct zipvf_qp *qp, 103 struct zip_stream *zstrm, int num); 104 105 /** 106 * ZIP private stream structure 107 */ 108 struct zip_stream { 109 union zip_inst_s *inst[ZIP_BURST_SIZE]; 110 /* zip instruction pointer */ 111 comp_func_t func; 112 /* function to process comp operation */ 113 void *bufs[MAX_BUFS_PER_STREAM * ZIP_BURST_SIZE]; 114 } __rte_cache_aligned; 115 116 117 /** 118 * ZIP instruction Queue 119 */ 120 struct zipvf_cmdq { 121 rte_spinlock_t qlock; 122 /* queue lock */ 123 uint64_t *sw_head; 124 /* pointer to start of 8-byte word length queue-head */ 125 uint8_t *va; 126 /* pointer to instruction queue virtual address */ 127 rte_iova_t iova; 128 /* iova addr of cmdq head*/ 129 }; 130 131 /** 132 * ZIP device queue structure 133 */ 134 struct zipvf_qp { 135 struct zipvf_cmdq cmdq; 136 /* Hardware instruction queue structure */ 137 struct rte_ring *processed_pkts; 138 /* Ring for placing processed packets */ 139 struct rte_compressdev_stats qp_stats; 140 /* Queue pair statistics */ 141 uint16_t id; 142 /* Queue Pair Identifier */ 143 const char *name; 144 /* Unique Queue Pair Name */ 145 struct zip_vf *vf; 146 /* pointer to device, queue belongs to */ 147 } __rte_cache_aligned; 148 149 /** 150 * ZIP VF device structure. 151 */ 152 struct zip_vf { 153 int vfid; 154 /* vf index */ 155 struct rte_pci_device *pdev; 156 /* pci device */ 157 void *vbar0; 158 /* CSR base address for underlying BAR0 VF.*/ 159 uint64_t dom_sdom; 160 /* Storing mbox domain and subdomain id for app rerun*/ 161 uint32_t max_nb_queue_pairs; 162 /* pointer to device qps */ 163 struct rte_mempool *zip_mp; 164 /* pointer to pools */ 165 } __rte_cache_aligned; 166 167 168 static inline void 169 zipvf_prepare_in_buf(union zip_inst_s *inst, struct rte_comp_op *op) 170 { 171 uint32_t offset, inlen; 172 struct rte_mbuf *m_src; 173 174 inlen = op->src.length; 175 offset = op->src.offset; 176 m_src = op->m_src; 177 178 /* Prepare direct input data pointer */ 179 inst->s.dg = 0; 180 inst->s.inp_ptr_addr.s.addr = 181 rte_pktmbuf_iova_offset(m_src, offset); 182 inst->s.inp_ptr_ctl.s.length = inlen; 183 } 184 185 static inline void 186 zipvf_prepare_out_buf(union zip_inst_s *inst, struct rte_comp_op *op) 187 { 188 uint32_t offset; 189 struct rte_mbuf *m_dst; 190 191 offset = op->dst.offset; 192 m_dst = op->m_dst; 193 194 /* Prepare direct input data pointer */ 195 inst->s.ds = 0; 196 inst->s.out_ptr_addr.s.addr = 197 rte_pktmbuf_iova_offset(m_dst, offset); 198 inst->s.totaloutputlength = rte_pktmbuf_pkt_len(m_dst) - 199 op->dst.offset; 200 if (inst->s.totaloutputlength == ZIP_MAXSEG_SIZE) 201 inst->s.totaloutputlength += ZIP_EXTRABUF_SIZE; /* DSTOP */ 202 203 inst->s.out_ptr_ctl.s.length = inst->s.totaloutputlength; 204 } 205 206 static inline void 207 zipvf_prepare_cmd_stateless(struct rte_comp_op *op, union zip_inst_s *inst) 208 { 209 /* set flush flag to always 1*/ 210 inst->s.ef = 1; 211 212 if (inst->s.op == ZIP_OP_E_DECOMP) 213 inst->s.sf = 1; 214 else 215 inst->s.sf = 0; 216 217 /* Set input checksum */ 218 inst->s.adlercrc32 = op->input_chksum; 219 220 /* Prepare gather buffers */ 221 zipvf_prepare_in_buf(inst, op); 222 zipvf_prepare_out_buf(inst, op); 223 } 224 225 #ifdef ZIP_DBG 226 static inline void 227 zip_dump_instruction(void *inst) 228 { 229 union zip_inst_s *cmd83 = (union zip_inst_s *)inst; 230 231 printf("####### START ########\n"); 232 printf("doneint:%d totaloutputlength:%d\n", cmd83->s.doneint, 233 cmd83->s.totaloutputlength); 234 printf("exnum:%d iv:%d exbits:%d hmif:%d halg:%d\n", cmd83->s.exn, 235 cmd83->s.iv, cmd83->s.exbits, cmd83->s.hmif, cmd83->s.halg); 236 printf("flush:%d speed:%d cc:%d\n", cmd83->s.sf, 237 cmd83->s.ss, cmd83->s.cc); 238 printf("eof:%d bof:%d op:%d dscatter:%d dgather:%d hgather:%d\n", 239 cmd83->s.ef, cmd83->s.bf, cmd83->s.op, cmd83->s.ds, 240 cmd83->s.dg, cmd83->s.hg); 241 printf("historylength:%d adler32:%d\n", cmd83->s.historylength, 242 cmd83->s.adlercrc32); 243 printf("ctx_ptr.addr:0x%"PRIx64"\n", cmd83->s.ctx_ptr_addr.s.addr); 244 printf("ctx_ptr.len:%d\n", cmd83->s.ctx_ptr_ctl.s.length); 245 printf("history_ptr.addr:0x%"PRIx64"\n", cmd83->s.his_ptr_addr.s.addr); 246 printf("history_ptr.len:%d\n", cmd83->s.his_ptr_ctl.s.length); 247 printf("inp_ptr.addr:0x%"PRIx64"\n", cmd83->s.inp_ptr_addr.s.addr); 248 printf("inp_ptr.len:%d\n", cmd83->s.inp_ptr_ctl.s.length); 249 printf("out_ptr.addr:0x%"PRIx64"\n", cmd83->s.out_ptr_addr.s.addr); 250 printf("out_ptr.len:%d\n", cmd83->s.out_ptr_ctl.s.length); 251 printf("result_ptr.len:%d\n", cmd83->s.res_ptr_ctl.s.length); 252 printf("####### END ########\n"); 253 } 254 #endif 255 256 int 257 zipvf_create(struct rte_compressdev *compressdev); 258 259 int 260 zipvf_destroy(struct rte_compressdev *compressdev); 261 262 int 263 zipvf_q_init(struct zipvf_qp *qp); 264 265 int 266 zipvf_q_term(struct zipvf_qp *qp); 267 268 void 269 zipvf_push_command(struct zipvf_qp *qp, union zip_inst_s *zcmd); 270 271 int 272 zip_process_op(struct rte_comp_op *op, struct zipvf_qp *qp, 273 struct zip_stream *zstrm, int num); 274 275 uint64_t 276 zip_reg_read64(uint8_t *hw_addr, uint64_t offset); 277 278 void 279 zip_reg_write64(uint8_t *hw_addr, uint64_t offset, uint64_t val); 280 281 #endif /* _RTE_ZIP_VF_H_ */ 282