1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Cavium, Inc 3 */ 4 5 #ifndef _RTE_OCTEONTX_ZIP_VF_H_ 6 #define _RTE_OCTEONTX_ZIP_VF_H_ 7 8 #include <unistd.h> 9 10 #include <rte_bus_pci.h> 11 #include <rte_comp.h> 12 #include <rte_compressdev.h> 13 #include <rte_compressdev_pmd.h> 14 #include <rte_malloc.h> 15 #include <rte_memory.h> 16 #include <rte_spinlock.h> 17 18 #include <zip_regs.h> 19 20 int octtx_zip_logtype_driver; 21 22 /* ZIP VF Control/Status registers (CSRs): */ 23 /* VF_BAR0: */ 24 #define ZIP_VQ_ENA (0x10) 25 #define ZIP_VQ_SBUF_ADDR (0x20) 26 #define ZIP_VF_PF_MBOXX(x) (0x400 | (x)<<3) 27 #define ZIP_VQ_DOORBELL (0x1000) 28 29 /**< Vendor ID */ 30 #define PCI_VENDOR_ID_CAVIUM 0x177D 31 /**< PCI device id of ZIP VF */ 32 #define PCI_DEVICE_ID_OCTEONTX_ZIPVF 0xA037 33 34 /* maxmum number of zip vf devices */ 35 #define ZIP_MAX_VFS 8 36 37 /* max size of one chunk */ 38 #define ZIP_MAX_CHUNK_SIZE 8192 39 40 /* each instruction is fixed 128 bytes */ 41 #define ZIP_CMD_SIZE 128 42 43 #define ZIP_CMD_SIZE_WORDS (ZIP_CMD_SIZE >> 3) /* 16 64_bit words */ 44 45 /* size of next chunk buffer pointer */ 46 #define ZIP_MAX_NCBP_SIZE 8 47 48 /* size of instruction queue in units of instruction size */ 49 #define ZIP_MAX_NUM_CMDS ((ZIP_MAX_CHUNK_SIZE - ZIP_MAX_NCBP_SIZE) / \ 50 ZIP_CMD_SIZE) /* 63 */ 51 52 /* size of instruct queue in bytes */ 53 #define ZIP_MAX_CMDQ_SIZE ((ZIP_MAX_NUM_CMDS * ZIP_CMD_SIZE) + \ 54 ZIP_MAX_NCBP_SIZE)/* ~8072ull */ 55 56 #define ZIP_BUF_SIZE 256 57 58 #define ZIP_SGPTR_ALIGN 16 59 #define ZIP_CMDQ_ALIGN 128 60 #define MAX_SG_LEN ((ZIP_BUF_SIZE - ZIP_SGPTR_ALIGN) / sizeof(void *)) 61 62 /**< ZIP PMD specified queue pairs */ 63 #define ZIP_MAX_VF_QUEUE 1 64 65 #define ZIP_ALIGN_ROUNDUP(x, _align) \ 66 ((_align) * (((x) + (_align) - 1) / (_align))) 67 68 /**< ZIP PMD device name */ 69 #define COMPRESSDEV_NAME_ZIP_PMD compress_octeonx 70 71 #define ZIP_PMD_LOG(level, fmt, args...) \ 72 rte_log(RTE_LOG_ ## level, \ 73 octtx_zip_logtype_driver, "%s(): "fmt "\n", \ 74 __func__, ##args) 75 76 #define ZIP_PMD_INFO(fmt, args...) \ 77 ZIP_PMD_LOG(INFO, fmt, ## args) 78 #define ZIP_PMD_ERR(fmt, args...) \ 79 ZIP_PMD_LOG(ERR, fmt, ## args) 80 #define ZIP_PMD_WARN(fmt, args...) \ 81 ZIP_PMD_LOG(WARNING, fmt, ## args) 82 83 /** 84 * ZIP VF device structure. 85 */ 86 struct zip_vf { 87 int vfid; 88 /* vf index */ 89 struct rte_pci_device *pdev; 90 /* pci device */ 91 void *vbar0; 92 /* CSR base address for underlying BAR0 VF.*/ 93 uint64_t dom_sdom; 94 /* Storing mbox domain and subdomain id for app rerun*/ 95 uint32_t max_nb_queue_pairs; 96 /* pointer to device qps */ 97 struct rte_mempool *zip_mp; 98 /* pointer to pools */ 99 } __rte_cache_aligned; 100 101 int 102 zipvf_create(struct rte_compressdev *compressdev); 103 104 int 105 zipvf_destroy(struct rte_compressdev *compressdev); 106 107 uint64_t 108 zip_reg_read64(uint8_t *hw_addr, uint64_t offset); 109 110 void 111 zip_reg_write64(uint8_t *hw_addr, uint64_t offset, uint64_t val); 112 113 #endif /* _RTE_ZIP_VF_H_ */ 114