143e610bbSSunila Sahu /* SPDX-License-Identifier: BSD-3-Clause 243e610bbSSunila Sahu * Copyright(c) 2018 Cavium, Inc 343e610bbSSunila Sahu */ 443e610bbSSunila Sahu 543e610bbSSunila Sahu #include "otx_zip.h" 643e610bbSSunila Sahu 743e610bbSSunila Sahu uint64_t 843e610bbSSunila Sahu zip_reg_read64(uint8_t *hw_addr, uint64_t offset) 943e610bbSSunila Sahu { 1043e610bbSSunila Sahu uint8_t *base = hw_addr; 1143e610bbSSunila Sahu return *(volatile uint64_t *)(base + offset); 1243e610bbSSunila Sahu } 1343e610bbSSunila Sahu 1443e610bbSSunila Sahu void 1543e610bbSSunila Sahu zip_reg_write64(uint8_t *hw_addr, uint64_t offset, uint64_t val) 1643e610bbSSunila Sahu { 1743e610bbSSunila Sahu uint8_t *base = hw_addr; 1843e610bbSSunila Sahu *(uint64_t *)(base + offset) = val; 1943e610bbSSunila Sahu } 2043e610bbSSunila Sahu 21*c378f084SAshish Gupta static void 22*c378f084SAshish Gupta zip_q_enable(struct zipvf_qp *qp) 23*c378f084SAshish Gupta { 24*c378f084SAshish Gupta zip_vqx_ena_t que_ena; 25*c378f084SAshish Gupta 26*c378f084SAshish Gupta /*ZIP VFx command queue init*/ 27*c378f084SAshish Gupta que_ena.u = 0ull; 28*c378f084SAshish Gupta que_ena.s.ena = 1; 29*c378f084SAshish Gupta 30*c378f084SAshish Gupta zip_reg_write64(qp->vf->vbar0, ZIP_VQ_ENA, que_ena.u); 31*c378f084SAshish Gupta rte_wmb(); 32*c378f084SAshish Gupta } 33*c378f084SAshish Gupta 34*c378f084SAshish Gupta /* initialize given qp on zip device */ 35*c378f084SAshish Gupta int 36*c378f084SAshish Gupta zipvf_q_init(struct zipvf_qp *qp) 37*c378f084SAshish Gupta { 38*c378f084SAshish Gupta zip_vqx_sbuf_addr_t que_sbuf_addr; 39*c378f084SAshish Gupta 40*c378f084SAshish Gupta uint64_t size; 41*c378f084SAshish Gupta void *cmdq_addr; 42*c378f084SAshish Gupta uint64_t iova; 43*c378f084SAshish Gupta struct zipvf_cmdq *cmdq = &qp->cmdq; 44*c378f084SAshish Gupta struct zip_vf *vf = qp->vf; 45*c378f084SAshish Gupta 46*c378f084SAshish Gupta /* allocate and setup instruction queue */ 47*c378f084SAshish Gupta size = ZIP_MAX_CMDQ_SIZE; 48*c378f084SAshish Gupta size = ZIP_ALIGN_ROUNDUP(size, ZIP_CMDQ_ALIGN); 49*c378f084SAshish Gupta 50*c378f084SAshish Gupta cmdq_addr = rte_zmalloc(qp->name, size, ZIP_CMDQ_ALIGN); 51*c378f084SAshish Gupta if (cmdq_addr == NULL) 52*c378f084SAshish Gupta return -1; 53*c378f084SAshish Gupta 54*c378f084SAshish Gupta cmdq->sw_head = (uint64_t *)cmdq_addr; 55*c378f084SAshish Gupta cmdq->va = (uint8_t *)cmdq_addr; 56*c378f084SAshish Gupta iova = rte_mem_virt2iova(cmdq_addr); 57*c378f084SAshish Gupta 58*c378f084SAshish Gupta cmdq->iova = iova; 59*c378f084SAshish Gupta 60*c378f084SAshish Gupta que_sbuf_addr.u = 0ull; 61*c378f084SAshish Gupta que_sbuf_addr.s.ptr = (cmdq->iova >> 7); 62*c378f084SAshish Gupta zip_reg_write64(vf->vbar0, ZIP_VQ_SBUF_ADDR, que_sbuf_addr.u); 63*c378f084SAshish Gupta 64*c378f084SAshish Gupta zip_q_enable(qp); 65*c378f084SAshish Gupta 66*c378f084SAshish Gupta memset(cmdq->va, 0, ZIP_MAX_CMDQ_SIZE); 67*c378f084SAshish Gupta rte_spinlock_init(&cmdq->qlock); 68*c378f084SAshish Gupta 69*c378f084SAshish Gupta return 0; 70*c378f084SAshish Gupta } 71*c378f084SAshish Gupta 72*c378f084SAshish Gupta int 73*c378f084SAshish Gupta zipvf_q_term(struct zipvf_qp *qp) 74*c378f084SAshish Gupta { 75*c378f084SAshish Gupta struct zipvf_cmdq *cmdq = &qp->cmdq; 76*c378f084SAshish Gupta zip_vqx_ena_t que_ena; 77*c378f084SAshish Gupta struct zip_vf *vf = qp->vf; 78*c378f084SAshish Gupta 79*c378f084SAshish Gupta if (cmdq->va != NULL) { 80*c378f084SAshish Gupta memset(cmdq->va, 0, ZIP_MAX_CMDQ_SIZE); 81*c378f084SAshish Gupta rte_free(cmdq->va); 82*c378f084SAshish Gupta } 83*c378f084SAshish Gupta 84*c378f084SAshish Gupta /*Disabling the ZIP queue*/ 85*c378f084SAshish Gupta que_ena.u = 0ull; 86*c378f084SAshish Gupta zip_reg_write64(vf->vbar0, ZIP_VQ_ENA, que_ena.u); 87*c378f084SAshish Gupta 88*c378f084SAshish Gupta return 0; 89*c378f084SAshish Gupta } 90*c378f084SAshish Gupta 91*c378f084SAshish Gupta 9243e610bbSSunila Sahu int 9343e610bbSSunila Sahu zipvf_create(struct rte_compressdev *compressdev) 9443e610bbSSunila Sahu { 9543e610bbSSunila Sahu struct rte_pci_device *pdev = RTE_DEV_TO_PCI(compressdev->device); 9643e610bbSSunila Sahu struct zip_vf *zipvf = NULL; 9743e610bbSSunila Sahu char *dev_name = compressdev->data->name; 9843e610bbSSunila Sahu void *vbar0; 9943e610bbSSunila Sahu uint64_t reg; 10043e610bbSSunila Sahu 10143e610bbSSunila Sahu if (pdev->mem_resource[0].phys_addr == 0ULL) 10243e610bbSSunila Sahu return -EIO; 10343e610bbSSunila Sahu 10443e610bbSSunila Sahu vbar0 = pdev->mem_resource[0].addr; 10543e610bbSSunila Sahu if (!vbar0) { 10643e610bbSSunila Sahu ZIP_PMD_ERR("Failed to map BAR0 of %s", dev_name); 10743e610bbSSunila Sahu return -ENODEV; 10843e610bbSSunila Sahu } 10943e610bbSSunila Sahu 11043e610bbSSunila Sahu zipvf = (struct zip_vf *)(compressdev->data->dev_private); 11143e610bbSSunila Sahu 11243e610bbSSunila Sahu if (!zipvf) 11343e610bbSSunila Sahu return -ENOMEM; 11443e610bbSSunila Sahu 11543e610bbSSunila Sahu zipvf->vbar0 = vbar0; 11643e610bbSSunila Sahu reg = zip_reg_read64(zipvf->vbar0, ZIP_VF_PF_MBOXX(0)); 11743e610bbSSunila Sahu /* Storing domain in local to ZIP VF */ 11843e610bbSSunila Sahu zipvf->dom_sdom = reg; 11943e610bbSSunila Sahu zipvf->pdev = pdev; 12043e610bbSSunila Sahu zipvf->max_nb_queue_pairs = ZIP_MAX_VF_QUEUE; 12143e610bbSSunila Sahu return 0; 12243e610bbSSunila Sahu } 12343e610bbSSunila Sahu 12443e610bbSSunila Sahu int 12543e610bbSSunila Sahu zipvf_destroy(struct rte_compressdev *compressdev) 12643e610bbSSunila Sahu { 12743e610bbSSunila Sahu struct zip_vf *vf = (struct zip_vf *)(compressdev->data->dev_private); 12843e610bbSSunila Sahu 12943e610bbSSunila Sahu /* Rewriting the domain_id in ZIP_VF_MBOX for app rerun */ 13043e610bbSSunila Sahu zip_reg_write64(vf->vbar0, ZIP_VF_PF_MBOXX(0), vf->dom_sdom); 13143e610bbSSunila Sahu 13243e610bbSSunila Sahu return 0; 13343e610bbSSunila Sahu } 134