1a45edfceSIgor Romanov /* SPDX-License-Identifier: BSD-3-Clause
2a45edfceSIgor Romanov *
3*672386c1SAndrew Rybchenko * Copyright(c) 2019-2021 Xilinx, Inc.
4a45edfceSIgor Romanov * Copyright(c) 2019 Solarflare Communications Inc.
5a45edfceSIgor Romanov */
6a45edfceSIgor Romanov
7a45edfceSIgor Romanov #include "efx.h"
8a45edfceSIgor Romanov #include "efx_impl.h"
9a45edfceSIgor Romanov
10a45edfceSIgor Romanov #if EFSYS_OPT_RIVERHEAD && EFSYS_OPT_PCI
11a45edfceSIgor Romanov
12ba9568b8SIgor Romanov /*
13ba9568b8SIgor Romanov * Search for a EF100 resource locator from the given offset of an entry
14ba9568b8SIgor Romanov * in a Xilinx capabilities table.
15ba9568b8SIgor Romanov */
16ba9568b8SIgor Romanov static __checkReturn efx_rc_t
rhead_xilinx_cap_tbl_find_ef100_locator(__in efsys_bar_t * esbp,__in efsys_dma_addr_t tbl_offset,__out efx_bar_region_t * ef100_ebrp)17ba9568b8SIgor Romanov rhead_xilinx_cap_tbl_find_ef100_locator(
18ba9568b8SIgor Romanov __in efsys_bar_t *esbp,
19ba9568b8SIgor Romanov __in efsys_dma_addr_t tbl_offset,
20ba9568b8SIgor Romanov __out efx_bar_region_t *ef100_ebrp)
21ba9568b8SIgor Romanov {
22ba9568b8SIgor Romanov efx_rc_t rc;
23ba9568b8SIgor Romanov efsys_dma_addr_t entry_offset = tbl_offset;
24ba9568b8SIgor Romanov
25ba9568b8SIgor Romanov rc = efx_pci_xilinx_cap_tbl_find(esbp, ESE_GZ_CFGBAR_ENTRY_EF100,
26ba9568b8SIgor Romanov B_FALSE, &entry_offset);
27ba9568b8SIgor Romanov if (rc != 0) {
28ba9568b8SIgor Romanov /* EF100 locator not found (ENOENT) or other error */
29ba9568b8SIgor Romanov goto fail1;
30ba9568b8SIgor Romanov }
31ba9568b8SIgor Romanov
32ba9568b8SIgor Romanov rc = rhead_nic_xilinx_cap_tbl_read_ef100_locator(esbp, entry_offset,
33ba9568b8SIgor Romanov ef100_ebrp);
34ba9568b8SIgor Romanov if (rc != 0)
35ba9568b8SIgor Romanov goto fail2;
36ba9568b8SIgor Romanov
37ba9568b8SIgor Romanov return (0);
38ba9568b8SIgor Romanov
39ba9568b8SIgor Romanov fail2:
40ba9568b8SIgor Romanov EFSYS_PROBE(fail2);
41ba9568b8SIgor Romanov fail1:
42ba9568b8SIgor Romanov EFSYS_PROBE1(fail1, efx_rc_t, rc);
43ba9568b8SIgor Romanov
44ba9568b8SIgor Romanov return (rc);
45ba9568b8SIgor Romanov }
46ba9568b8SIgor Romanov
47a45edfceSIgor Romanov __checkReturn efx_rc_t
rhead_pci_nic_membar_lookup(__in efsys_pci_config_t * espcp,__in const efx_pci_ops_t * epop,__out efx_bar_region_t * ebrp)48a45edfceSIgor Romanov rhead_pci_nic_membar_lookup(
49a45edfceSIgor Romanov __in efsys_pci_config_t *espcp,
5007999984SIgor Romanov __in const efx_pci_ops_t *epop,
51a45edfceSIgor Romanov __out efx_bar_region_t *ebrp)
52a45edfceSIgor Romanov {
53a45edfceSIgor Romanov boolean_t xilinx_tbl_found = B_FALSE;
54a45edfceSIgor Romanov unsigned int xilinx_tbl_bar;
55a45edfceSIgor Romanov efsys_dma_addr_t xilinx_tbl_offset;
56a45edfceSIgor Romanov size_t pci_capa_offset = 0;
57a45edfceSIgor Romanov boolean_t bar_found = B_FALSE;
58a45edfceSIgor Romanov efx_rc_t rc = ENOENT;
590e168725SIgor Romanov efsys_bar_t xil_eb;
60da9d411eSIgor Romanov efsys_bar_t nic_eb;
61da9d411eSIgor Romanov efx_dword_t magic_ed;
62da9d411eSIgor Romanov uint32_t magic;
63a45edfceSIgor Romanov
64a45edfceSIgor Romanov /*
65a45edfceSIgor Romanov * SF-119689-TC Riverhead Host Interface section 4.2.2. describes
66a45edfceSIgor Romanov * the following discovery steps.
67a45edfceSIgor Romanov */
68a45edfceSIgor Romanov while (1) {
6907999984SIgor Romanov rc = efx_pci_find_next_xilinx_cap_table(espcp, epop,
7007999984SIgor Romanov &pci_capa_offset,
71a45edfceSIgor Romanov &xilinx_tbl_bar,
72a45edfceSIgor Romanov &xilinx_tbl_offset);
73a45edfceSIgor Romanov if (rc != 0) {
74a45edfceSIgor Romanov /*
75a45edfceSIgor Romanov * SF-119689-TC Riverhead Host Interface section 4.2.2.
76a45edfceSIgor Romanov * defines the following fallbacks for the memory bar
77a45edfceSIgor Romanov * and the offset when no Xilinx capabilities table is
78a45edfceSIgor Romanov * found.
79a45edfceSIgor Romanov */
80a45edfceSIgor Romanov if (rc == ENOENT && xilinx_tbl_found == B_FALSE) {
81a45edfceSIgor Romanov ebrp->ebr_type = EFX_BAR_TYPE_MEM;
82a45edfceSIgor Romanov ebrp->ebr_index = EFX_MEM_BAR_RIVERHEAD;
83a45edfceSIgor Romanov ebrp->ebr_offset = 0;
84a45edfceSIgor Romanov ebrp->ebr_length = 0;
85a45edfceSIgor Romanov bar_found = B_TRUE;
86a45edfceSIgor Romanov break;
87a45edfceSIgor Romanov } else {
88a45edfceSIgor Romanov goto fail1;
89a45edfceSIgor Romanov }
90a45edfceSIgor Romanov
91a45edfceSIgor Romanov }
92a45edfceSIgor Romanov
93a45edfceSIgor Romanov xilinx_tbl_found = B_TRUE;
940e168725SIgor Romanov
9507999984SIgor Romanov rc = epop->epo_find_mem_bar(espcp, xilinx_tbl_bar, &xil_eb);
960e168725SIgor Romanov if (rc != 0)
970e168725SIgor Romanov goto fail2;
98ba9568b8SIgor Romanov
99ba9568b8SIgor Romanov rc = rhead_xilinx_cap_tbl_find_ef100_locator(&xil_eb,
100ba9568b8SIgor Romanov xilinx_tbl_offset,
101ba9568b8SIgor Romanov ebrp);
102ba9568b8SIgor Romanov if (rc == 0) {
103ba9568b8SIgor Romanov /* Found valid EF100 locator. */
104ba9568b8SIgor Romanov bar_found = B_TRUE;
105ba9568b8SIgor Romanov break;
106ba9568b8SIgor Romanov } else if (rc != ENOENT) {
107ba9568b8SIgor Romanov /* Table access failed, so terminate search. */
108ba9568b8SIgor Romanov goto fail3;
109ba9568b8SIgor Romanov }
110a45edfceSIgor Romanov }
111a45edfceSIgor Romanov
112a45edfceSIgor Romanov if (bar_found == B_FALSE)
113ba9568b8SIgor Romanov goto fail4;
114a45edfceSIgor Romanov
11507999984SIgor Romanov rc = epop->epo_find_mem_bar(espcp, ebrp->ebr_index, &nic_eb);
116da9d411eSIgor Romanov if (rc != 0)
117da9d411eSIgor Romanov goto fail5;
118da9d411eSIgor Romanov
119da9d411eSIgor Romanov EFSYS_BAR_READD(&nic_eb, ebrp->ebr_offset + ER_GZ_NIC_MAGIC_OFST,
120da9d411eSIgor Romanov &magic_ed, B_FALSE);
121da9d411eSIgor Romanov
122da9d411eSIgor Romanov magic = EFX_DWORD_FIELD(magic_ed, ERF_GZ_NIC_MAGIC);
123da9d411eSIgor Romanov if (magic != EFE_GZ_NIC_MAGIC_EXPECTED) {
124da9d411eSIgor Romanov rc = EINVAL;
125da9d411eSIgor Romanov goto fail6;
126da9d411eSIgor Romanov }
127da9d411eSIgor Romanov
128a45edfceSIgor Romanov return (0);
129a45edfceSIgor Romanov
130da9d411eSIgor Romanov fail6:
131da9d411eSIgor Romanov EFSYS_PROBE(fail6);
132da9d411eSIgor Romanov fail5:
133da9d411eSIgor Romanov EFSYS_PROBE(fail5);
134ba9568b8SIgor Romanov fail4:
135ba9568b8SIgor Romanov EFSYS_PROBE(fail4);
1360e168725SIgor Romanov fail3:
1370e168725SIgor Romanov EFSYS_PROBE(fail3);
138a45edfceSIgor Romanov fail2:
139a45edfceSIgor Romanov EFSYS_PROBE(fail2);
140a45edfceSIgor Romanov fail1:
141a45edfceSIgor Romanov EFSYS_PROBE1(fail1, efx_rc_t, rc);
142a45edfceSIgor Romanov
143a45edfceSIgor Romanov return (rc);
144a45edfceSIgor Romanov }
145a45edfceSIgor Romanov
146a45edfceSIgor Romanov #endif /* EFSYS_OPT_RIVERHEAD && EFSYS_OPT_PCI */
147