1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2024 Intel Corporation 3 */ 4 5 #include <dev_driver.h> 6 #include <rte_pci.h> 7 8 #include "qat_device.h" 9 #include "qat_qp.h" 10 #include "adf_pf2vf_msg.h" 11 #include "qat_dev_gens.h" 12 13 #include <stdint.h> 14 15 static struct qat_pf2vf_dev qat_pf2vf_gen5 = { 16 .pf2vf_offset = ADF_4XXXIOV_PF2VM_OFFSET, 17 .vf2pf_offset = ADF_4XXXIOV_VM2PF_OFFSET, 18 .pf2vf_type_shift = ADF_PFVF_2X_MSGTYPE_SHIFT, 19 .pf2vf_type_mask = ADF_PFVF_2X_MSGTYPE_MASK, 20 .pf2vf_data_shift = ADF_PFVF_2X_MSGDATA_SHIFT, 21 .pf2vf_data_mask = ADF_PFVF_2X_MSGDATA_MASK, 22 }; 23 24 static struct qat_qp_hw_spec_funcs qat_qp_hw_spec_gen5 = { 25 .qat_qp_rings_per_service = qat_qp_rings_per_service_gen4, 26 .qat_qp_build_ring_base = qat_qp_build_ring_base_gen4, 27 .qat_qp_adf_arb_enable = qat_qp_adf_arb_enable_gen4, 28 .qat_qp_adf_arb_disable = qat_qp_adf_arb_disable_gen4, 29 .qat_qp_adf_configure_queues = qat_qp_adf_configure_queues_gen4, 30 .qat_qp_csr_write_tail = qat_qp_csr_write_tail_gen4, 31 .qat_qp_csr_write_head = qat_qp_csr_write_head_gen4, 32 .qat_qp_csr_setup = qat_qp_csr_setup_gen4, 33 .qat_qp_get_hw_data = qat_qp_get_hw_data_gen4, 34 }; 35 36 static struct qat_dev_hw_spec_funcs qat_dev_hw_spec_gen5 = { 37 .qat_dev_reset_ring_pairs = qat_reset_ring_pairs_gen4, 38 .qat_dev_get_transport_bar = qat_dev_get_transport_bar_gen4, 39 .qat_dev_get_misc_bar = qat_dev_get_misc_bar_gen4, 40 .qat_dev_read_config = qat_dev_read_config_gen4, 41 .qat_dev_get_extra_size = qat_dev_get_extra_size_gen4, 42 .qat_dev_get_slice_map = qat_dev_get_slice_map_gen4, 43 }; 44 45 RTE_INIT(qat_dev_gen_5_init) 46 { 47 qat_qp_hw_spec[QAT_GEN5] = &qat_qp_hw_spec_gen5; 48 qat_dev_hw_spec[QAT_GEN5] = &qat_dev_hw_spec_gen5; 49 qat_gen_config[QAT_GEN5].dev_gen = QAT_GEN5; 50 qat_gen_config[QAT_GEN5].pf2vf_dev = &qat_pf2vf_gen5; 51 } 52