1*59cda512SCiara Power /* SPDX-License-Identifier: BSD-3-Clause
2*59cda512SCiara Power * Copyright(c) 2024 Intel Corporation
3*59cda512SCiara Power */
4*59cda512SCiara Power
5*59cda512SCiara Power #include <dev_driver.h>
6*59cda512SCiara Power #include <rte_pci.h>
7*59cda512SCiara Power
8*59cda512SCiara Power #include "qat_device.h"
9*59cda512SCiara Power #include "qat_qp.h"
10*59cda512SCiara Power #include "adf_pf2vf_msg.h"
11*59cda512SCiara Power #include "qat_dev_gens.h"
12*59cda512SCiara Power
13*59cda512SCiara Power #include <stdint.h>
14*59cda512SCiara Power
15*59cda512SCiara Power static struct qat_pf2vf_dev qat_pf2vf_gen5 = {
16*59cda512SCiara Power .pf2vf_offset = ADF_4XXXIOV_PF2VM_OFFSET,
17*59cda512SCiara Power .vf2pf_offset = ADF_4XXXIOV_VM2PF_OFFSET,
18*59cda512SCiara Power .pf2vf_type_shift = ADF_PFVF_2X_MSGTYPE_SHIFT,
19*59cda512SCiara Power .pf2vf_type_mask = ADF_PFVF_2X_MSGTYPE_MASK,
20*59cda512SCiara Power .pf2vf_data_shift = ADF_PFVF_2X_MSGDATA_SHIFT,
21*59cda512SCiara Power .pf2vf_data_mask = ADF_PFVF_2X_MSGDATA_MASK,
22*59cda512SCiara Power };
23*59cda512SCiara Power
24*59cda512SCiara Power static struct qat_qp_hw_spec_funcs qat_qp_hw_spec_gen5 = {
25*59cda512SCiara Power .qat_qp_rings_per_service = qat_qp_rings_per_service_gen4,
26*59cda512SCiara Power .qat_qp_build_ring_base = qat_qp_build_ring_base_gen4,
27*59cda512SCiara Power .qat_qp_adf_arb_enable = qat_qp_adf_arb_enable_gen4,
28*59cda512SCiara Power .qat_qp_adf_arb_disable = qat_qp_adf_arb_disable_gen4,
29*59cda512SCiara Power .qat_qp_adf_configure_queues = qat_qp_adf_configure_queues_gen4,
30*59cda512SCiara Power .qat_qp_csr_write_tail = qat_qp_csr_write_tail_gen4,
31*59cda512SCiara Power .qat_qp_csr_write_head = qat_qp_csr_write_head_gen4,
32*59cda512SCiara Power .qat_qp_csr_setup = qat_qp_csr_setup_gen4,
33*59cda512SCiara Power .qat_qp_get_hw_data = qat_qp_get_hw_data_gen4,
34*59cda512SCiara Power };
35*59cda512SCiara Power
36*59cda512SCiara Power static struct qat_dev_hw_spec_funcs qat_dev_hw_spec_gen5 = {
37*59cda512SCiara Power .qat_dev_reset_ring_pairs = qat_reset_ring_pairs_gen4,
38*59cda512SCiara Power .qat_dev_get_transport_bar = qat_dev_get_transport_bar_gen4,
39*59cda512SCiara Power .qat_dev_get_misc_bar = qat_dev_get_misc_bar_gen4,
40*59cda512SCiara Power .qat_dev_read_config = qat_dev_read_config_gen4,
41*59cda512SCiara Power .qat_dev_get_extra_size = qat_dev_get_extra_size_gen4,
42*59cda512SCiara Power .qat_dev_get_slice_map = qat_dev_get_slice_map_gen4,
43*59cda512SCiara Power };
44*59cda512SCiara Power
RTE_INIT(qat_dev_gen_5_init)45*59cda512SCiara Power RTE_INIT(qat_dev_gen_5_init)
46*59cda512SCiara Power {
47*59cda512SCiara Power qat_qp_hw_spec[QAT_GEN5] = &qat_qp_hw_spec_gen5;
48*59cda512SCiara Power qat_dev_hw_spec[QAT_GEN5] = &qat_dev_hw_spec_gen5;
49*59cda512SCiara Power qat_gen_config[QAT_GEN5].dev_gen = QAT_GEN5;
50*59cda512SCiara Power qat_gen_config[QAT_GEN5].pf2vf_dev = &qat_pf2vf_gen5;
51*59cda512SCiara Power }
52