17b4f1e6bSMatan Azrad /* SPDX-License-Identifier: BSD-3-Clause 27b4f1e6bSMatan Azrad * Copyright 2019 Mellanox Technologies, Ltd 37b4f1e6bSMatan Azrad */ 47b4f1e6bSMatan Azrad 57b4f1e6bSMatan Azrad #ifndef RTE_PMD_MLX5_DEVX_CMDS_H_ 67b4f1e6bSMatan Azrad #define RTE_PMD_MLX5_DEVX_CMDS_H_ 77b4f1e6bSMatan Azrad 87b4f1e6bSMatan Azrad #include "mlx5_glue.h" 953ec4db0SMatan Azrad #include "mlx5_prm.h" 107b4f1e6bSMatan Azrad 117b4f1e6bSMatan Azrad 1253ec4db0SMatan Azrad /* This is limitation of libibverbs: in length variable type is u16. */ 1353ec4db0SMatan Azrad #define MLX5_DEVX_MAX_KLM_ENTRIES ((UINT16_MAX - \ 1453ec4db0SMatan Azrad MLX5_ST_SZ_DW(create_mkey_in) * 4) / (MLX5_ST_SZ_DW(klm) * 4)) 1553ec4db0SMatan Azrad 167b4f1e6bSMatan Azrad struct mlx5_devx_mkey_attr { 177b4f1e6bSMatan Azrad uint64_t addr; 187b4f1e6bSMatan Azrad uint64_t size; 197b4f1e6bSMatan Azrad uint32_t umem_id; 207b4f1e6bSMatan Azrad uint32_t pd; 2153ec4db0SMatan Azrad uint32_t log_entity_size; 2253ec4db0SMatan Azrad uint32_t pg_access:1; 2353ac93f7SShiri Kuzin uint32_t relaxed_ordering:1; 2453ec4db0SMatan Azrad struct mlx5_klm *klm_array; 2553ec4db0SMatan Azrad int klm_num; 267b4f1e6bSMatan Azrad }; 277b4f1e6bSMatan Azrad 287b4f1e6bSMatan Azrad /* HCA qos attributes. */ 297b4f1e6bSMatan Azrad struct mlx5_hca_qos_attr { 307b4f1e6bSMatan Azrad uint32_t sup:1; /* Whether QOS is supported. */ 317b4f1e6bSMatan Azrad uint32_t srtcm_sup:1; /* Whether srTCM mode is supported. */ 3279a7e409SViacheslav Ovsiienko uint32_t packet_pacing:1; /* Packet pacing is supported. */ 3379a7e409SViacheslav Ovsiienko uint32_t wqe_rate_pp:1; /* Packet pacing WQE rate mode. */ 347b4f1e6bSMatan Azrad uint32_t flow_meter_reg_share:1; 357b4f1e6bSMatan Azrad /* Whether reg_c share is supported. */ 367b4f1e6bSMatan Azrad uint8_t log_max_flow_meter; 377b4f1e6bSMatan Azrad /* Power of the maximum supported meters. */ 387b4f1e6bSMatan Azrad uint8_t flow_meter_reg_c_ids; 397b4f1e6bSMatan Azrad /* Bitmap of the reg_Cs available for flow meter to use. */ 407b4f1e6bSMatan Azrad 417b4f1e6bSMatan Azrad }; 427b4f1e6bSMatan Azrad 43ba1768c4SMatan Azrad struct mlx5_hca_vdpa_attr { 44ba1768c4SMatan Azrad uint8_t virtio_queue_type; 45ba1768c4SMatan Azrad uint32_t valid:1; 46ba1768c4SMatan Azrad uint32_t desc_tunnel_offload_type:1; 47ba1768c4SMatan Azrad uint32_t eth_frame_offload_type:1; 48ba1768c4SMatan Azrad uint32_t virtio_version_1_0:1; 49ba1768c4SMatan Azrad uint32_t tso_ipv4:1; 50ba1768c4SMatan Azrad uint32_t tso_ipv6:1; 51ba1768c4SMatan Azrad uint32_t tx_csum:1; 52ba1768c4SMatan Azrad uint32_t rx_csum:1; 53ba1768c4SMatan Azrad uint32_t event_mode:3; 54ba1768c4SMatan Azrad uint32_t log_doorbell_stride:5; 55ba1768c4SMatan Azrad uint32_t log_doorbell_bar_size:5; 56796ae7bbSMatan Azrad uint32_t queue_counters_valid:1; 57ba1768c4SMatan Azrad uint32_t max_num_virtio_queues; 588712c80aSMatan Azrad struct { 598712c80aSMatan Azrad uint32_t a; 608712c80aSMatan Azrad uint32_t b; 618712c80aSMatan Azrad } umems[3]; 62ba1768c4SMatan Azrad uint64_t doorbell_bar_offset; 63ba1768c4SMatan Azrad }; 64ba1768c4SMatan Azrad 657b4f1e6bSMatan Azrad /* HCA supports this number of time periods for LRO. */ 667b4f1e6bSMatan Azrad #define MLX5_LRO_NUM_SUPP_PERIODS 4 677b4f1e6bSMatan Azrad 687b4f1e6bSMatan Azrad /* HCA attributes. */ 697b4f1e6bSMatan Azrad struct mlx5_hca_attr { 707b4f1e6bSMatan Azrad uint32_t eswitch_manager:1; 717b4f1e6bSMatan Azrad uint32_t flow_counters_dump:1; 722d3c670cSMatan Azrad uint32_t log_max_rqt_size:5; 73*38119ebeSBing Zhao uint32_t parse_graph_flex_node:1; 747b4f1e6bSMatan Azrad uint8_t flow_counter_bulk_alloc_bitmap; 757b4f1e6bSMatan Azrad uint32_t eth_net_offloads:1; 767b4f1e6bSMatan Azrad uint32_t eth_virt:1; 777b4f1e6bSMatan Azrad uint32_t wqe_vlan_insert:1; 787b4f1e6bSMatan Azrad uint32_t wqe_inline_mode:2; 797b4f1e6bSMatan Azrad uint32_t vport_inline_mode:3; 807b4f1e6bSMatan Azrad uint32_t tunnel_stateless_geneve_rx:1; 817b4f1e6bSMatan Azrad uint32_t geneve_max_opt_len:1; /* 0x0: 14DW, 0x1: 63DW */ 827b4f1e6bSMatan Azrad uint32_t tunnel_stateless_gtp:1; 837b4f1e6bSMatan Azrad uint32_t lro_cap:1; 847b4f1e6bSMatan Azrad uint32_t tunnel_lro_gre:1; 857b4f1e6bSMatan Azrad uint32_t tunnel_lro_vxlan:1; 867b4f1e6bSMatan Azrad uint32_t lro_max_msg_sz_mode:2; 877b4f1e6bSMatan Azrad uint32_t lro_timer_supported_periods[MLX5_LRO_NUM_SUPP_PERIODS]; 887b4f1e6bSMatan Azrad uint32_t flex_parser_protocols; 897b4f1e6bSMatan Azrad uint32_t hairpin:1; 907b4f1e6bSMatan Azrad uint32_t log_max_hairpin_queues:5; 917b4f1e6bSMatan Azrad uint32_t log_max_hairpin_wq_data_sz:5; 927b4f1e6bSMatan Azrad uint32_t log_max_hairpin_num_packets:5; 937b4f1e6bSMatan Azrad uint32_t vhca_id:16; 94ffd5b302SShiri Kuzin uint32_t relaxed_ordering_write:1; 95ffd5b302SShiri Kuzin uint32_t relaxed_ordering_read:1; 9679a7e409SViacheslav Ovsiienko uint32_t wqe_index_ignore:1; 9779a7e409SViacheslav Ovsiienko uint32_t cross_channel:1; 9879a7e409SViacheslav Ovsiienko uint32_t non_wire_sq:1; /* SQ with non-wire ops is supported. */ 9979a7e409SViacheslav Ovsiienko uint32_t log_max_static_sq_wq:5; /* Static WQE size SQ. */ 10079a7e409SViacheslav Ovsiienko uint32_t dev_freq_khz; /* Timestamp counter frequency, kHz. */ 101cfc672a9SOri Kam uint32_t regex:1; 102cfc672a9SOri Kam uint32_t regexp_num_of_engines; 1037b4f1e6bSMatan Azrad struct mlx5_hca_qos_attr qos; 104ba1768c4SMatan Azrad struct mlx5_hca_vdpa_attr vdpa; 1057b4f1e6bSMatan Azrad }; 1067b4f1e6bSMatan Azrad 1077b4f1e6bSMatan Azrad struct mlx5_devx_wq_attr { 1087b4f1e6bSMatan Azrad uint32_t wq_type:4; 1097b4f1e6bSMatan Azrad uint32_t wq_signature:1; 1107b4f1e6bSMatan Azrad uint32_t end_padding_mode:2; 1117b4f1e6bSMatan Azrad uint32_t cd_slave:1; 1127b4f1e6bSMatan Azrad uint32_t hds_skip_first_sge:1; 1137b4f1e6bSMatan Azrad uint32_t log2_hds_buf_size:3; 1147b4f1e6bSMatan Azrad uint32_t page_offset:5; 1157b4f1e6bSMatan Azrad uint32_t lwm:16; 1167b4f1e6bSMatan Azrad uint32_t pd:24; 1177b4f1e6bSMatan Azrad uint32_t uar_page:24; 1187b4f1e6bSMatan Azrad uint64_t dbr_addr; 1197b4f1e6bSMatan Azrad uint32_t hw_counter; 1207b4f1e6bSMatan Azrad uint32_t sw_counter; 1217b4f1e6bSMatan Azrad uint32_t log_wq_stride:4; 1227b4f1e6bSMatan Azrad uint32_t log_wq_pg_sz:5; 1237b4f1e6bSMatan Azrad uint32_t log_wq_sz:5; 1247b4f1e6bSMatan Azrad uint32_t dbr_umem_valid:1; 1257b4f1e6bSMatan Azrad uint32_t wq_umem_valid:1; 1267b4f1e6bSMatan Azrad uint32_t log_hairpin_num_packets:5; 1277b4f1e6bSMatan Azrad uint32_t log_hairpin_data_sz:5; 1287b4f1e6bSMatan Azrad uint32_t single_wqe_log_num_of_strides:4; 1297b4f1e6bSMatan Azrad uint32_t two_byte_shift_en:1; 1307b4f1e6bSMatan Azrad uint32_t single_stride_log_num_of_bytes:3; 1317b4f1e6bSMatan Azrad uint32_t dbr_umem_id; 1327b4f1e6bSMatan Azrad uint32_t wq_umem_id; 1337b4f1e6bSMatan Azrad uint64_t wq_umem_offset; 1347b4f1e6bSMatan Azrad }; 1357b4f1e6bSMatan Azrad 1367b4f1e6bSMatan Azrad /* Create RQ attributes structure, used by create RQ operation. */ 1377b4f1e6bSMatan Azrad struct mlx5_devx_create_rq_attr { 1387b4f1e6bSMatan Azrad uint32_t rlky:1; 1397b4f1e6bSMatan Azrad uint32_t delay_drop_en:1; 1407b4f1e6bSMatan Azrad uint32_t scatter_fcs:1; 1417b4f1e6bSMatan Azrad uint32_t vsd:1; 1427b4f1e6bSMatan Azrad uint32_t mem_rq_type:4; 1437b4f1e6bSMatan Azrad uint32_t state:4; 1447b4f1e6bSMatan Azrad uint32_t flush_in_error_en:1; 1457b4f1e6bSMatan Azrad uint32_t hairpin:1; 1467b4f1e6bSMatan Azrad uint32_t user_index:24; 1477b4f1e6bSMatan Azrad uint32_t cqn:24; 1487b4f1e6bSMatan Azrad uint32_t counter_set_id:8; 1497b4f1e6bSMatan Azrad uint32_t rmpn:24; 1507b4f1e6bSMatan Azrad struct mlx5_devx_wq_attr wq_attr; 1517b4f1e6bSMatan Azrad }; 1527b4f1e6bSMatan Azrad 1537b4f1e6bSMatan Azrad /* Modify RQ attributes structure, used by modify RQ operation. */ 1547b4f1e6bSMatan Azrad struct mlx5_devx_modify_rq_attr { 1557b4f1e6bSMatan Azrad uint32_t rqn:24; 1567b4f1e6bSMatan Azrad uint32_t rq_state:4; /* Current RQ state. */ 1577b4f1e6bSMatan Azrad uint32_t state:4; /* Required RQ state. */ 1587b4f1e6bSMatan Azrad uint32_t scatter_fcs:1; 1597b4f1e6bSMatan Azrad uint32_t vsd:1; 1607b4f1e6bSMatan Azrad uint32_t counter_set_id:8; 1617b4f1e6bSMatan Azrad uint32_t hairpin_peer_sq:24; 1627b4f1e6bSMatan Azrad uint32_t hairpin_peer_vhca:16; 1637b4f1e6bSMatan Azrad uint64_t modify_bitmask; 1647b4f1e6bSMatan Azrad uint32_t lwm:16; /* Contained WQ lwm. */ 1657b4f1e6bSMatan Azrad }; 1667b4f1e6bSMatan Azrad 1677b4f1e6bSMatan Azrad struct mlx5_rx_hash_field_select { 1687b4f1e6bSMatan Azrad uint32_t l3_prot_type:1; 1697b4f1e6bSMatan Azrad uint32_t l4_prot_type:1; 1707b4f1e6bSMatan Azrad uint32_t selected_fields:30; 1717b4f1e6bSMatan Azrad }; 1727b4f1e6bSMatan Azrad 1737b4f1e6bSMatan Azrad /* TIR attributes structure, used by TIR operations. */ 1747b4f1e6bSMatan Azrad struct mlx5_devx_tir_attr { 1757b4f1e6bSMatan Azrad uint32_t disp_type:4; 1767b4f1e6bSMatan Azrad uint32_t lro_timeout_period_usecs:16; 1777b4f1e6bSMatan Azrad uint32_t lro_enable_mask:4; 1787b4f1e6bSMatan Azrad uint32_t lro_max_msg_sz:8; 1797b4f1e6bSMatan Azrad uint32_t inline_rqn:24; 1807b4f1e6bSMatan Azrad uint32_t rx_hash_symmetric:1; 1817b4f1e6bSMatan Azrad uint32_t tunneled_offload_en:1; 1827b4f1e6bSMatan Azrad uint32_t indirect_table:24; 1837b4f1e6bSMatan Azrad uint32_t rx_hash_fn:4; 1847b4f1e6bSMatan Azrad uint32_t self_lb_block:2; 1857b4f1e6bSMatan Azrad uint32_t transport_domain:24; 186a4e6ea97SDekel Peled uint8_t rx_hash_toeplitz_key[MLX5_RSS_HASH_KEY_LEN]; 1877b4f1e6bSMatan Azrad struct mlx5_rx_hash_field_select rx_hash_field_selector_outer; 1887b4f1e6bSMatan Azrad struct mlx5_rx_hash_field_select rx_hash_field_selector_inner; 1897b4f1e6bSMatan Azrad }; 1907b4f1e6bSMatan Azrad 1917b4f1e6bSMatan Azrad /* RQT attributes structure, used by RQT operations. */ 1927b4f1e6bSMatan Azrad struct mlx5_devx_rqt_attr { 1930eb60e67SMatan Azrad uint8_t rq_type; 1947b4f1e6bSMatan Azrad uint32_t rqt_max_size:16; 1957b4f1e6bSMatan Azrad uint32_t rqt_actual_size:16; 1967b4f1e6bSMatan Azrad uint32_t rq_list[]; 1977b4f1e6bSMatan Azrad }; 1987b4f1e6bSMatan Azrad 1997b4f1e6bSMatan Azrad /* TIS attributes structure. */ 2007b4f1e6bSMatan Azrad struct mlx5_devx_tis_attr { 2017b4f1e6bSMatan Azrad uint32_t strict_lag_tx_port_affinity:1; 2027b4f1e6bSMatan Azrad uint32_t tls_en:1; 2037b4f1e6bSMatan Azrad uint32_t lag_tx_port_affinity:4; 2047b4f1e6bSMatan Azrad uint32_t prio:4; 2057b4f1e6bSMatan Azrad uint32_t transport_domain:24; 2067b4f1e6bSMatan Azrad }; 2077b4f1e6bSMatan Azrad 2087b4f1e6bSMatan Azrad /* SQ attributes structure, used by SQ create operation. */ 2097b4f1e6bSMatan Azrad struct mlx5_devx_create_sq_attr { 2107b4f1e6bSMatan Azrad uint32_t rlky:1; 2117b4f1e6bSMatan Azrad uint32_t cd_master:1; 2127b4f1e6bSMatan Azrad uint32_t fre:1; 2137b4f1e6bSMatan Azrad uint32_t flush_in_error_en:1; 2147b4f1e6bSMatan Azrad uint32_t allow_multi_pkt_send_wqe:1; 2157b4f1e6bSMatan Azrad uint32_t min_wqe_inline_mode:3; 2167b4f1e6bSMatan Azrad uint32_t state:4; 2177b4f1e6bSMatan Azrad uint32_t reg_umr:1; 2187b4f1e6bSMatan Azrad uint32_t allow_swp:1; 2197b4f1e6bSMatan Azrad uint32_t hairpin:1; 22079a7e409SViacheslav Ovsiienko uint32_t non_wire:1; 22179a7e409SViacheslav Ovsiienko uint32_t static_sq_wq:1; 2227b4f1e6bSMatan Azrad uint32_t user_index:24; 2237b4f1e6bSMatan Azrad uint32_t cqn:24; 2247b4f1e6bSMatan Azrad uint32_t packet_pacing_rate_limit_index:16; 2257b4f1e6bSMatan Azrad uint32_t tis_lst_sz:16; 2267b4f1e6bSMatan Azrad uint32_t tis_num:24; 2277b4f1e6bSMatan Azrad struct mlx5_devx_wq_attr wq_attr; 2287b4f1e6bSMatan Azrad }; 2297b4f1e6bSMatan Azrad 2307b4f1e6bSMatan Azrad /* SQ attributes structure, used by SQ modify operation. */ 2317b4f1e6bSMatan Azrad struct mlx5_devx_modify_sq_attr { 2327b4f1e6bSMatan Azrad uint32_t sq_state:4; 2337b4f1e6bSMatan Azrad uint32_t state:4; 2347b4f1e6bSMatan Azrad uint32_t hairpin_peer_rq:24; 2357b4f1e6bSMatan Azrad uint32_t hairpin_peer_vhca:16; 2367b4f1e6bSMatan Azrad }; 2377b4f1e6bSMatan Azrad 23853ec4db0SMatan Azrad 239446c3781SMatan Azrad /* CQ attributes structure, used by CQ operations. */ 240446c3781SMatan Azrad struct mlx5_devx_cq_attr { 241446c3781SMatan Azrad uint32_t q_umem_valid:1; 242446c3781SMatan Azrad uint32_t db_umem_valid:1; 243446c3781SMatan Azrad uint32_t use_first_only:1; 244446c3781SMatan Azrad uint32_t overrun_ignore:1; 24579a7e409SViacheslav Ovsiienko uint32_t cqe_size:3; 246446c3781SMatan Azrad uint32_t log_cq_size:5; 247446c3781SMatan Azrad uint32_t log_page_size:5; 248446c3781SMatan Azrad uint32_t uar_page_id; 249446c3781SMatan Azrad uint32_t q_umem_id; 250446c3781SMatan Azrad uint64_t q_umem_offset; 251446c3781SMatan Azrad uint32_t db_umem_id; 252446c3781SMatan Azrad uint64_t db_umem_offset; 253446c3781SMatan Azrad uint32_t eqn; 254446c3781SMatan Azrad uint64_t db_addr; 255446c3781SMatan Azrad }; 256446c3781SMatan Azrad 2578712c80aSMatan Azrad /* Virtq attributes structure, used by VIRTQ operations. */ 2588712c80aSMatan Azrad struct mlx5_devx_virtq_attr { 2598712c80aSMatan Azrad uint16_t hw_available_index; 2608712c80aSMatan Azrad uint16_t hw_used_index; 2618712c80aSMatan Azrad uint16_t q_size; 262473d8e67SMatan Azrad uint32_t pd:24; 2638712c80aSMatan Azrad uint32_t virtio_version_1_0:1; 2648712c80aSMatan Azrad uint32_t tso_ipv4:1; 2658712c80aSMatan Azrad uint32_t tso_ipv6:1; 2668712c80aSMatan Azrad uint32_t tx_csum:1; 2678712c80aSMatan Azrad uint32_t rx_csum:1; 2688712c80aSMatan Azrad uint32_t event_mode:3; 2698712c80aSMatan Azrad uint32_t state:4; 2708712c80aSMatan Azrad uint32_t dirty_bitmap_dump_enable:1; 2718712c80aSMatan Azrad uint32_t dirty_bitmap_mkey; 2728712c80aSMatan Azrad uint32_t dirty_bitmap_size; 2738712c80aSMatan Azrad uint32_t mkey; 2748712c80aSMatan Azrad uint32_t qp_id; 2758712c80aSMatan Azrad uint32_t queue_index; 2768712c80aSMatan Azrad uint32_t tis_id; 277796ae7bbSMatan Azrad uint32_t counters_obj_id; 2788712c80aSMatan Azrad uint64_t dirty_bitmap_addr; 2798712c80aSMatan Azrad uint64_t type; 2808712c80aSMatan Azrad uint64_t desc_addr; 2818712c80aSMatan Azrad uint64_t used_addr; 2828712c80aSMatan Azrad uint64_t available_addr; 2838712c80aSMatan Azrad struct { 2848712c80aSMatan Azrad uint32_t id; 2858712c80aSMatan Azrad uint32_t size; 2868712c80aSMatan Azrad uint64_t offset; 2878712c80aSMatan Azrad } umems[3]; 2888712c80aSMatan Azrad }; 2898712c80aSMatan Azrad 29015c3807eSMatan Azrad 29115c3807eSMatan Azrad struct mlx5_devx_qp_attr { 29215c3807eSMatan Azrad uint32_t pd:24; 29315c3807eSMatan Azrad uint32_t uar_index:24; 29415c3807eSMatan Azrad uint32_t cqn:24; 29515c3807eSMatan Azrad uint32_t log_page_size:5; 29615c3807eSMatan Azrad uint32_t rq_size:17; /* Must be power of 2. */ 29715c3807eSMatan Azrad uint32_t log_rq_stride:3; 29815c3807eSMatan Azrad uint32_t sq_size:17; /* Must be power of 2. */ 29915c3807eSMatan Azrad uint32_t dbr_umem_valid:1; 30015c3807eSMatan Azrad uint32_t dbr_umem_id; 30115c3807eSMatan Azrad uint64_t dbr_address; 30215c3807eSMatan Azrad uint32_t wq_umem_id; 30315c3807eSMatan Azrad uint64_t wq_umem_offset; 30415c3807eSMatan Azrad }; 30515c3807eSMatan Azrad 306796ae7bbSMatan Azrad struct mlx5_devx_virtio_q_couners_attr { 307796ae7bbSMatan Azrad uint64_t received_desc; 308796ae7bbSMatan Azrad uint64_t completed_desc; 309796ae7bbSMatan Azrad uint32_t error_cqes; 310796ae7bbSMatan Azrad uint32_t bad_desc_errors; 311796ae7bbSMatan Azrad uint32_t exceed_max_chain; 312796ae7bbSMatan Azrad uint32_t invalid_buffer; 313796ae7bbSMatan Azrad }; 314796ae7bbSMatan Azrad 315711aedf1SBing Zhao /* 316711aedf1SBing Zhao * graph flow match sample attributes structure, 317711aedf1SBing Zhao * used by flex parser operations. 318711aedf1SBing Zhao */ 319711aedf1SBing Zhao struct mlx5_devx_match_sample_attr { 320711aedf1SBing Zhao uint32_t flow_match_sample_en:1; 321711aedf1SBing Zhao uint32_t flow_match_sample_field_offset:16; 322711aedf1SBing Zhao uint32_t flow_match_sample_offset_mode:4; 323711aedf1SBing Zhao uint32_t flow_match_sample_field_offset_mask; 324711aedf1SBing Zhao uint32_t flow_match_sample_field_offset_shift:4; 325711aedf1SBing Zhao uint32_t flow_match_sample_field_base_offset:8; 326711aedf1SBing Zhao uint32_t flow_match_sample_tunnel_mode:3; 327711aedf1SBing Zhao uint32_t flow_match_sample_field_id; 328711aedf1SBing Zhao }; 329711aedf1SBing Zhao 330711aedf1SBing Zhao /* graph node arc attributes structure, used by flex parser operations. */ 331711aedf1SBing Zhao struct mlx5_devx_graph_arc_attr { 332711aedf1SBing Zhao uint32_t compare_condition_value:16; 333711aedf1SBing Zhao uint32_t start_inner_tunnel:1; 334711aedf1SBing Zhao uint32_t arc_parse_graph_node:8; 335711aedf1SBing Zhao uint32_t parse_graph_node_handle; 336711aedf1SBing Zhao }; 337711aedf1SBing Zhao 338711aedf1SBing Zhao /* Maximal number of samples per graph node. */ 339711aedf1SBing Zhao #define MLX5_GRAPH_NODE_SAMPLE_NUM 8 340711aedf1SBing Zhao 341711aedf1SBing Zhao /* Maximal number of input/output arcs per graph node. */ 342711aedf1SBing Zhao #define MLX5_GRAPH_NODE_ARC_NUM 8 343711aedf1SBing Zhao 344711aedf1SBing Zhao /* parse graph node attributes structure, used by flex parser operations. */ 345711aedf1SBing Zhao struct mlx5_devx_graph_node_attr { 346711aedf1SBing Zhao uint32_t modify_field_select; 347711aedf1SBing Zhao uint32_t header_length_mode:4; 348711aedf1SBing Zhao uint32_t header_length_base_value:16; 349711aedf1SBing Zhao uint32_t header_length_field_shift:4; 350711aedf1SBing Zhao uint32_t header_length_field_offset:16; 351711aedf1SBing Zhao uint32_t header_length_field_mask; 352711aedf1SBing Zhao struct mlx5_devx_match_sample_attr sample[MLX5_GRAPH_NODE_SAMPLE_NUM]; 353711aedf1SBing Zhao uint32_t next_header_field_offset:16; 354711aedf1SBing Zhao uint32_t next_header_field_size:5; 355711aedf1SBing Zhao struct mlx5_devx_graph_arc_attr in[MLX5_GRAPH_NODE_ARC_NUM]; 356711aedf1SBing Zhao struct mlx5_devx_graph_arc_attr out[MLX5_GRAPH_NODE_ARC_NUM]; 357711aedf1SBing Zhao }; 358711aedf1SBing Zhao 3597b4f1e6bSMatan Azrad /* mlx5_devx_cmds.c */ 3607b4f1e6bSMatan Azrad 36164c563f8SOphir Munk __rte_internal 362e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_flow_counter_alloc(void *ctx, 3637b4f1e6bSMatan Azrad uint32_t bulk_sz); 36464c563f8SOphir Munk __rte_internal 3657b4f1e6bSMatan Azrad int mlx5_devx_cmd_destroy(struct mlx5_devx_obj *obj); 36664c563f8SOphir Munk __rte_internal 3677b4f1e6bSMatan Azrad int mlx5_devx_cmd_flow_counter_query(struct mlx5_devx_obj *dcs, 3687b4f1e6bSMatan Azrad int clear, uint32_t n_counters, 3697b4f1e6bSMatan Azrad uint64_t *pkts, uint64_t *bytes, 3707b4f1e6bSMatan Azrad uint32_t mkey, void *addr, 371e09d350eSOphir Munk void *cmd_comp, 3727b4f1e6bSMatan Azrad uint64_t async_id); 37364c563f8SOphir Munk __rte_internal 374e09d350eSOphir Munk int mlx5_devx_cmd_query_hca_attr(void *ctx, 3757b4f1e6bSMatan Azrad struct mlx5_hca_attr *attr); 37664c563f8SOphir Munk __rte_internal 377e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_mkey_create(void *ctx, 3787b4f1e6bSMatan Azrad struct mlx5_devx_mkey_attr *attr); 37964c563f8SOphir Munk __rte_internal 3807b4f1e6bSMatan Azrad int mlx5_devx_get_out_command_status(void *out); 38164c563f8SOphir Munk __rte_internal 382e09d350eSOphir Munk int mlx5_devx_cmd_qp_query_tis_td(void *qp, uint32_t tis_num, 3837b4f1e6bSMatan Azrad uint32_t *tis_td); 38464c563f8SOphir Munk __rte_internal 385e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_rq(void *ctx, 3867b4f1e6bSMatan Azrad struct mlx5_devx_create_rq_attr *rq_attr, 3877b4f1e6bSMatan Azrad int socket); 38864c563f8SOphir Munk __rte_internal 3897b4f1e6bSMatan Azrad int mlx5_devx_cmd_modify_rq(struct mlx5_devx_obj *rq, 3907b4f1e6bSMatan Azrad struct mlx5_devx_modify_rq_attr *rq_attr); 39164c563f8SOphir Munk __rte_internal 392e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_tir(void *ctx, 3937b4f1e6bSMatan Azrad struct mlx5_devx_tir_attr *tir_attr); 39464c563f8SOphir Munk __rte_internal 395e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_rqt(void *ctx, 3967b4f1e6bSMatan Azrad struct mlx5_devx_rqt_attr *rqt_attr); 39764c563f8SOphir Munk __rte_internal 398e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_sq(void *ctx, 3997b4f1e6bSMatan Azrad struct mlx5_devx_create_sq_attr *sq_attr); 40064c563f8SOphir Munk __rte_internal 4017b4f1e6bSMatan Azrad int mlx5_devx_cmd_modify_sq(struct mlx5_devx_obj *sq, 4027b4f1e6bSMatan Azrad struct mlx5_devx_modify_sq_attr *sq_attr); 40364c563f8SOphir Munk __rte_internal 404e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_tis(void *ctx, 4057b4f1e6bSMatan Azrad struct mlx5_devx_tis_attr *tis_attr); 40664c563f8SOphir Munk __rte_internal 407e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_td(void *ctx); 40864c563f8SOphir Munk __rte_internal 4097b4f1e6bSMatan Azrad int mlx5_devx_cmd_flow_dump(void *fdb_domain, void *rx_domain, void *tx_domain, 4107b4f1e6bSMatan Azrad FILE *file); 41164c563f8SOphir Munk __rte_internal 412e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_cq(void *ctx, 413446c3781SMatan Azrad struct mlx5_devx_cq_attr *attr); 41464c563f8SOphir Munk __rte_internal 415e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_virtq(void *ctx, 4168712c80aSMatan Azrad struct mlx5_devx_virtq_attr *attr); 41764c563f8SOphir Munk __rte_internal 4188712c80aSMatan Azrad int mlx5_devx_cmd_modify_virtq(struct mlx5_devx_obj *virtq_obj, 4198712c80aSMatan Azrad struct mlx5_devx_virtq_attr *attr); 42064c563f8SOphir Munk __rte_internal 4218712c80aSMatan Azrad int mlx5_devx_cmd_query_virtq(struct mlx5_devx_obj *virtq_obj, 4228712c80aSMatan Azrad struct mlx5_devx_virtq_attr *attr); 42364c563f8SOphir Munk __rte_internal 424e09d350eSOphir Munk struct mlx5_devx_obj *mlx5_devx_cmd_create_qp(void *ctx, 42515c3807eSMatan Azrad struct mlx5_devx_qp_attr *attr); 42664c563f8SOphir Munk __rte_internal 42715c3807eSMatan Azrad int mlx5_devx_cmd_modify_qp_state(struct mlx5_devx_obj *qp, 42815c3807eSMatan Azrad uint32_t qp_st_mod_op, uint32_t remote_qp_id); 42964c563f8SOphir Munk __rte_internal 430e1da60a8SMatan Azrad int mlx5_devx_cmd_modify_rqt(struct mlx5_devx_obj *rqt, 431e1da60a8SMatan Azrad struct mlx5_devx_rqt_attr *rqt_attr); 432*38119ebeSBing Zhao __rte_internal 433*38119ebeSBing Zhao int mlx5_devx_cmd_query_parse_samples(struct mlx5_devx_obj *flex_obj, 434*38119ebeSBing Zhao uint32_t ids[], uint32_t num); 435*38119ebeSBing Zhao 436*38119ebeSBing Zhao __rte_internal 437*38119ebeSBing Zhao struct mlx5_devx_obj *mlx5_devx_cmd_create_flex_parser(void *ctx, 438*38119ebeSBing Zhao struct mlx5_devx_graph_node_attr *data); 4398712c80aSMatan Azrad 440bb7ef9a9SViacheslav Ovsiienko __rte_internal 441bb7ef9a9SViacheslav Ovsiienko int mlx5_devx_cmd_register_read(void *ctx, uint16_t reg_id, 442bb7ef9a9SViacheslav Ovsiienko uint32_t arg, uint32_t *data, uint32_t dw_cnt); 443796ae7bbSMatan Azrad /** 444796ae7bbSMatan Azrad * Create virtio queue counters object DevX API. 445796ae7bbSMatan Azrad * 446796ae7bbSMatan Azrad * @param[in] ctx 447796ae7bbSMatan Azrad * Device context. 448796ae7bbSMatan Azrad 449796ae7bbSMatan Azrad * @return 450796ae7bbSMatan Azrad * The DevX object created, NULL otherwise and rte_errno is set. 451796ae7bbSMatan Azrad */ 452796ae7bbSMatan Azrad __rte_internal 453796ae7bbSMatan Azrad struct mlx5_devx_obj *mlx5_devx_cmd_create_virtio_q_counters(void *ctx); 454796ae7bbSMatan Azrad 455796ae7bbSMatan Azrad /** 456796ae7bbSMatan Azrad * Query virtio queue counters object using DevX API. 457796ae7bbSMatan Azrad * 458796ae7bbSMatan Azrad * @param[in] couners_obj 459796ae7bbSMatan Azrad * Pointer to virtq object structure. 460796ae7bbSMatan Azrad * @param [in/out] attr 461796ae7bbSMatan Azrad * Pointer to virtio queue counters attributes structure. 462796ae7bbSMatan Azrad * 463796ae7bbSMatan Azrad * @return 464796ae7bbSMatan Azrad * 0 on success, a negative errno value otherwise and rte_errno is set. 465796ae7bbSMatan Azrad */ 466796ae7bbSMatan Azrad __rte_internal 467796ae7bbSMatan Azrad int mlx5_devx_cmd_query_virtio_q_counters(struct mlx5_devx_obj *couners_obj, 468796ae7bbSMatan Azrad struct mlx5_devx_virtio_q_couners_attr *attr); 469796ae7bbSMatan Azrad 4707b4f1e6bSMatan Azrad #endif /* RTE_PMD_MLX5_DEVX_CMDS_H_ */ 471