189214fe9SHaiyue Wang /* SPDX-License-Identifier: BSD-3-Clause 27815caa6SQi Zhang * Copyright(c) 2001-2021 Intel Corporation 389214fe9SHaiyue Wang */ 489214fe9SHaiyue Wang 589214fe9SHaiyue Wang #ifndef _VIRTCHNL_H_ 689214fe9SHaiyue Wang #define _VIRTCHNL_H_ 789214fe9SHaiyue Wang 889214fe9SHaiyue Wang /* Description: 9e53176efSQi Zhang * This header file describes the Virtual Function (VF) - Physical Function 10e53176efSQi Zhang * (PF) communication protocol used by the drivers for all devices starting 11e53176efSQi Zhang * from our 40G product line 1289214fe9SHaiyue Wang * 1389214fe9SHaiyue Wang * Admin queue buffer usage: 1489214fe9SHaiyue Wang * desc->opcode is always aqc_opc_send_msg_to_pf 1589214fe9SHaiyue Wang * flags, retval, datalen, and data addr are all used normally. 1689214fe9SHaiyue Wang * The Firmware copies the cookie fields when sending messages between the 1789214fe9SHaiyue Wang * PF and VF, but uses all other fields internally. Due to this limitation, 1889214fe9SHaiyue Wang * we must send all messages as "indirect", i.e. using an external buffer. 1989214fe9SHaiyue Wang * 2089214fe9SHaiyue Wang * All the VSI indexes are relative to the VF. Each VF can have maximum of 2189214fe9SHaiyue Wang * three VSIs. All the queue indexes are relative to the VSI. Each VF can 2289214fe9SHaiyue Wang * have a maximum of sixteen queues for all of its VSIs. 2389214fe9SHaiyue Wang * 2489214fe9SHaiyue Wang * The PF is required to return a status code in v_retval for all messages 25e53176efSQi Zhang * except RESET_VF, which does not require any response. The returned value 26e53176efSQi Zhang * is of virtchnl_status_code type, defined in the shared type.h. 2789214fe9SHaiyue Wang * 2889214fe9SHaiyue Wang * In general, VF driver initialization should roughly follow the order of 2989214fe9SHaiyue Wang * these opcodes. The VF driver must first validate the API version of the 3089214fe9SHaiyue Wang * PF driver, then request a reset, then get resources, then configure 3189214fe9SHaiyue Wang * queues and interrupts. After these operations are complete, the VF 3289214fe9SHaiyue Wang * driver may start its queues, optionally add MAC and VLAN filters, and 3389214fe9SHaiyue Wang * process traffic. 3489214fe9SHaiyue Wang */ 3589214fe9SHaiyue Wang 3689214fe9SHaiyue Wang /* START GENERIC DEFINES 3789214fe9SHaiyue Wang * Need to ensure the following enums and defines hold the same meaning and 3889214fe9SHaiyue Wang * value in current and future projects 3989214fe9SHaiyue Wang */ 4089214fe9SHaiyue Wang 41993f0d4dSRadu Nicolau #include "virtchnl_inline_ipsec.h" 42993f0d4dSRadu Nicolau 4389214fe9SHaiyue Wang /* Error Codes */ 4489214fe9SHaiyue Wang enum virtchnl_status_code { 4589214fe9SHaiyue Wang VIRTCHNL_STATUS_SUCCESS = 0, 4689214fe9SHaiyue Wang VIRTCHNL_STATUS_ERR_PARAM = -5, 4789214fe9SHaiyue Wang VIRTCHNL_STATUS_ERR_NO_MEMORY = -18, 4889214fe9SHaiyue Wang VIRTCHNL_STATUS_ERR_OPCODE_MISMATCH = -38, 4989214fe9SHaiyue Wang VIRTCHNL_STATUS_ERR_CQP_COMPL_ERROR = -39, 5089214fe9SHaiyue Wang VIRTCHNL_STATUS_ERR_INVALID_VF_ID = -40, 5189214fe9SHaiyue Wang VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR = -53, 5289214fe9SHaiyue Wang VIRTCHNL_STATUS_ERR_NOT_SUPPORTED = -64, 5389214fe9SHaiyue Wang }; 5489214fe9SHaiyue Wang 5589214fe9SHaiyue Wang /* Backward compatibility */ 5689214fe9SHaiyue Wang #define VIRTCHNL_ERR_PARAM VIRTCHNL_STATUS_ERR_PARAM 5789214fe9SHaiyue Wang #define VIRTCHNL_STATUS_NOT_SUPPORTED VIRTCHNL_STATUS_ERR_NOT_SUPPORTED 5889214fe9SHaiyue Wang 5989214fe9SHaiyue Wang #define VIRTCHNL_LINK_SPEED_2_5GB_SHIFT 0x0 6089214fe9SHaiyue Wang #define VIRTCHNL_LINK_SPEED_100MB_SHIFT 0x1 6189214fe9SHaiyue Wang #define VIRTCHNL_LINK_SPEED_1000MB_SHIFT 0x2 6289214fe9SHaiyue Wang #define VIRTCHNL_LINK_SPEED_10GB_SHIFT 0x3 6389214fe9SHaiyue Wang #define VIRTCHNL_LINK_SPEED_40GB_SHIFT 0x4 6489214fe9SHaiyue Wang #define VIRTCHNL_LINK_SPEED_20GB_SHIFT 0x5 6589214fe9SHaiyue Wang #define VIRTCHNL_LINK_SPEED_25GB_SHIFT 0x6 6689214fe9SHaiyue Wang #define VIRTCHNL_LINK_SPEED_5GB_SHIFT 0x7 6789214fe9SHaiyue Wang 6889214fe9SHaiyue Wang enum virtchnl_link_speed { 6989214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_UNKNOWN = 0, 7089214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_100MB = BIT(VIRTCHNL_LINK_SPEED_100MB_SHIFT), 7189214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_1GB = BIT(VIRTCHNL_LINK_SPEED_1000MB_SHIFT), 7289214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_10GB = BIT(VIRTCHNL_LINK_SPEED_10GB_SHIFT), 7389214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_40GB = BIT(VIRTCHNL_LINK_SPEED_40GB_SHIFT), 7489214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_20GB = BIT(VIRTCHNL_LINK_SPEED_20GB_SHIFT), 7589214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_25GB = BIT(VIRTCHNL_LINK_SPEED_25GB_SHIFT), 7689214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_2_5GB = BIT(VIRTCHNL_LINK_SPEED_2_5GB_SHIFT), 7789214fe9SHaiyue Wang VIRTCHNL_LINK_SPEED_5GB = BIT(VIRTCHNL_LINK_SPEED_5GB_SHIFT), 7889214fe9SHaiyue Wang }; 7989214fe9SHaiyue Wang 8089214fe9SHaiyue Wang /* for hsplit_0 field of Rx HMC context */ 8189214fe9SHaiyue Wang /* deprecated with IAVF 1.0 */ 8289214fe9SHaiyue Wang enum virtchnl_rx_hsplit { 8389214fe9SHaiyue Wang VIRTCHNL_RX_HSPLIT_NO_SPLIT = 0, 8489214fe9SHaiyue Wang VIRTCHNL_RX_HSPLIT_SPLIT_L2 = 1, 8589214fe9SHaiyue Wang VIRTCHNL_RX_HSPLIT_SPLIT_IP = 2, 8689214fe9SHaiyue Wang VIRTCHNL_RX_HSPLIT_SPLIT_TCP_UDP = 4, 8789214fe9SHaiyue Wang VIRTCHNL_RX_HSPLIT_SPLIT_SCTP = 8, 8889214fe9SHaiyue Wang }; 8989214fe9SHaiyue Wang 906b62423fSTing Xu enum virtchnl_bw_limit_type { 916b62423fSTing Xu VIRTCHNL_BW_SHAPER = 0, 926b62423fSTing Xu }; 936b62423fSTing Xu 9489214fe9SHaiyue Wang #define VIRTCHNL_ETH_LENGTH_OF_ADDRESS 6 9589214fe9SHaiyue Wang /* END GENERIC DEFINES */ 9689214fe9SHaiyue Wang 9789214fe9SHaiyue Wang /* Opcodes for VF-PF communication. These are placed in the v_opcode field 9889214fe9SHaiyue Wang * of the virtchnl_msg structure. 9989214fe9SHaiyue Wang */ 10089214fe9SHaiyue Wang enum virtchnl_ops { 10189214fe9SHaiyue Wang /* The PF sends status change events to VFs using 10289214fe9SHaiyue Wang * the VIRTCHNL_OP_EVENT opcode. 10389214fe9SHaiyue Wang * VFs send requests to the PF using the other ops. 10489214fe9SHaiyue Wang * Use of "advanced opcode" features must be negotiated as part of capabilities 10589214fe9SHaiyue Wang * exchange and are not considered part of base mode feature set. 10689214fe9SHaiyue Wang */ 10789214fe9SHaiyue Wang VIRTCHNL_OP_UNKNOWN = 0, 10889214fe9SHaiyue Wang VIRTCHNL_OP_VERSION = 1, /* must ALWAYS be 1 */ 10989214fe9SHaiyue Wang VIRTCHNL_OP_RESET_VF = 2, 11089214fe9SHaiyue Wang VIRTCHNL_OP_GET_VF_RESOURCES = 3, 11189214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_TX_QUEUE = 4, 11289214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_RX_QUEUE = 5, 11389214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_VSI_QUEUES = 6, 11489214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_IRQ_MAP = 7, 11589214fe9SHaiyue Wang VIRTCHNL_OP_ENABLE_QUEUES = 8, 11689214fe9SHaiyue Wang VIRTCHNL_OP_DISABLE_QUEUES = 9, 11789214fe9SHaiyue Wang VIRTCHNL_OP_ADD_ETH_ADDR = 10, 11889214fe9SHaiyue Wang VIRTCHNL_OP_DEL_ETH_ADDR = 11, 11989214fe9SHaiyue Wang VIRTCHNL_OP_ADD_VLAN = 12, 12089214fe9SHaiyue Wang VIRTCHNL_OP_DEL_VLAN = 13, 12189214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE = 14, 12289214fe9SHaiyue Wang VIRTCHNL_OP_GET_STATS = 15, 12389214fe9SHaiyue Wang VIRTCHNL_OP_RSVD = 16, 12489214fe9SHaiyue Wang VIRTCHNL_OP_EVENT = 17, /* must ALWAYS be 17 */ 125*2381def4SAhmed Zaki VIRTCHNL_OP_CONFIG_RSS_HFUNC = 18, 12689214fe9SHaiyue Wang /* opcode 19 is reserved */ 12789214fe9SHaiyue Wang /* opcodes 20, 21, and 22 are reserved */ 12889214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_RSS_KEY = 23, 12989214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_RSS_LUT = 24, 13089214fe9SHaiyue Wang VIRTCHNL_OP_GET_RSS_HENA_CAPS = 25, 13189214fe9SHaiyue Wang VIRTCHNL_OP_SET_RSS_HENA = 26, 13289214fe9SHaiyue Wang VIRTCHNL_OP_ENABLE_VLAN_STRIPPING = 27, 13389214fe9SHaiyue Wang VIRTCHNL_OP_DISABLE_VLAN_STRIPPING = 28, 13489214fe9SHaiyue Wang VIRTCHNL_OP_REQUEST_QUEUES = 29, 13589214fe9SHaiyue Wang VIRTCHNL_OP_ENABLE_CHANNELS = 30, 13689214fe9SHaiyue Wang VIRTCHNL_OP_DISABLE_CHANNELS = 31, 13789214fe9SHaiyue Wang VIRTCHNL_OP_ADD_CLOUD_FILTER = 32, 13889214fe9SHaiyue Wang VIRTCHNL_OP_DEL_CLOUD_FILTER = 33, 139993f0d4dSRadu Nicolau VIRTCHNL_OP_INLINE_IPSEC_CRYPTO = 34, 140993f0d4dSRadu Nicolau /* opcodes 35 and 36 are reserved */ 1416b62423fSTing Xu VIRTCHNL_OP_DCF_CONFIG_BW = 37, 1424b4d2affSQi Zhang VIRTCHNL_OP_DCF_VLAN_OFFLOAD = 38, 1434831dfa1SQi Zhang VIRTCHNL_OP_DCF_CMD_DESC = 39, 1444831dfa1SQi Zhang VIRTCHNL_OP_DCF_CMD_BUFF = 40, 145ddfd1f9bSQi Zhang VIRTCHNL_OP_DCF_DISABLE = 41, 146109e2abbSQi Zhang VIRTCHNL_OP_DCF_GET_VSI_MAP = 42, 147f5cd3a9fSQi Zhang VIRTCHNL_OP_DCF_GET_PKG_INFO = 43, 148a8180656SQi Zhang VIRTCHNL_OP_GET_SUPPORTED_RXDIDS = 44, 14957094d59SQi Zhang VIRTCHNL_OP_ADD_RSS_CFG = 45, 15057094d59SQi Zhang VIRTCHNL_OP_DEL_RSS_CFG = 46, 15102ec7cf6SQi Zhang VIRTCHNL_OP_ADD_FDIR_FILTER = 47, 15202ec7cf6SQi Zhang VIRTCHNL_OP_DEL_FDIR_FILTER = 48, 153691ad362SQi Zhang VIRTCHNL_OP_GET_MAX_RSS_QREGION = 50, 15486edb0bdSQi Zhang VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS = 51, 15586edb0bdSQi Zhang VIRTCHNL_OP_ADD_VLAN_V2 = 52, 15686edb0bdSQi Zhang VIRTCHNL_OP_DEL_VLAN_V2 = 53, 15786edb0bdSQi Zhang VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2 = 54, 15886edb0bdSQi Zhang VIRTCHNL_OP_DISABLE_VLAN_STRIPPING_V2 = 55, 15986edb0bdSQi Zhang VIRTCHNL_OP_ENABLE_VLAN_INSERTION_V2 = 56, 16086edb0bdSQi Zhang VIRTCHNL_OP_DISABLE_VLAN_INSERTION_V2 = 57, 1616247f281SHaiyue Wang VIRTCHNL_OP_ENABLE_VLAN_FILTERING_V2 = 58, 1626247f281SHaiyue Wang VIRTCHNL_OP_DISABLE_VLAN_FILTERING_V2 = 59, 16390160401SSimei Su VIRTCHNL_OP_1588_PTP_GET_CAPS = 60, 16490160401SSimei Su VIRTCHNL_OP_1588_PTP_GET_TIME = 61, 165286e99f3SJacob Keller VIRTCHNL_OP_1588_PTP_SET_TIME = 62, 166286e99f3SJacob Keller VIRTCHNL_OP_1588_PTP_ADJ_TIME = 63, 167286e99f3SJacob Keller VIRTCHNL_OP_1588_PTP_ADJ_FREQ = 64, 168286e99f3SJacob Keller VIRTCHNL_OP_1588_PTP_TX_TIMESTAMP = 65, 1696b62423fSTing Xu VIRTCHNL_OP_GET_QOS_CAPS = 66, 1706b62423fSTing Xu VIRTCHNL_OP_CONFIG_QUEUE_TC_MAP = 67, 171691ad362SQi Zhang VIRTCHNL_OP_ENABLE_QUEUES_V2 = 107, 172691ad362SQi Zhang VIRTCHNL_OP_DISABLE_QUEUES_V2 = 108, 173691ad362SQi Zhang VIRTCHNL_OP_MAP_QUEUE_VECTOR = 111, 1745779a889SWenjun Wu VIRTCHNL_OP_CONFIG_QUEUE_BW = 112, 175b14e8a57SWenjun Wu VIRTCHNL_OP_CONFIG_QUANTA = 113, 176096c2190SJie Wang VIRTCHNL_OP_FLOW_SUBSCRIBE = 114, 177096c2190SJie Wang VIRTCHNL_OP_FLOW_UNSUBSCRIBE = 115, 178886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_GET_PHY_REC_CLK_OUT = 116, 179886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_SET_PHY_REC_CLK_OUT = 117, 180886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_GET_CGU_REF_PRIO = 118, 181886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_SET_CGU_REF_PRIO = 119, 182886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_GET_INPUT_PIN_CFG = 120, 183886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_SET_INPUT_PIN_CFG = 121, 184886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_GET_OUTPUT_PIN_CFG = 122, 185886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_SET_OUTPUT_PIN_CFG = 123, 186886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_GET_CGU_ABILITIES = 124, 187886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_GET_CGU_DPLL_STATUS = 125, 188886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_SET_CGU_DPLL_CONFIG = 126, 189886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_GET_CGU_INFO = 127, 190886cc4b8SPiotr Gardocki VIRTCHNL_OP_SYNCE_GET_HW_INFO = 128, 19170250571SJun Zhang VIRTCHNL_OP_GNSS_READ_I2C = 129, 19270250571SJun Zhang VIRTCHNL_OP_GNSS_WRITE_I2C = 130, 193d00846d9SLukasz Plachno VIRTCHNL_OP_HQOS_TREE_READ = 131, 194d00846d9SLukasz Plachno VIRTCHNL_OP_HQOS_ELEMS_ADD = 132, 195d00846d9SLukasz Plachno VIRTCHNL_OP_HQOS_ELEMS_DEL = 133, 196d00846d9SLukasz Plachno VIRTCHNL_OP_HQOS_ELEMS_MOVE = 134, 197d00846d9SLukasz Plachno VIRTCHNL_OP_HQOS_ELEMS_CONF = 135, 198691ad362SQi Zhang VIRTCHNL_OP_MAX, 19989214fe9SHaiyue Wang }; 20089214fe9SHaiyue Wang 20186edb0bdSQi Zhang static inline const char *virtchnl_op_str(enum virtchnl_ops v_opcode) 20286edb0bdSQi Zhang { 20386edb0bdSQi Zhang switch (v_opcode) { 20486edb0bdSQi Zhang case VIRTCHNL_OP_UNKNOWN: 20586edb0bdSQi Zhang return "VIRTCHNL_OP_UNKNOWN"; 20686edb0bdSQi Zhang case VIRTCHNL_OP_VERSION: 20786edb0bdSQi Zhang return "VIRTCHNL_OP_VERSION"; 20886edb0bdSQi Zhang case VIRTCHNL_OP_RESET_VF: 20986edb0bdSQi Zhang return "VIRTCHNL_OP_RESET_VF"; 21086edb0bdSQi Zhang case VIRTCHNL_OP_GET_VF_RESOURCES: 21186edb0bdSQi Zhang return "VIRTCHNL_OP_GET_VF_RESOURCES"; 21286edb0bdSQi Zhang case VIRTCHNL_OP_CONFIG_TX_QUEUE: 21386edb0bdSQi Zhang return "VIRTCHNL_OP_CONFIG_TX_QUEUE"; 21486edb0bdSQi Zhang case VIRTCHNL_OP_CONFIG_RX_QUEUE: 21586edb0bdSQi Zhang return "VIRTCHNL_OP_CONFIG_RX_QUEUE"; 21686edb0bdSQi Zhang case VIRTCHNL_OP_CONFIG_VSI_QUEUES: 21786edb0bdSQi Zhang return "VIRTCHNL_OP_CONFIG_VSI_QUEUES"; 21886edb0bdSQi Zhang case VIRTCHNL_OP_CONFIG_IRQ_MAP: 21986edb0bdSQi Zhang return "VIRTCHNL_OP_CONFIG_IRQ_MAP"; 22086edb0bdSQi Zhang case VIRTCHNL_OP_ENABLE_QUEUES: 22186edb0bdSQi Zhang return "VIRTCHNL_OP_ENABLE_QUEUES"; 22286edb0bdSQi Zhang case VIRTCHNL_OP_DISABLE_QUEUES: 22386edb0bdSQi Zhang return "VIRTCHNL_OP_DISABLE_QUEUES"; 22486edb0bdSQi Zhang case VIRTCHNL_OP_ADD_ETH_ADDR: 22586edb0bdSQi Zhang return "VIRTCHNL_OP_ADD_ETH_ADDR"; 22686edb0bdSQi Zhang case VIRTCHNL_OP_DEL_ETH_ADDR: 22786edb0bdSQi Zhang return "VIRTCHNL_OP_DEL_ETH_ADDR"; 22886edb0bdSQi Zhang case VIRTCHNL_OP_ADD_VLAN: 22986edb0bdSQi Zhang return "VIRTCHNL_OP_ADD_VLAN"; 23086edb0bdSQi Zhang case VIRTCHNL_OP_DEL_VLAN: 23186edb0bdSQi Zhang return "VIRTCHNL_OP_DEL_VLAN"; 23286edb0bdSQi Zhang case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: 23386edb0bdSQi Zhang return "VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE"; 23486edb0bdSQi Zhang case VIRTCHNL_OP_GET_STATS: 23586edb0bdSQi Zhang return "VIRTCHNL_OP_GET_STATS"; 23686edb0bdSQi Zhang case VIRTCHNL_OP_RSVD: 23786edb0bdSQi Zhang return "VIRTCHNL_OP_RSVD"; 23886edb0bdSQi Zhang case VIRTCHNL_OP_EVENT: 23986edb0bdSQi Zhang return "VIRTCHNL_OP_EVENT"; 24086edb0bdSQi Zhang case VIRTCHNL_OP_CONFIG_RSS_KEY: 24186edb0bdSQi Zhang return "VIRTCHNL_OP_CONFIG_RSS_KEY"; 24286edb0bdSQi Zhang case VIRTCHNL_OP_CONFIG_RSS_LUT: 24386edb0bdSQi Zhang return "VIRTCHNL_OP_CONFIG_RSS_LUT"; 24486edb0bdSQi Zhang case VIRTCHNL_OP_GET_RSS_HENA_CAPS: 24586edb0bdSQi Zhang return "VIRTCHNL_OP_GET_RSS_HENA_CAPS"; 24686edb0bdSQi Zhang case VIRTCHNL_OP_SET_RSS_HENA: 24786edb0bdSQi Zhang return "VIRTCHNL_OP_SET_RSS_HENA"; 24886edb0bdSQi Zhang case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING: 24986edb0bdSQi Zhang return "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING"; 25086edb0bdSQi Zhang case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING: 25186edb0bdSQi Zhang return "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING"; 25286edb0bdSQi Zhang case VIRTCHNL_OP_REQUEST_QUEUES: 25386edb0bdSQi Zhang return "VIRTCHNL_OP_REQUEST_QUEUES"; 25486edb0bdSQi Zhang case VIRTCHNL_OP_ENABLE_CHANNELS: 25586edb0bdSQi Zhang return "VIRTCHNL_OP_ENABLE_CHANNELS"; 25686edb0bdSQi Zhang case VIRTCHNL_OP_DISABLE_CHANNELS: 25786edb0bdSQi Zhang return "VIRTCHNL_OP_DISABLE_CHANNELS"; 25886edb0bdSQi Zhang case VIRTCHNL_OP_ADD_CLOUD_FILTER: 25986edb0bdSQi Zhang return "VIRTCHNL_OP_ADD_CLOUD_FILTER"; 26086edb0bdSQi Zhang case VIRTCHNL_OP_DEL_CLOUD_FILTER: 26186edb0bdSQi Zhang return "VIRTCHNL_OP_DEL_CLOUD_FILTER"; 262993f0d4dSRadu Nicolau case VIRTCHNL_OP_INLINE_IPSEC_CRYPTO: 263993f0d4dSRadu Nicolau return "VIRTCHNL_OP_INLINE_IPSEC_CRYPTO"; 26486edb0bdSQi Zhang case VIRTCHNL_OP_DCF_CMD_DESC: 26586edb0bdSQi Zhang return "VIRTCHNL_OP_DCF_CMD_DESC"; 26686edb0bdSQi Zhang case VIRTCHNL_OP_DCF_CMD_BUFF: 2677be78d02SJosh Soref return "VIRTCHNL_OP_DCF_CMD_BUFF"; 26886edb0bdSQi Zhang case VIRTCHNL_OP_DCF_DISABLE: 26986edb0bdSQi Zhang return "VIRTCHNL_OP_DCF_DISABLE"; 27086edb0bdSQi Zhang case VIRTCHNL_OP_DCF_GET_VSI_MAP: 27186edb0bdSQi Zhang return "VIRTCHNL_OP_DCF_GET_VSI_MAP"; 27286edb0bdSQi Zhang case VIRTCHNL_OP_GET_SUPPORTED_RXDIDS: 27386edb0bdSQi Zhang return "VIRTCHNL_OP_GET_SUPPORTED_RXDIDS"; 27486edb0bdSQi Zhang case VIRTCHNL_OP_ADD_RSS_CFG: 27586edb0bdSQi Zhang return "VIRTCHNL_OP_ADD_RSS_CFG"; 27686edb0bdSQi Zhang case VIRTCHNL_OP_DEL_RSS_CFG: 27786edb0bdSQi Zhang return "VIRTCHNL_OP_DEL_RSS_CFG"; 27886edb0bdSQi Zhang case VIRTCHNL_OP_ADD_FDIR_FILTER: 27986edb0bdSQi Zhang return "VIRTCHNL_OP_ADD_FDIR_FILTER"; 28086edb0bdSQi Zhang case VIRTCHNL_OP_DEL_FDIR_FILTER: 28186edb0bdSQi Zhang return "VIRTCHNL_OP_DEL_FDIR_FILTER"; 28286edb0bdSQi Zhang case VIRTCHNL_OP_GET_MAX_RSS_QREGION: 28386edb0bdSQi Zhang return "VIRTCHNL_OP_GET_MAX_RSS_QREGION"; 28486edb0bdSQi Zhang case VIRTCHNL_OP_ENABLE_QUEUES_V2: 28586edb0bdSQi Zhang return "VIRTCHNL_OP_ENABLE_QUEUES_V2"; 28686edb0bdSQi Zhang case VIRTCHNL_OP_DISABLE_QUEUES_V2: 28786edb0bdSQi Zhang return "VIRTCHNL_OP_DISABLE_QUEUES_V2"; 28886edb0bdSQi Zhang case VIRTCHNL_OP_MAP_QUEUE_VECTOR: 28986edb0bdSQi Zhang return "VIRTCHNL_OP_MAP_QUEUE_VECTOR"; 29086edb0bdSQi Zhang case VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS: 29186edb0bdSQi Zhang return "VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS"; 29286edb0bdSQi Zhang case VIRTCHNL_OP_ADD_VLAN_V2: 29386edb0bdSQi Zhang return "VIRTCHNL_OP_ADD_VLAN_V2"; 29486edb0bdSQi Zhang case VIRTCHNL_OP_DEL_VLAN_V2: 29586edb0bdSQi Zhang return "VIRTCHNL_OP_DEL_VLAN_V2"; 29686edb0bdSQi Zhang case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2: 29786edb0bdSQi Zhang return "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2"; 29886edb0bdSQi Zhang case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING_V2: 29986edb0bdSQi Zhang return "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING_V2"; 30086edb0bdSQi Zhang case VIRTCHNL_OP_ENABLE_VLAN_INSERTION_V2: 30186edb0bdSQi Zhang return "VIRTCHNL_OP_ENABLE_VLAN_INSERTION_V2"; 30286edb0bdSQi Zhang case VIRTCHNL_OP_DISABLE_VLAN_INSERTION_V2: 30386edb0bdSQi Zhang return "VIRTCHNL_OP_DISABLE_VLAN_INSERTION_V2"; 3046247f281SHaiyue Wang case VIRTCHNL_OP_ENABLE_VLAN_FILTERING_V2: 3056247f281SHaiyue Wang return "VIRTCHNL_OP_ENABLE_VLAN_FILTERING_V2"; 3066247f281SHaiyue Wang case VIRTCHNL_OP_DISABLE_VLAN_FILTERING_V2: 3076247f281SHaiyue Wang return "VIRTCHNL_OP_DISABLE_VLAN_FILTERING_V2"; 30890160401SSimei Su case VIRTCHNL_OP_1588_PTP_GET_CAPS: 30990160401SSimei Su return "VIRTCHNL_OP_1588_PTP_GET_CAPS"; 31090160401SSimei Su case VIRTCHNL_OP_1588_PTP_GET_TIME: 31190160401SSimei Su return "VIRTCHNL_OP_1588_PTP_GET_TIME"; 312286e99f3SJacob Keller case VIRTCHNL_OP_1588_PTP_SET_TIME: 313286e99f3SJacob Keller return "VIRTCHNL_OP_1588_PTP_SET_TIME"; 314286e99f3SJacob Keller case VIRTCHNL_OP_1588_PTP_ADJ_TIME: 315286e99f3SJacob Keller return "VIRTCHNL_OP_1588_PTP_ADJ_TIME"; 316286e99f3SJacob Keller case VIRTCHNL_OP_1588_PTP_ADJ_FREQ: 317286e99f3SJacob Keller return "VIRTCHNL_OP_1588_PTP_ADJ_FREQ"; 318286e99f3SJacob Keller case VIRTCHNL_OP_1588_PTP_TX_TIMESTAMP: 319286e99f3SJacob Keller return "VIRTCHNL_OP_1588_PTP_TX_TIMESTAMP"; 320886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_PHY_REC_CLK_OUT: 321886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_GET_PHY_REC_CLK_OUT"; 322886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_PHY_REC_CLK_OUT: 323886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_SET_PHY_REC_CLK_OUT"; 324886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_CGU_REF_PRIO: 325886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_GET_CGU_REF_PRIO"; 326886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_CGU_REF_PRIO: 327886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_SET_CGU_REF_PRIO"; 328886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_INPUT_PIN_CFG: 329886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_GET_INPUT_PIN_CFG"; 330886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_INPUT_PIN_CFG: 331886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_SET_INPUT_PIN_CFG"; 332886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_OUTPUT_PIN_CFG: 333886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_GET_OUTPUT_PIN_CFG"; 334886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_OUTPUT_PIN_CFG: 335886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_SET_OUTPUT_PIN_CFG"; 336886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_CGU_ABILITIES: 337886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_GET_CGU_ABILITIES"; 338886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_CGU_DPLL_STATUS: 339886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_GET_CGU_DPLL_STATUS"; 340886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_CGU_DPLL_CONFIG: 341886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_SET_CGU_DPLL_CONFIG"; 342886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_CGU_INFO: 343886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_GET_CGU_INFO"; 344886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_HW_INFO: 345886cc4b8SPiotr Gardocki return "VIRTCHNL_OP_SYNCE_GET_HW_INFO"; 34670250571SJun Zhang case VIRTCHNL_OP_GNSS_READ_I2C: 34770250571SJun Zhang return "VIRTCHNL_OP_GNSS_READ_I2C"; 34870250571SJun Zhang case VIRTCHNL_OP_GNSS_WRITE_I2C: 34970250571SJun Zhang return "VIRTCHNL_OP_GNSS_WRITE_I2C"; 350096c2190SJie Wang case VIRTCHNL_OP_FLOW_SUBSCRIBE: 351096c2190SJie Wang return "VIRTCHNL_OP_FLOW_SUBSCRIBE"; 352096c2190SJie Wang case VIRTCHNL_OP_FLOW_UNSUBSCRIBE: 353096c2190SJie Wang return "VIRTCHNL_OP_FLOW_UNSUBSCRIBE"; 354d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_TREE_READ: 355d00846d9SLukasz Plachno return "VIRTCHNL_OP_HQOS_TREE_READ"; 356d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_ELEMS_ADD: 357d00846d9SLukasz Plachno return "VIRTCHNL_OP_HQOS_ELEMS_ADD"; 358d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_ELEMS_DEL: 359d00846d9SLukasz Plachno return "VIRTCHNL_OP_HQOS_ELEMS_DEL"; 360d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_ELEMS_MOVE: 361d00846d9SLukasz Plachno return "VIRTCHNL_OP_HQOS_ELEMS_MOVE"; 362d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_ELEMS_CONF: 363d00846d9SLukasz Plachno return "VIRTCHNL_OP_HQOS_ELEMS_CONF"; 36486edb0bdSQi Zhang case VIRTCHNL_OP_MAX: 36586edb0bdSQi Zhang return "VIRTCHNL_OP_MAX"; 36686edb0bdSQi Zhang default: 36786edb0bdSQi Zhang return "Unsupported (update virtchnl.h)"; 36886edb0bdSQi Zhang } 36986edb0bdSQi Zhang } 37086edb0bdSQi Zhang 37189214fe9SHaiyue Wang /* These macros are used to generate compilation errors if a structure/union 37289214fe9SHaiyue Wang * is not exactly the correct length. It gives a divide by zero error if the 37389214fe9SHaiyue Wang * structure/union is not of the correct size, otherwise it creates an enum 37489214fe9SHaiyue Wang * that is never used. 37589214fe9SHaiyue Wang */ 37689214fe9SHaiyue Wang #define VIRTCHNL_CHECK_STRUCT_LEN(n, X) enum virtchnl_static_assert_enum_##X \ 37789214fe9SHaiyue Wang { virtchnl_static_assert_##X = (n)/((sizeof(struct X) == (n)) ? 1 : 0) } 37889214fe9SHaiyue Wang #define VIRTCHNL_CHECK_UNION_LEN(n, X) enum virtchnl_static_asset_enum_##X \ 37989214fe9SHaiyue Wang { virtchnl_static_assert_##X = (n)/((sizeof(union X) == (n)) ? 1 : 0) } 38089214fe9SHaiyue Wang 38189214fe9SHaiyue Wang /* Virtual channel message descriptor. This overlays the admin queue 38289214fe9SHaiyue Wang * descriptor. All other data is passed in external buffers. 38389214fe9SHaiyue Wang */ 38489214fe9SHaiyue Wang 38589214fe9SHaiyue Wang struct virtchnl_msg { 38689214fe9SHaiyue Wang u8 pad[8]; /* AQ flags/opcode/len/retval fields */ 387e53176efSQi Zhang 388e53176efSQi Zhang /* avoid confusion with desc->opcode */ 389e53176efSQi Zhang enum virtchnl_ops v_opcode; 390e53176efSQi Zhang 391e53176efSQi Zhang /* ditto for desc->retval */ 392e53176efSQi Zhang enum virtchnl_status_code v_retval; 39389214fe9SHaiyue Wang u32 vfid; /* used by PF when sending to VF */ 39489214fe9SHaiyue Wang }; 39589214fe9SHaiyue Wang 39689214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(20, virtchnl_msg); 39789214fe9SHaiyue Wang 39889214fe9SHaiyue Wang /* Message descriptions and data structures. */ 39989214fe9SHaiyue Wang 40089214fe9SHaiyue Wang /* VIRTCHNL_OP_VERSION 40189214fe9SHaiyue Wang * VF posts its version number to the PF. PF responds with its version number 40289214fe9SHaiyue Wang * in the same format, along with a return code. 40389214fe9SHaiyue Wang * Reply from PF has its major/minor versions also in param0 and param1. 40489214fe9SHaiyue Wang * If there is a major version mismatch, then the VF cannot operate. 40589214fe9SHaiyue Wang * If there is a minor version mismatch, then the VF can operate but should 40689214fe9SHaiyue Wang * add a warning to the system log. 40789214fe9SHaiyue Wang * 40889214fe9SHaiyue Wang * This enum element MUST always be specified as == 1, regardless of other 40989214fe9SHaiyue Wang * changes in the API. The PF must always respond to this message without 41089214fe9SHaiyue Wang * error regardless of version mismatch. 41189214fe9SHaiyue Wang */ 41289214fe9SHaiyue Wang #define VIRTCHNL_VERSION_MAJOR 1 41389214fe9SHaiyue Wang #define VIRTCHNL_VERSION_MINOR 1 41489214fe9SHaiyue Wang #define VIRTCHNL_VERSION_MINOR_NO_VF_CAPS 0 41589214fe9SHaiyue Wang 41689214fe9SHaiyue Wang struct virtchnl_version_info { 41789214fe9SHaiyue Wang u32 major; 41889214fe9SHaiyue Wang u32 minor; 41989214fe9SHaiyue Wang }; 42089214fe9SHaiyue Wang 42189214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_version_info); 42289214fe9SHaiyue Wang 42389214fe9SHaiyue Wang #define VF_IS_V10(_v) (((_v)->major == 1) && ((_v)->minor == 0)) 42489214fe9SHaiyue Wang #define VF_IS_V11(_ver) (((_ver)->major == 1) && ((_ver)->minor == 1)) 42589214fe9SHaiyue Wang 42689214fe9SHaiyue Wang /* VIRTCHNL_OP_RESET_VF 42789214fe9SHaiyue Wang * VF sends this request to PF with no parameters 42889214fe9SHaiyue Wang * PF does NOT respond! VF driver must delay then poll VFGEN_RSTAT register 42989214fe9SHaiyue Wang * until reset completion is indicated. The admin queue must be reinitialized 43089214fe9SHaiyue Wang * after this operation. 43189214fe9SHaiyue Wang * 43289214fe9SHaiyue Wang * When reset is complete, PF must ensure that all queues in all VSIs associated 43389214fe9SHaiyue Wang * with the VF are stopped, all queue configurations in the HMC are set to 0, 43489214fe9SHaiyue Wang * and all MAC and VLAN filters (except the default MAC address) on all VSIs 43589214fe9SHaiyue Wang * are cleared. 43689214fe9SHaiyue Wang */ 43789214fe9SHaiyue Wang 43889214fe9SHaiyue Wang /* VSI types that use VIRTCHNL interface for VF-PF communication. VSI_SRIOV 43989214fe9SHaiyue Wang * vsi_type should always be 6 for backward compatibility. Add other fields 44089214fe9SHaiyue Wang * as needed. 44189214fe9SHaiyue Wang */ 44289214fe9SHaiyue Wang enum virtchnl_vsi_type { 44389214fe9SHaiyue Wang VIRTCHNL_VSI_TYPE_INVALID = 0, 44489214fe9SHaiyue Wang VIRTCHNL_VSI_SRIOV = 6, 44589214fe9SHaiyue Wang }; 44689214fe9SHaiyue Wang 44789214fe9SHaiyue Wang /* VIRTCHNL_OP_GET_VF_RESOURCES 44889214fe9SHaiyue Wang * Version 1.0 VF sends this request to PF with no parameters 44989214fe9SHaiyue Wang * Version 1.1 VF sends this request to PF with u32 bitmap of its capabilities 45089214fe9SHaiyue Wang * PF responds with an indirect message containing 45189214fe9SHaiyue Wang * virtchnl_vf_resource and one or more 45289214fe9SHaiyue Wang * virtchnl_vsi_resource structures. 45389214fe9SHaiyue Wang */ 45489214fe9SHaiyue Wang 45589214fe9SHaiyue Wang struct virtchnl_vsi_resource { 45689214fe9SHaiyue Wang u16 vsi_id; 45789214fe9SHaiyue Wang u16 num_queue_pairs; 458e53176efSQi Zhang 459e53176efSQi Zhang /* see enum virtchnl_vsi_type */ 460e53176efSQi Zhang s32 vsi_type; 46189214fe9SHaiyue Wang u16 qset_handle; 46289214fe9SHaiyue Wang u8 default_mac_addr[VIRTCHNL_ETH_LENGTH_OF_ADDRESS]; 46389214fe9SHaiyue Wang }; 46489214fe9SHaiyue Wang 46589214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_vsi_resource); 46689214fe9SHaiyue Wang 46789214fe9SHaiyue Wang /* VF capability flags 46889214fe9SHaiyue Wang * VIRTCHNL_VF_OFFLOAD_L2 flag is inclusive of base mode L2 offloads including 46989214fe9SHaiyue Wang * TX/RX Checksum offloading and TSO for non-tunnelled packets. 47089214fe9SHaiyue Wang */ 4717880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_L2 BIT(0) 4727880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_IWARP BIT(1) 4737880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_RSVD BIT(2) 4747880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_RSS_AQ BIT(3) 4757880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_RSS_REG BIT(4) 4767880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_WB_ON_ITR BIT(5) 4777880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_REQ_QUEUES BIT(6) 47844a87aa9SQi Zhang /* used to negotiate communicating link speeds in Mbps */ 4797880d1d4SQi Zhang #define VIRTCHNL_VF_CAP_ADV_LINK_SPEED BIT(7) 480993f0d4dSRadu Nicolau #define VIRTCHNL_VF_OFFLOAD_INLINE_IPSEC_CRYPTO BIT(8) 4817880d1d4SQi Zhang #define VIRTCHNL_VF_LARGE_NUM_QPAIRS BIT(9) 4827880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_CRC BIT(10) 4830016b690SSudheer Mogilappagari #define VIRTCHNL_VF_OFFLOAD_QGRPS BIT(12) 4840016b690SSudheer Mogilappagari #define VIRTCHNL_VF_OFFLOAD_FLOW_STEER_TO_QGRP BIT(13) 485096c2190SJie Wang #define VIRTCHNL_VF_OFFLOAD_FSUB_PF BIT(14) 4867880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_VLAN_V2 BIT(15) 4877880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_VLAN BIT(16) 4887880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_RX_POLLING BIT(17) 4897880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2 BIT(18) 4907880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_RSS_PF BIT(19) 4917880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_ENCAP BIT(20) 4927880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM BIT(21) 4937880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_RX_ENCAP_CSUM BIT(22) 4947880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_ADQ BIT(23) 4957880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_ADQ_V2 BIT(24) 4967880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_USO BIT(25) 4977880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC BIT(26) 4987880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF BIT(27) 4997880d1d4SQi Zhang #define VIRTCHNL_VF_OFFLOAD_FDIR_PF BIT(28) 5006b62423fSTing Xu #define VIRTCHNL_VF_OFFLOAD_QOS BIT(29) 5017880d1d4SQi Zhang #define VIRTCHNL_VF_CAP_DCF BIT(30) 50290160401SSimei Su #define VIRTCHNL_VF_CAP_PTP BIT(31) 50389214fe9SHaiyue Wang 50489214fe9SHaiyue Wang #define VF_BASE_MODE_OFFLOADS (VIRTCHNL_VF_OFFLOAD_L2 | \ 50589214fe9SHaiyue Wang VIRTCHNL_VF_OFFLOAD_VLAN | \ 50689214fe9SHaiyue Wang VIRTCHNL_VF_OFFLOAD_RSS_PF) 50789214fe9SHaiyue Wang 50889214fe9SHaiyue Wang struct virtchnl_vf_resource { 50989214fe9SHaiyue Wang u16 num_vsis; 51089214fe9SHaiyue Wang u16 num_queue_pairs; 51189214fe9SHaiyue Wang u16 max_vectors; 51289214fe9SHaiyue Wang u16 max_mtu; 51389214fe9SHaiyue Wang 51489214fe9SHaiyue Wang u32 vf_cap_flags; 51589214fe9SHaiyue Wang u32 rss_key_size; 51689214fe9SHaiyue Wang u32 rss_lut_size; 51789214fe9SHaiyue Wang 51889214fe9SHaiyue Wang struct virtchnl_vsi_resource vsi_res[1]; 51989214fe9SHaiyue Wang }; 52089214fe9SHaiyue Wang 52189214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(36, virtchnl_vf_resource); 52289214fe9SHaiyue Wang 52389214fe9SHaiyue Wang /* VIRTCHNL_OP_CONFIG_TX_QUEUE 52489214fe9SHaiyue Wang * VF sends this message to set up parameters for one TX queue. 52589214fe9SHaiyue Wang * External data buffer contains one instance of virtchnl_txq_info. 52689214fe9SHaiyue Wang * PF configures requested queue and returns a status code. 52789214fe9SHaiyue Wang */ 52889214fe9SHaiyue Wang 52989214fe9SHaiyue Wang /* Tx queue config info */ 53089214fe9SHaiyue Wang struct virtchnl_txq_info { 53189214fe9SHaiyue Wang u16 vsi_id; 53289214fe9SHaiyue Wang u16 queue_id; 53389214fe9SHaiyue Wang u16 ring_len; /* number of descriptors, multiple of 8 */ 53489214fe9SHaiyue Wang u16 headwb_enabled; /* deprecated with AVF 1.0 */ 53589214fe9SHaiyue Wang u64 dma_ring_addr; 53689214fe9SHaiyue Wang u64 dma_headwb_addr; /* deprecated with AVF 1.0 */ 53789214fe9SHaiyue Wang }; 53889214fe9SHaiyue Wang 53989214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_txq_info); 54089214fe9SHaiyue Wang 5418265d39aSQi Zhang /* RX descriptor IDs (range from 0 to 63) */ 5428265d39aSQi Zhang enum virtchnl_rx_desc_ids { 5438265d39aSQi Zhang VIRTCHNL_RXDID_0_16B_BASE = 0, 5448265d39aSQi Zhang /* 32B_BASE and FLEX_SPLITQ share desc ids as default descriptors 5458265d39aSQi Zhang * because they can be differentiated based on queue model; e.g. single 5468265d39aSQi Zhang * queue model can only use 32B_BASE and split queue model can only use 5478265d39aSQi Zhang * FLEX_SPLITQ. Having these as 1 allows them to be used as default 5488265d39aSQi Zhang * descriptors without negotiation. 5498265d39aSQi Zhang */ 5508265d39aSQi Zhang VIRTCHNL_RXDID_1_32B_BASE = 1, 5518265d39aSQi Zhang VIRTCHNL_RXDID_1_FLEX_SPLITQ = 1, 5528265d39aSQi Zhang VIRTCHNL_RXDID_2_FLEX_SQ_NIC = 2, 5538265d39aSQi Zhang VIRTCHNL_RXDID_3_FLEX_SQ_SW = 3, 5548265d39aSQi Zhang VIRTCHNL_RXDID_4_FLEX_SQ_NIC_VEB = 4, 5558265d39aSQi Zhang VIRTCHNL_RXDID_5_FLEX_SQ_NIC_ACL = 5, 5568265d39aSQi Zhang VIRTCHNL_RXDID_6_FLEX_SQ_NIC_2 = 6, 5578265d39aSQi Zhang VIRTCHNL_RXDID_7_HW_RSVD = 7, 5588265d39aSQi Zhang /* 9 through 15 are reserved */ 5598265d39aSQi Zhang VIRTCHNL_RXDID_16_COMMS_GENERIC = 16, 5608265d39aSQi Zhang VIRTCHNL_RXDID_17_COMMS_AUX_VLAN = 17, 5618265d39aSQi Zhang VIRTCHNL_RXDID_18_COMMS_AUX_IPV4 = 18, 5628265d39aSQi Zhang VIRTCHNL_RXDID_19_COMMS_AUX_IPV6 = 19, 5638265d39aSQi Zhang VIRTCHNL_RXDID_20_COMMS_AUX_FLOW = 20, 5648265d39aSQi Zhang VIRTCHNL_RXDID_21_COMMS_AUX_TCP = 21, 5658265d39aSQi Zhang /* 22 through 63 are reserved */ 5668265d39aSQi Zhang }; 5678265d39aSQi Zhang 5688265d39aSQi Zhang /* RX descriptor ID bitmasks */ 5698265d39aSQi Zhang enum virtchnl_rx_desc_id_bitmasks { 5708265d39aSQi Zhang VIRTCHNL_RXDID_0_16B_BASE_M = BIT(VIRTCHNL_RXDID_0_16B_BASE), 5718265d39aSQi Zhang VIRTCHNL_RXDID_1_32B_BASE_M = BIT(VIRTCHNL_RXDID_1_32B_BASE), 5728265d39aSQi Zhang VIRTCHNL_RXDID_1_FLEX_SPLITQ_M = BIT(VIRTCHNL_RXDID_1_FLEX_SPLITQ), 5738265d39aSQi Zhang VIRTCHNL_RXDID_2_FLEX_SQ_NIC_M = BIT(VIRTCHNL_RXDID_2_FLEX_SQ_NIC), 5748265d39aSQi Zhang VIRTCHNL_RXDID_3_FLEX_SQ_SW_M = BIT(VIRTCHNL_RXDID_3_FLEX_SQ_SW), 5758265d39aSQi Zhang VIRTCHNL_RXDID_4_FLEX_SQ_NIC_VEB_M = BIT(VIRTCHNL_RXDID_4_FLEX_SQ_NIC_VEB), 5768265d39aSQi Zhang VIRTCHNL_RXDID_5_FLEX_SQ_NIC_ACL_M = BIT(VIRTCHNL_RXDID_5_FLEX_SQ_NIC_ACL), 5778265d39aSQi Zhang VIRTCHNL_RXDID_6_FLEX_SQ_NIC_2_M = BIT(VIRTCHNL_RXDID_6_FLEX_SQ_NIC_2), 5788265d39aSQi Zhang VIRTCHNL_RXDID_7_HW_RSVD_M = BIT(VIRTCHNL_RXDID_7_HW_RSVD), 5798265d39aSQi Zhang /* 9 through 15 are reserved */ 5808265d39aSQi Zhang VIRTCHNL_RXDID_16_COMMS_GENERIC_M = BIT(VIRTCHNL_RXDID_16_COMMS_GENERIC), 5818265d39aSQi Zhang VIRTCHNL_RXDID_17_COMMS_AUX_VLAN_M = BIT(VIRTCHNL_RXDID_17_COMMS_AUX_VLAN), 5828265d39aSQi Zhang VIRTCHNL_RXDID_18_COMMS_AUX_IPV4_M = BIT(VIRTCHNL_RXDID_18_COMMS_AUX_IPV4), 5838265d39aSQi Zhang VIRTCHNL_RXDID_19_COMMS_AUX_IPV6_M = BIT(VIRTCHNL_RXDID_19_COMMS_AUX_IPV6), 5848265d39aSQi Zhang VIRTCHNL_RXDID_20_COMMS_AUX_FLOW_M = BIT(VIRTCHNL_RXDID_20_COMMS_AUX_FLOW), 5858265d39aSQi Zhang VIRTCHNL_RXDID_21_COMMS_AUX_TCP_M = BIT(VIRTCHNL_RXDID_21_COMMS_AUX_TCP), 5868265d39aSQi Zhang /* 22 through 63 are reserved */ 5878265d39aSQi Zhang }; 5888265d39aSQi Zhang 58990160401SSimei Su /* virtchnl_rxq_info_flags 59090160401SSimei Su * 59190160401SSimei Su * Definition of bits in the flags field of the virtchnl_rxq_info structure. 59290160401SSimei Su */ 59390160401SSimei Su enum virtchnl_rxq_info_flags { 59490160401SSimei Su /* If the VIRTCHNL_PTP_RX_TSTAMP bit of the flag field is set, this is 59590160401SSimei Su * a request to enable Rx timestamp. Other flag bits are currently 59690160401SSimei Su * reserved and they may be extended in the future. 59790160401SSimei Su */ 59890160401SSimei Su VIRTCHNL_PTP_RX_TSTAMP = BIT(0), 59990160401SSimei Su }; 60090160401SSimei Su 60189214fe9SHaiyue Wang /* VIRTCHNL_OP_CONFIG_RX_QUEUE 60289214fe9SHaiyue Wang * VF sends this message to set up parameters for one RX queue. 60389214fe9SHaiyue Wang * External data buffer contains one instance of virtchnl_rxq_info. 60489214fe9SHaiyue Wang * PF configures requested queue and returns a status code. The 60589214fe9SHaiyue Wang * crc_disable flag disables CRC stripping on the VF. Setting 60689214fe9SHaiyue Wang * the crc_disable flag to 1 will disable CRC stripping for each 60789214fe9SHaiyue Wang * queue in the VF where the flag is set. The VIRTCHNL_VF_OFFLOAD_CRC 60889214fe9SHaiyue Wang * offload must have been set prior to sending this info or the PF 60989214fe9SHaiyue Wang * will ignore the request. This flag should be set the same for 61089214fe9SHaiyue Wang * all of the queues for a VF. 61189214fe9SHaiyue Wang */ 61289214fe9SHaiyue Wang 61389214fe9SHaiyue Wang /* Rx queue config info */ 61489214fe9SHaiyue Wang struct virtchnl_rxq_info { 61589214fe9SHaiyue Wang u16 vsi_id; 61689214fe9SHaiyue Wang u16 queue_id; 61789214fe9SHaiyue Wang u32 ring_len; /* number of descriptors, multiple of 32 */ 61889214fe9SHaiyue Wang u16 hdr_size; 61989214fe9SHaiyue Wang u16 splithdr_enabled; /* deprecated with AVF 1.0 */ 62089214fe9SHaiyue Wang u32 databuffer_size; 62189214fe9SHaiyue Wang u32 max_pkt_size; 62289214fe9SHaiyue Wang u8 crc_disable; 6238265d39aSQi Zhang /* see enum virtchnl_rx_desc_ids; 6248265d39aSQi Zhang * only used when VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC is supported. Note 6258265d39aSQi Zhang * that when the offload is not supported, the descriptor format aligns 6268265d39aSQi Zhang * with VIRTCHNL_RXDID_1_32B_BASE. 6278265d39aSQi Zhang */ 628a8180656SQi Zhang u8 rxdid; 62990160401SSimei Su u8 flags; /* see virtchnl_rxq_info_flags */ 63090160401SSimei Su u8 pad1; 63189214fe9SHaiyue Wang u64 dma_ring_addr; 632e53176efSQi Zhang 633e53176efSQi Zhang /* see enum virtchnl_rx_hsplit; deprecated with AVF 1.0 */ 634e53176efSQi Zhang s32 rx_split_pos; 63589214fe9SHaiyue Wang u32 pad2; 63689214fe9SHaiyue Wang }; 63789214fe9SHaiyue Wang 63889214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(40, virtchnl_rxq_info); 63989214fe9SHaiyue Wang 64089214fe9SHaiyue Wang /* VIRTCHNL_OP_CONFIG_VSI_QUEUES 64189214fe9SHaiyue Wang * VF sends this message to set parameters for active TX and RX queues 64289214fe9SHaiyue Wang * associated with the specified VSI. 64389214fe9SHaiyue Wang * PF configures queues and returns status. 64489214fe9SHaiyue Wang * If the number of queues specified is greater than the number of queues 64589214fe9SHaiyue Wang * associated with the VSI, an error is returned and no queues are configured. 64689214fe9SHaiyue Wang * NOTE: The VF is not required to configure all queues in a single request. 64789214fe9SHaiyue Wang * It may send multiple messages. PF drivers must correctly handle all VF 64889214fe9SHaiyue Wang * requests. 64989214fe9SHaiyue Wang */ 65089214fe9SHaiyue Wang struct virtchnl_queue_pair_info { 65189214fe9SHaiyue Wang /* NOTE: vsi_id and queue_id should be identical for both queues. */ 65289214fe9SHaiyue Wang struct virtchnl_txq_info txq; 65389214fe9SHaiyue Wang struct virtchnl_rxq_info rxq; 65489214fe9SHaiyue Wang }; 65589214fe9SHaiyue Wang 65689214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(64, virtchnl_queue_pair_info); 65789214fe9SHaiyue Wang 65889214fe9SHaiyue Wang struct virtchnl_vsi_queue_config_info { 65989214fe9SHaiyue Wang u16 vsi_id; 66089214fe9SHaiyue Wang u16 num_queue_pairs; 66189214fe9SHaiyue Wang u32 pad; 66289214fe9SHaiyue Wang struct virtchnl_queue_pair_info qpair[1]; 66389214fe9SHaiyue Wang }; 66489214fe9SHaiyue Wang 66589214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(72, virtchnl_vsi_queue_config_info); 66689214fe9SHaiyue Wang 66789214fe9SHaiyue Wang /* VIRTCHNL_OP_REQUEST_QUEUES 66889214fe9SHaiyue Wang * VF sends this message to request the PF to allocate additional queues to 66989214fe9SHaiyue Wang * this VF. Each VF gets a guaranteed number of queues on init but asking for 67089214fe9SHaiyue Wang * additional queues must be negotiated. This is a best effort request as it 67189214fe9SHaiyue Wang * is possible the PF does not have enough queues left to support the request. 67289214fe9SHaiyue Wang * If the PF cannot support the number requested it will respond with the 67389214fe9SHaiyue Wang * maximum number it is able to support. If the request is successful, PF will 67489214fe9SHaiyue Wang * then reset the VF to institute required changes. 67589214fe9SHaiyue Wang */ 67689214fe9SHaiyue Wang 67789214fe9SHaiyue Wang /* VF resource request */ 67889214fe9SHaiyue Wang struct virtchnl_vf_res_request { 67989214fe9SHaiyue Wang u16 num_queue_pairs; 68089214fe9SHaiyue Wang }; 68189214fe9SHaiyue Wang 68289214fe9SHaiyue Wang /* VIRTCHNL_OP_CONFIG_IRQ_MAP 68389214fe9SHaiyue Wang * VF uses this message to map vectors to queues. 68489214fe9SHaiyue Wang * The rxq_map and txq_map fields are bitmaps used to indicate which queues 68589214fe9SHaiyue Wang * are to be associated with the specified vector. 68689214fe9SHaiyue Wang * The "other" causes are always mapped to vector 0. The VF may not request 68789214fe9SHaiyue Wang * that vector 0 be used for traffic. 68889214fe9SHaiyue Wang * PF configures interrupt mapping and returns status. 68989214fe9SHaiyue Wang * NOTE: due to hardware requirements, all active queues (both TX and RX) 69089214fe9SHaiyue Wang * should be mapped to interrupts, even if the driver intends to operate 69189214fe9SHaiyue Wang * only in polling mode. In this case the interrupt may be disabled, but 69289214fe9SHaiyue Wang * the ITR timer will still run to trigger writebacks. 69389214fe9SHaiyue Wang */ 69489214fe9SHaiyue Wang struct virtchnl_vector_map { 69589214fe9SHaiyue Wang u16 vsi_id; 69689214fe9SHaiyue Wang u16 vector_id; 69789214fe9SHaiyue Wang u16 rxq_map; 69889214fe9SHaiyue Wang u16 txq_map; 69989214fe9SHaiyue Wang u16 rxitr_idx; 70089214fe9SHaiyue Wang u16 txitr_idx; 70189214fe9SHaiyue Wang }; 70289214fe9SHaiyue Wang 70389214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_vector_map); 70489214fe9SHaiyue Wang 70589214fe9SHaiyue Wang struct virtchnl_irq_map_info { 70689214fe9SHaiyue Wang u16 num_vectors; 70789214fe9SHaiyue Wang struct virtchnl_vector_map vecmap[1]; 70889214fe9SHaiyue Wang }; 70989214fe9SHaiyue Wang 71089214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(14, virtchnl_irq_map_info); 71189214fe9SHaiyue Wang 71289214fe9SHaiyue Wang /* VIRTCHNL_OP_ENABLE_QUEUES 71389214fe9SHaiyue Wang * VIRTCHNL_OP_DISABLE_QUEUES 71489214fe9SHaiyue Wang * VF sends these message to enable or disable TX/RX queue pairs. 71589214fe9SHaiyue Wang * The queues fields are bitmaps indicating which queues to act upon. 71689214fe9SHaiyue Wang * (Currently, we only support 16 queues per VF, but we make the field 71789214fe9SHaiyue Wang * u32 to allow for expansion.) 71889214fe9SHaiyue Wang * PF performs requested action and returns status. 71989214fe9SHaiyue Wang * NOTE: The VF is not required to enable/disable all queues in a single 72089214fe9SHaiyue Wang * request. It may send multiple messages. 72189214fe9SHaiyue Wang * PF drivers must correctly handle all VF requests. 72289214fe9SHaiyue Wang */ 72389214fe9SHaiyue Wang struct virtchnl_queue_select { 72489214fe9SHaiyue Wang u16 vsi_id; 72589214fe9SHaiyue Wang u16 pad; 72689214fe9SHaiyue Wang u32 rx_queues; 72789214fe9SHaiyue Wang u32 tx_queues; 72889214fe9SHaiyue Wang }; 72989214fe9SHaiyue Wang 73089214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_queue_select); 73189214fe9SHaiyue Wang 732691ad362SQi Zhang /* VIRTCHNL_OP_GET_MAX_RSS_QREGION 733691ad362SQi Zhang * 734691ad362SQi Zhang * if VIRTCHNL_VF_LARGE_NUM_QPAIRS was negotiated in VIRTCHNL_OP_GET_VF_RESOURCES 735691ad362SQi Zhang * then this op must be supported. 736691ad362SQi Zhang * 737691ad362SQi Zhang * VF sends this message in order to query the max RSS queue region 738691ad362SQi Zhang * size supported by PF, when VIRTCHNL_VF_LARGE_NUM_QPAIRS is enabled. 739691ad362SQi Zhang * This information should be used when configuring the RSS LUT and/or 740691ad362SQi Zhang * configuring queue region based filters. 741691ad362SQi Zhang * 742691ad362SQi Zhang * The maximum RSS queue region is 2^qregion_width. So, a qregion_width 743691ad362SQi Zhang * of 6 would inform the VF that the PF supports a maximum RSS queue region 744691ad362SQi Zhang * of 64. 745691ad362SQi Zhang * 746691ad362SQi Zhang * A queue region represents a range of queues that can be used to configure 747691ad362SQi Zhang * a RSS LUT. For example, if a VF is given 64 queues, but only a max queue 748691ad362SQi Zhang * region size of 16 (i.e. 2^qregion_width = 16) then it will only be able 749691ad362SQi Zhang * to configure the RSS LUT with queue indices from 0 to 15. However, other 750691ad362SQi Zhang * filters can be used to direct packets to queues >15 via specifying a queue 751691ad362SQi Zhang * base/offset and queue region width. 752691ad362SQi Zhang */ 753691ad362SQi Zhang struct virtchnl_max_rss_qregion { 754691ad362SQi Zhang u16 vport_id; 755691ad362SQi Zhang u16 qregion_width; 756691ad362SQi Zhang u8 pad[4]; 757691ad362SQi Zhang }; 758691ad362SQi Zhang 759691ad362SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_max_rss_qregion); 760691ad362SQi Zhang 76189214fe9SHaiyue Wang /* VIRTCHNL_OP_ADD_ETH_ADDR 76289214fe9SHaiyue Wang * VF sends this message in order to add one or more unicast or multicast 76389214fe9SHaiyue Wang * address filters for the specified VSI. 76489214fe9SHaiyue Wang * PF adds the filters and returns status. 76589214fe9SHaiyue Wang */ 76689214fe9SHaiyue Wang 76789214fe9SHaiyue Wang /* VIRTCHNL_OP_DEL_ETH_ADDR 76889214fe9SHaiyue Wang * VF sends this message in order to remove one or more unicast or multicast 76989214fe9SHaiyue Wang * filters for the specified VSI. 77089214fe9SHaiyue Wang * PF removes the filters and returns status. 77189214fe9SHaiyue Wang */ 77289214fe9SHaiyue Wang 77381759624SQi Zhang /* VIRTCHNL_ETHER_ADDR_LEGACY 77481759624SQi Zhang * Prior to adding the @type member to virtchnl_ether_addr, there were 2 pad 77581759624SQi Zhang * bytes. Moving forward all VF drivers should not set type to 77681759624SQi Zhang * VIRTCHNL_ETHER_ADDR_LEGACY. This is only here to not break previous/legacy 77781759624SQi Zhang * behavior. The control plane function (i.e. PF) can use a best effort method 77881759624SQi Zhang * of tracking the primary/device unicast in this case, but there is no 77981759624SQi Zhang * guarantee and functionality depends on the implementation of the PF. 78081759624SQi Zhang */ 78181759624SQi Zhang 78281759624SQi Zhang /* VIRTCHNL_ETHER_ADDR_PRIMARY 78381759624SQi Zhang * All VF drivers should set @type to VIRTCHNL_ETHER_ADDR_PRIMARY for the 78481759624SQi Zhang * primary/device unicast MAC address filter for VIRTCHNL_OP_ADD_ETH_ADDR and 78581759624SQi Zhang * VIRTCHNL_OP_DEL_ETH_ADDR. This allows for the underlying control plane 78681759624SQi Zhang * function (i.e. PF) to accurately track and use this MAC address for 78781759624SQi Zhang * displaying on the host and for VM/function reset. 78881759624SQi Zhang */ 78981759624SQi Zhang 79081759624SQi Zhang /* VIRTCHNL_ETHER_ADDR_EXTRA 79181759624SQi Zhang * All VF drivers should set @type to VIRTCHNL_ETHER_ADDR_EXTRA for any extra 79281759624SQi Zhang * unicast and/or multicast filters that are being added/deleted via 79381759624SQi Zhang * VIRTCHNL_OP_DEL_ETH_ADDR/VIRTCHNL_OP_ADD_ETH_ADDR respectively. 79481759624SQi Zhang */ 79589214fe9SHaiyue Wang struct virtchnl_ether_addr { 79689214fe9SHaiyue Wang u8 addr[VIRTCHNL_ETH_LENGTH_OF_ADDRESS]; 79781759624SQi Zhang u8 type; 79881759624SQi Zhang #define VIRTCHNL_ETHER_ADDR_LEGACY 0 79981759624SQi Zhang #define VIRTCHNL_ETHER_ADDR_PRIMARY 1 80081759624SQi Zhang #define VIRTCHNL_ETHER_ADDR_EXTRA 2 80181759624SQi Zhang #define VIRTCHNL_ETHER_ADDR_TYPE_MASK 3 /* first two bits of type are valid */ 80281759624SQi Zhang u8 pad; 80389214fe9SHaiyue Wang }; 80489214fe9SHaiyue Wang 80589214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_ether_addr); 80689214fe9SHaiyue Wang 80789214fe9SHaiyue Wang struct virtchnl_ether_addr_list { 80889214fe9SHaiyue Wang u16 vsi_id; 80989214fe9SHaiyue Wang u16 num_elements; 81089214fe9SHaiyue Wang struct virtchnl_ether_addr list[1]; 81189214fe9SHaiyue Wang }; 81289214fe9SHaiyue Wang 81389214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_ether_addr_list); 81489214fe9SHaiyue Wang 81589214fe9SHaiyue Wang /* VIRTCHNL_OP_ADD_VLAN 81689214fe9SHaiyue Wang * VF sends this message to add one or more VLAN tag filters for receives. 81789214fe9SHaiyue Wang * PF adds the filters and returns status. 81889214fe9SHaiyue Wang * If a port VLAN is configured by the PF, this operation will return an 81989214fe9SHaiyue Wang * error to the VF. 82089214fe9SHaiyue Wang */ 82189214fe9SHaiyue Wang 82289214fe9SHaiyue Wang /* VIRTCHNL_OP_DEL_VLAN 82389214fe9SHaiyue Wang * VF sends this message to remove one or more VLAN tag filters for receives. 82489214fe9SHaiyue Wang * PF removes the filters and returns status. 82589214fe9SHaiyue Wang * If a port VLAN is configured by the PF, this operation will return an 82689214fe9SHaiyue Wang * error to the VF. 82789214fe9SHaiyue Wang */ 82889214fe9SHaiyue Wang 82989214fe9SHaiyue Wang struct virtchnl_vlan_filter_list { 83089214fe9SHaiyue Wang u16 vsi_id; 83189214fe9SHaiyue Wang u16 num_elements; 83289214fe9SHaiyue Wang u16 vlan_id[1]; 83389214fe9SHaiyue Wang }; 83489214fe9SHaiyue Wang 83589214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(6, virtchnl_vlan_filter_list); 83689214fe9SHaiyue Wang 83786edb0bdSQi Zhang /* This enum is used for all of the VIRTCHNL_VF_OFFLOAD_VLAN_V2_CAPS related 83886edb0bdSQi Zhang * structures and opcodes. 83986edb0bdSQi Zhang * 84086edb0bdSQi Zhang * VIRTCHNL_VLAN_UNSUPPORTED - This field is not supported and if a VF driver 84186edb0bdSQi Zhang * populates it the PF should return VIRTCHNL_STATUS_ERR_NOT_SUPPORTED. 84286edb0bdSQi Zhang * 84386edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100 - This field supports 0x8100 ethertype. 84486edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_88A8 - This field supports 0x88A8 ethertype. 84586edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_9100 - This field supports 0x9100 ethertype. 84686edb0bdSQi Zhang * 84786edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_AND - Used when multiple ethertypes can be supported 84886edb0bdSQi Zhang * by the PF concurrently. For example, if the PF can support 84986edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100 AND VIRTCHNL_VLAN_ETHERTYPE_88A8 filters it 85086edb0bdSQi Zhang * would OR the following bits: 85186edb0bdSQi Zhang * 85286edb0bdSQi Zhang * VIRTHCNL_VLAN_ETHERTYPE_8100 | 85386edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_88A8 | 85486edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_AND; 85586edb0bdSQi Zhang * 85686edb0bdSQi Zhang * The VF would interpret this as VLAN filtering can be supported on both 0x8100 85786edb0bdSQi Zhang * and 0x88A8 VLAN ethertypes. 85886edb0bdSQi Zhang * 85986edb0bdSQi Zhang * VIRTCHNL_ETHERTYPE_XOR - Used when only a single ethertype can be supported 86086edb0bdSQi Zhang * by the PF concurrently. For example if the PF can support 86186edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100 XOR VIRTCHNL_VLAN_ETHERTYPE_88A8 stripping 86286edb0bdSQi Zhang * offload it would OR the following bits: 86386edb0bdSQi Zhang * 86486edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100 | 86586edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_88A8 | 86686edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_XOR; 86786edb0bdSQi Zhang * 86886edb0bdSQi Zhang * The VF would interpret this as VLAN stripping can be supported on either 86986edb0bdSQi Zhang * 0x8100 or 0x88a8 VLAN ethertypes. So when requesting VLAN stripping via 87086edb0bdSQi Zhang * VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2 the specified ethertype will override 87186edb0bdSQi Zhang * the previously set value. 87286edb0bdSQi Zhang * 87386edb0bdSQi Zhang * VIRTCHNL_VLAN_TAG_LOCATION_L2TAG1 - Used to tell the VF to insert and/or 87486edb0bdSQi Zhang * strip the VLAN tag using the L2TAG1 field of the Tx/Rx descriptors. 87586edb0bdSQi Zhang * 87686edb0bdSQi Zhang * VIRTCHNL_VLAN_TAG_LOCATION_L2TAG2 - Used to tell the VF to insert hardware 87786edb0bdSQi Zhang * offloaded VLAN tags using the L2TAG2 field of the Tx descriptor. 87886edb0bdSQi Zhang * 87986edb0bdSQi Zhang * VIRTCHNL_VLAN_TAG_LOCATION_L2TAG2 - Used to tell the VF to strip hardware 88086edb0bdSQi Zhang * offloaded VLAN tags using the L2TAG2_2 field of the Rx descriptor. 88186edb0bdSQi Zhang * 88286edb0bdSQi Zhang * VIRTCHNL_VLAN_PRIO - This field supports VLAN priority bits. This is used for 88386edb0bdSQi Zhang * VLAN filtering if the underlying PF supports it. 88486edb0bdSQi Zhang * 88586edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE_ALLOWED - This field is used to say whether a 88686edb0bdSQi Zhang * certain VLAN capability can be toggled. For example if the underlying PF/CP 88786edb0bdSQi Zhang * allows the VF to toggle VLAN filtering, stripping, and/or insertion it should 88886edb0bdSQi Zhang * set this bit along with the supported ethertypes. 88986edb0bdSQi Zhang */ 89086edb0bdSQi Zhang enum virtchnl_vlan_support { 89186edb0bdSQi Zhang VIRTCHNL_VLAN_UNSUPPORTED = 0, 89286edb0bdSQi Zhang VIRTCHNL_VLAN_ETHERTYPE_8100 = 0x00000001, 89386edb0bdSQi Zhang VIRTCHNL_VLAN_ETHERTYPE_88A8 = 0x00000002, 89486edb0bdSQi Zhang VIRTCHNL_VLAN_ETHERTYPE_9100 = 0x00000004, 89586edb0bdSQi Zhang VIRTCHNL_VLAN_TAG_LOCATION_L2TAG1 = 0x00000100, 89686edb0bdSQi Zhang VIRTCHNL_VLAN_TAG_LOCATION_L2TAG2 = 0x00000200, 89786edb0bdSQi Zhang VIRTCHNL_VLAN_TAG_LOCATION_L2TAG2_2 = 0x00000400, 89886edb0bdSQi Zhang VIRTCHNL_VLAN_PRIO = 0x01000000, 89986edb0bdSQi Zhang VIRTCHNL_VLAN_FILTER_MASK = 0x10000000, 90086edb0bdSQi Zhang VIRTCHNL_VLAN_ETHERTYPE_AND = 0x20000000, 90186edb0bdSQi Zhang VIRTCHNL_VLAN_ETHERTYPE_XOR = 0x40000000, 90286edb0bdSQi Zhang VIRTCHNL_VLAN_TOGGLE = 0x80000000 90386edb0bdSQi Zhang }; 90486edb0bdSQi Zhang 90586edb0bdSQi Zhang /* This structure is used as part of the VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS 90686edb0bdSQi Zhang * for filtering, insertion, and stripping capabilities. 90786edb0bdSQi Zhang * 90886edb0bdSQi Zhang * If only outer capabilities are supported (for filtering, insertion, and/or 90986edb0bdSQi Zhang * stripping) then this refers to the outer most or single VLAN from the VF's 91086edb0bdSQi Zhang * perspective. 91186edb0bdSQi Zhang * 91286edb0bdSQi Zhang * If only inner capabilities are supported (for filtering, insertion, and/or 91386edb0bdSQi Zhang * stripping) then this refers to the outer most or single VLAN from the VF's 91486edb0bdSQi Zhang * perspective. Functionally this is the same as if only outer capabilities are 91586edb0bdSQi Zhang * supported. The VF driver is just forced to use the inner fields when 91686edb0bdSQi Zhang * adding/deleting filters and enabling/disabling offloads (if supported). 91786edb0bdSQi Zhang * 91886edb0bdSQi Zhang * If both outer and inner capabilities are supported (for filtering, insertion, 91986edb0bdSQi Zhang * and/or stripping) then outer refers to the outer most or single VLAN and 92086edb0bdSQi Zhang * inner refers to the second VLAN, if it exists, in the packet. 92186edb0bdSQi Zhang * 92286edb0bdSQi Zhang * There is no support for tunneled VLAN offloads, so outer or inner are never 92386edb0bdSQi Zhang * referring to a tunneled packet from the VF's perspective. 92486edb0bdSQi Zhang */ 92586edb0bdSQi Zhang struct virtchnl_vlan_supported_caps { 92686edb0bdSQi Zhang u32 outer; 92786edb0bdSQi Zhang u32 inner; 92886edb0bdSQi Zhang }; 92986edb0bdSQi Zhang 93086edb0bdSQi Zhang /* The PF populates these fields based on the supported VLAN filtering. If a 93186edb0bdSQi Zhang * field is VIRTCHNL_VLAN_UNSUPPORTED then it's not supported and the PF will 93286edb0bdSQi Zhang * reject any VIRTCHNL_OP_ADD_VLAN_V2 or VIRTCHNL_OP_DEL_VLAN_V2 messages using 93386edb0bdSQi Zhang * the unsupported fields. 93486edb0bdSQi Zhang * 93586edb0bdSQi Zhang * Also, a VF is only allowed to toggle its VLAN filtering setting if the 93686edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE bit is set. 93786edb0bdSQi Zhang * 93886edb0bdSQi Zhang * The ethertype(s) specified in the ethertype_init field are the ethertypes 93986edb0bdSQi Zhang * enabled for VLAN filtering. VLAN filtering in this case refers to the outer 94086edb0bdSQi Zhang * most VLAN from the VF's perspective. If both inner and outer filtering are 94186edb0bdSQi Zhang * allowed then ethertype_init only refers to the outer most VLAN as only 94286edb0bdSQi Zhang * VLAN ethertype supported for inner VLAN filtering is 94386edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100. By default, inner VLAN filtering is disabled 94486edb0bdSQi Zhang * when both inner and outer filtering are allowed. 94586edb0bdSQi Zhang * 94686edb0bdSQi Zhang * The max_filters field tells the VF how many VLAN filters it's allowed to have 94786edb0bdSQi Zhang * at any one time. If it exceeds this amount and tries to add another filter, 94886edb0bdSQi Zhang * then the request will be rejected by the PF. To prevent failures, the VF 94986edb0bdSQi Zhang * should keep track of how many VLAN filters it has added and not attempt to 95086edb0bdSQi Zhang * add more than max_filters. 95186edb0bdSQi Zhang */ 95286edb0bdSQi Zhang struct virtchnl_vlan_filtering_caps { 95386edb0bdSQi Zhang struct virtchnl_vlan_supported_caps filtering_support; 95486edb0bdSQi Zhang u32 ethertype_init; 95586edb0bdSQi Zhang u16 max_filters; 95686edb0bdSQi Zhang u8 pad[2]; 95786edb0bdSQi Zhang }; 95886edb0bdSQi Zhang 95986edb0bdSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_vlan_filtering_caps); 96086edb0bdSQi Zhang 96186edb0bdSQi Zhang /* This enum is used for the virtchnl_vlan_offload_caps structure to specify 96286edb0bdSQi Zhang * if the PF supports a different ethertype for stripping and insertion. 96386edb0bdSQi Zhang * 96486edb0bdSQi Zhang * VIRTCHNL_ETHERTYPE_STRIPPING_MATCHES_INSERTION - The ethertype(s) specified 96586edb0bdSQi Zhang * for stripping affect the ethertype(s) specified for insertion and visa versa 96686edb0bdSQi Zhang * as well. If the VF tries to configure VLAN stripping via 96786edb0bdSQi Zhang * VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2 with VIRTCHNL_VLAN_ETHERTYPE_8100 then 96886edb0bdSQi Zhang * that will be the ethertype for both stripping and insertion. 96986edb0bdSQi Zhang * 97086edb0bdSQi Zhang * VIRTCHNL_ETHERTYPE_MATCH_NOT_REQUIRED - The ethertype(s) specified for 97186edb0bdSQi Zhang * stripping do not affect the ethertype(s) specified for insertion and visa 97286edb0bdSQi Zhang * versa. 97386edb0bdSQi Zhang */ 97486edb0bdSQi Zhang enum virtchnl_vlan_ethertype_match { 97586edb0bdSQi Zhang VIRTCHNL_ETHERTYPE_STRIPPING_MATCHES_INSERTION = 0, 97686edb0bdSQi Zhang VIRTCHNL_ETHERTYPE_MATCH_NOT_REQUIRED = 1, 97786edb0bdSQi Zhang }; 97886edb0bdSQi Zhang 97986edb0bdSQi Zhang /* The PF populates these fields based on the supported VLAN offloads. If a 98086edb0bdSQi Zhang * field is VIRTCHNL_VLAN_UNSUPPORTED then it's not supported and the PF will 98186edb0bdSQi Zhang * reject any VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2 or 98286edb0bdSQi Zhang * VIRTCHNL_OP_DISABLE_VLAN_STRIPPING_V2 messages using the unsupported fields. 98386edb0bdSQi Zhang * 98486edb0bdSQi Zhang * Also, a VF is only allowed to toggle its VLAN offload setting if the 98586edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE_ALLOWED bit is set. 98686edb0bdSQi Zhang * 98786edb0bdSQi Zhang * The VF driver needs to be aware of how the tags are stripped by hardware and 98886edb0bdSQi Zhang * inserted by the VF driver based on the level of offload support. The PF will 98986edb0bdSQi Zhang * populate these fields based on where the VLAN tags are expected to be 99086edb0bdSQi Zhang * offloaded via the VIRTHCNL_VLAN_TAG_LOCATION_* bits. The VF will need to 99186edb0bdSQi Zhang * interpret these fields. See the definition of the 99286edb0bdSQi Zhang * VIRTCHNL_VLAN_TAG_LOCATION_* bits above the virtchnl_vlan_support 99386edb0bdSQi Zhang * enumeration. 99486edb0bdSQi Zhang */ 99586edb0bdSQi Zhang struct virtchnl_vlan_offload_caps { 99686edb0bdSQi Zhang struct virtchnl_vlan_supported_caps stripping_support; 99786edb0bdSQi Zhang struct virtchnl_vlan_supported_caps insertion_support; 99886edb0bdSQi Zhang u32 ethertype_init; 99986edb0bdSQi Zhang u8 ethertype_match; 100086edb0bdSQi Zhang u8 pad[3]; 100186edb0bdSQi Zhang }; 100286edb0bdSQi Zhang 100386edb0bdSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_vlan_offload_caps); 100486edb0bdSQi Zhang 100586edb0bdSQi Zhang /* VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS 100686edb0bdSQi Zhang * VF sends this message to determine its VLAN capabilities. 100786edb0bdSQi Zhang * 100886edb0bdSQi Zhang * PF will mark which capabilities it supports based on hardware support and 100986edb0bdSQi Zhang * current configuration. For example, if a port VLAN is configured the PF will 101086edb0bdSQi Zhang * not allow outer VLAN filtering, stripping, or insertion to be configured so 101186edb0bdSQi Zhang * it will block these features from the VF. 101286edb0bdSQi Zhang * 101386edb0bdSQi Zhang * The VF will need to cross reference its capabilities with the PFs 101486edb0bdSQi Zhang * capabilities in the response message from the PF to determine the VLAN 101586edb0bdSQi Zhang * support. 101686edb0bdSQi Zhang */ 101786edb0bdSQi Zhang struct virtchnl_vlan_caps { 101886edb0bdSQi Zhang struct virtchnl_vlan_filtering_caps filtering; 101986edb0bdSQi Zhang struct virtchnl_vlan_offload_caps offloads; 102086edb0bdSQi Zhang }; 102186edb0bdSQi Zhang 102286edb0bdSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(40, virtchnl_vlan_caps); 102386edb0bdSQi Zhang 102486edb0bdSQi Zhang struct virtchnl_vlan { 102586edb0bdSQi Zhang u16 tci; /* tci[15:13] = PCP and tci[11:0] = VID */ 102686edb0bdSQi Zhang u16 tci_mask; /* only valid if VIRTCHNL_VLAN_FILTER_MASK set in 102786edb0bdSQi Zhang * filtering caps 102886edb0bdSQi Zhang */ 102986edb0bdSQi Zhang u16 tpid; /* 0x8100, 0x88a8, etc. and only type(s) set in 103086edb0bdSQi Zhang * filtering caps. Note that tpid here does not refer to 103186edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_*, but it refers to the 103286edb0bdSQi Zhang * actual 2-byte VLAN TPID 103386edb0bdSQi Zhang */ 103486edb0bdSQi Zhang u8 pad[2]; 103586edb0bdSQi Zhang }; 103686edb0bdSQi Zhang 103786edb0bdSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_vlan); 103886edb0bdSQi Zhang 103986edb0bdSQi Zhang struct virtchnl_vlan_filter { 104086edb0bdSQi Zhang struct virtchnl_vlan inner; 104186edb0bdSQi Zhang struct virtchnl_vlan outer; 104286edb0bdSQi Zhang u8 pad[16]; 104386edb0bdSQi Zhang }; 104486edb0bdSQi Zhang 104586edb0bdSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(32, virtchnl_vlan_filter); 104686edb0bdSQi Zhang 104786edb0bdSQi Zhang /* VIRTCHNL_OP_ADD_VLAN_V2 104886edb0bdSQi Zhang * VIRTCHNL_OP_DEL_VLAN_V2 104986edb0bdSQi Zhang * 105086edb0bdSQi Zhang * VF sends these messages to add/del one or more VLAN tag filters for Rx 105186edb0bdSQi Zhang * traffic. 105286edb0bdSQi Zhang * 105386edb0bdSQi Zhang * The PF attempts to add the filters and returns status. 105486edb0bdSQi Zhang * 105586edb0bdSQi Zhang * The VF should only ever attempt to add/del virtchnl_vlan_filter(s) using the 105686edb0bdSQi Zhang * supported fields negotiated via VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS. 105786edb0bdSQi Zhang */ 105886edb0bdSQi Zhang struct virtchnl_vlan_filter_list_v2 { 105986edb0bdSQi Zhang u16 vport_id; 106086edb0bdSQi Zhang u16 num_elements; 106186edb0bdSQi Zhang u8 pad[4]; 106286edb0bdSQi Zhang struct virtchnl_vlan_filter filters[1]; 106386edb0bdSQi Zhang }; 106486edb0bdSQi Zhang 106586edb0bdSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(40, virtchnl_vlan_filter_list_v2); 106686edb0bdSQi Zhang 106786edb0bdSQi Zhang /* VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2 106886edb0bdSQi Zhang * VIRTCHNL_OP_DISABLE_VLAN_STRIPPING_V2 106986edb0bdSQi Zhang * VIRTCHNL_OP_ENABLE_VLAN_INSERTION_V2 107086edb0bdSQi Zhang * VIRTCHNL_OP_DISABLE_VLAN_INSERTION_V2 107186edb0bdSQi Zhang * 107286edb0bdSQi Zhang * VF sends this message to enable or disable VLAN stripping or insertion. It 107386edb0bdSQi Zhang * also needs to specify an ethertype. The VF knows which VLAN ethertypes are 107486edb0bdSQi Zhang * allowed and whether or not it's allowed to enable/disable the specific 107586edb0bdSQi Zhang * offload via the VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS message. The VF needs to 107686edb0bdSQi Zhang * parse the virtchnl_vlan_caps.offloads fields to determine which offload 107786edb0bdSQi Zhang * messages are allowed. 107886edb0bdSQi Zhang * 107986edb0bdSQi Zhang * For example, if the PF populates the virtchnl_vlan_caps.offloads in the 108086edb0bdSQi Zhang * following manner the VF will be allowed to enable and/or disable 0x8100 inner 108186edb0bdSQi Zhang * VLAN insertion and/or stripping via the opcodes listed above. Inner in this 108286edb0bdSQi Zhang * case means the outer most or single VLAN from the VF's perspective. This is 108386edb0bdSQi Zhang * because no outer offloads are supported. See the comments above the 108486edb0bdSQi Zhang * virtchnl_vlan_supported_caps structure for more details. 108586edb0bdSQi Zhang * 108686edb0bdSQi Zhang * virtchnl_vlan_caps.offloads.stripping_support.inner = 108786edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE | 108886edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100; 108986edb0bdSQi Zhang * 109086edb0bdSQi Zhang * virtchnl_vlan_caps.offloads.insertion_support.inner = 109186edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE | 109286edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100; 109386edb0bdSQi Zhang * 109486edb0bdSQi Zhang * In order to enable inner (again note that in this case inner is the outer 109586edb0bdSQi Zhang * most or single VLAN from the VF's perspective) VLAN stripping for 0x8100 10966247f281SHaiyue Wang * VLANs, the VF would populate the virtchnl_vlan_setting structure in the 109786edb0bdSQi Zhang * following manner and send the VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2 message. 109886edb0bdSQi Zhang * 10996247f281SHaiyue Wang * virtchnl_vlan_setting.inner_ethertype_setting = 110086edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100; 110186edb0bdSQi Zhang * 11026247f281SHaiyue Wang * virtchnl_vlan_setting.vport_id = vport_id or vsi_id assigned to the VF on 110386edb0bdSQi Zhang * initialization. 110486edb0bdSQi Zhang * 110586edb0bdSQi Zhang * The reason that VLAN TPID(s) are not being used for the 110686edb0bdSQi Zhang * outer_ethertype_setting and inner_ethertype_setting fields is because it's 110786edb0bdSQi Zhang * possible a device could support VLAN insertion and/or stripping offload on 110886edb0bdSQi Zhang * multiple ethertypes concurrently, so this method allows a VF to request 110986edb0bdSQi Zhang * multiple ethertypes in one message using the virtchnl_vlan_support 111086edb0bdSQi Zhang * enumeration. 111186edb0bdSQi Zhang * 111286edb0bdSQi Zhang * For example, if the PF populates the virtchnl_vlan_caps.offloads in the 111386edb0bdSQi Zhang * following manner the VF will be allowed to enable 0x8100 and 0x88a8 outer 111486edb0bdSQi Zhang * VLAN insertion and stripping simultaneously. The 111586edb0bdSQi Zhang * virtchnl_vlan_caps.offloads.ethertype_match field will also have to be 111686edb0bdSQi Zhang * populated based on what the PF can support. 111786edb0bdSQi Zhang * 111886edb0bdSQi Zhang * virtchnl_vlan_caps.offloads.stripping_support.outer = 111986edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE | 112086edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100 | 112186edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_88A8 | 112286edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_AND; 112386edb0bdSQi Zhang * 112486edb0bdSQi Zhang * virtchnl_vlan_caps.offloads.insertion_support.outer = 112586edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE | 112686edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100 | 112786edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_88A8 | 112886edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_AND; 112986edb0bdSQi Zhang * 113086edb0bdSQi Zhang * In order to enable outer VLAN stripping for 0x8100 and 0x88a8 VLANs, the VF 113186edb0bdSQi Zhang * would populate the virthcnl_vlan_offload_structure in the following manner 113286edb0bdSQi Zhang * and send the VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2 message. 113386edb0bdSQi Zhang * 11346247f281SHaiyue Wang * virtchnl_vlan_setting.outer_ethertype_setting = 113586edb0bdSQi Zhang * VIRTHCNL_VLAN_ETHERTYPE_8100 | 113686edb0bdSQi Zhang * VIRTHCNL_VLAN_ETHERTYPE_88A8; 113786edb0bdSQi Zhang * 11386247f281SHaiyue Wang * virtchnl_vlan_setting.vport_id = vport_id or vsi_id assigned to the VF on 113986edb0bdSQi Zhang * initialization. 114086edb0bdSQi Zhang * 114186edb0bdSQi Zhang * There is also the case where a PF and the underlying hardware can support 114286edb0bdSQi Zhang * VLAN offloads on multiple ethertypes, but not concurrently. For example, if 114386edb0bdSQi Zhang * the PF populates the virtchnl_vlan_caps.offloads in the following manner the 114486edb0bdSQi Zhang * VF will be allowed to enable and/or disable 0x8100 XOR 0x88a8 outer VLAN 114586edb0bdSQi Zhang * offloads. The ethertypes must match for stripping and insertion. 114686edb0bdSQi Zhang * 114786edb0bdSQi Zhang * virtchnl_vlan_caps.offloads.stripping_support.outer = 114886edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE | 114986edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100 | 115086edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_88A8 | 115186edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_XOR; 115286edb0bdSQi Zhang * 115386edb0bdSQi Zhang * virtchnl_vlan_caps.offloads.insertion_support.outer = 115486edb0bdSQi Zhang * VIRTCHNL_VLAN_TOGGLE | 115586edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_8100 | 115686edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_88A8 | 115786edb0bdSQi Zhang * VIRTCHNL_VLAN_ETHERTYPE_XOR; 115886edb0bdSQi Zhang * 115986edb0bdSQi Zhang * virtchnl_vlan_caps.offloads.ethertype_match = 116086edb0bdSQi Zhang * VIRTCHNL_ETHERTYPE_STRIPPING_MATCHES_INSERTION; 116186edb0bdSQi Zhang * 116286edb0bdSQi Zhang * In order to enable outer VLAN stripping for 0x88a8 VLANs, the VF would 11636247f281SHaiyue Wang * populate the virtchnl_vlan_setting structure in the following manner and send 116486edb0bdSQi Zhang * the VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2. Also, this will change the 116586edb0bdSQi Zhang * ethertype for VLAN insertion if it's enabled. So, for completeness, a 116686edb0bdSQi Zhang * VIRTCHNL_OP_ENABLE_VLAN_INSERTION_V2 with the same ethertype should be sent. 116786edb0bdSQi Zhang * 11686247f281SHaiyue Wang * virtchnl_vlan_setting.outer_ethertype_setting = VIRTHCNL_VLAN_ETHERTYPE_88A8; 116986edb0bdSQi Zhang * 11706247f281SHaiyue Wang * virtchnl_vlan_setting.vport_id = vport_id or vsi_id assigned to the VF on 117186edb0bdSQi Zhang * initialization. 11726247f281SHaiyue Wang * 11736247f281SHaiyue Wang * VIRTCHNL_OP_ENABLE_VLAN_FILTERING_V2 11746247f281SHaiyue Wang * VIRTCHNL_OP_DISABLE_VLAN_FILTERING_V2 11756247f281SHaiyue Wang * 11766247f281SHaiyue Wang * VF sends this message to enable or disable VLAN filtering. It also needs to 11776247f281SHaiyue Wang * specify an ethertype. The VF knows which VLAN ethertypes are allowed and 11786247f281SHaiyue Wang * whether or not it's allowed to enable/disable filtering via the 11796247f281SHaiyue Wang * VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS message. The VF needs to 11806247f281SHaiyue Wang * parse the virtchnl_vlan_caps.filtering fields to determine which, if any, 11816247f281SHaiyue Wang * filtering messages are allowed. 11826247f281SHaiyue Wang * 11836247f281SHaiyue Wang * For example, if the PF populates the virtchnl_vlan_caps.filtering in the 11846247f281SHaiyue Wang * following manner the VF will be allowed to enable/disable 0x8100 and 0x88a8 11856247f281SHaiyue Wang * outer VLAN filtering together. Note, that the VIRTCHNL_VLAN_ETHERTYPE_AND 11866247f281SHaiyue Wang * means that all filtering ethertypes will to be enabled and disabled together 11876247f281SHaiyue Wang * regardless of the request from the VF. This means that the underlying 11886247f281SHaiyue Wang * hardware only supports VLAN filtering for all VLAN the specified ethertypes 11896247f281SHaiyue Wang * or none of them. 11906247f281SHaiyue Wang * 11916247f281SHaiyue Wang * virtchnl_vlan_caps.filtering.filtering_support.outer = 11926247f281SHaiyue Wang * VIRTCHNL_VLAN_TOGGLE | 11936247f281SHaiyue Wang * VIRTCHNL_VLAN_ETHERTYPE_8100 | 11946247f281SHaiyue Wang * VIRTHCNL_VLAN_ETHERTYPE_88A8 | 11956247f281SHaiyue Wang * VIRTCHNL_VLAN_ETHERTYPE_9100 | 11966247f281SHaiyue Wang * VIRTCHNL_VLAN_ETHERTYPE_AND; 11976247f281SHaiyue Wang * 11986247f281SHaiyue Wang * In order to enable outer VLAN filtering for 0x88a8 and 0x8100 VLANs (0x9100 11996247f281SHaiyue Wang * VLANs aren't supported by the VF driver), the VF would populate the 12006247f281SHaiyue Wang * virtchnl_vlan_setting structure in the following manner and send the 12016247f281SHaiyue Wang * VIRTCHNL_OP_ENABLE_VLAN_FILTERING_V2. The same message format would be used 12026247f281SHaiyue Wang * to disable outer VLAN filtering for 0x88a8 and 0x8100 VLANs, but the 12036247f281SHaiyue Wang * VIRTCHNL_OP_DISABLE_VLAN_FILTERING_V2 opcode is used. 12046247f281SHaiyue Wang * 12056247f281SHaiyue Wang * virtchnl_vlan_setting.outer_ethertype_setting = 12066247f281SHaiyue Wang * VIRTCHNL_VLAN_ETHERTYPE_8100 | 12076247f281SHaiyue Wang * VIRTCHNL_VLAN_ETHERTYPE_88A8; 12086247f281SHaiyue Wang * 120986edb0bdSQi Zhang */ 12106247f281SHaiyue Wang struct virtchnl_vlan_setting { 121186edb0bdSQi Zhang u32 outer_ethertype_setting; 121286edb0bdSQi Zhang u32 inner_ethertype_setting; 121386edb0bdSQi Zhang u16 vport_id; 121486edb0bdSQi Zhang u8 pad[6]; 121586edb0bdSQi Zhang }; 121686edb0bdSQi Zhang 12176247f281SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_vlan_setting); 121886edb0bdSQi Zhang 121989214fe9SHaiyue Wang /* VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE 122089214fe9SHaiyue Wang * VF sends VSI id and flags. 122189214fe9SHaiyue Wang * PF returns status code in retval. 122289214fe9SHaiyue Wang * Note: we assume that broadcast accept mode is always enabled. 122389214fe9SHaiyue Wang */ 122489214fe9SHaiyue Wang struct virtchnl_promisc_info { 122589214fe9SHaiyue Wang u16 vsi_id; 122689214fe9SHaiyue Wang u16 flags; 122789214fe9SHaiyue Wang }; 122889214fe9SHaiyue Wang 122989214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(4, virtchnl_promisc_info); 123089214fe9SHaiyue Wang 123189214fe9SHaiyue Wang #define FLAG_VF_UNICAST_PROMISC 0x00000001 123289214fe9SHaiyue Wang #define FLAG_VF_MULTICAST_PROMISC 0x00000002 123389214fe9SHaiyue Wang 123489214fe9SHaiyue Wang /* VIRTCHNL_OP_GET_STATS 123589214fe9SHaiyue Wang * VF sends this message to request stats for the selected VSI. VF uses 123689214fe9SHaiyue Wang * the virtchnl_queue_select struct to specify the VSI. The queue_id 123789214fe9SHaiyue Wang * field is ignored by the PF. 123889214fe9SHaiyue Wang * 123989214fe9SHaiyue Wang * PF replies with struct virtchnl_eth_stats in an external buffer. 124089214fe9SHaiyue Wang */ 124189214fe9SHaiyue Wang 124289214fe9SHaiyue Wang struct virtchnl_eth_stats { 124389214fe9SHaiyue Wang u64 rx_bytes; /* received bytes */ 124489214fe9SHaiyue Wang u64 rx_unicast; /* received unicast pkts */ 124589214fe9SHaiyue Wang u64 rx_multicast; /* received multicast pkts */ 124689214fe9SHaiyue Wang u64 rx_broadcast; /* received broadcast pkts */ 124789214fe9SHaiyue Wang u64 rx_discards; 124889214fe9SHaiyue Wang u64 rx_unknown_protocol; 124989214fe9SHaiyue Wang u64 tx_bytes; /* transmitted bytes */ 125089214fe9SHaiyue Wang u64 tx_unicast; /* transmitted unicast pkts */ 125189214fe9SHaiyue Wang u64 tx_multicast; /* transmitted multicast pkts */ 125289214fe9SHaiyue Wang u64 tx_broadcast; /* transmitted broadcast pkts */ 125389214fe9SHaiyue Wang u64 tx_discards; 125489214fe9SHaiyue Wang u64 tx_errors; 125589214fe9SHaiyue Wang }; 125689214fe9SHaiyue Wang 125789214fe9SHaiyue Wang /* VIRTCHNL_OP_CONFIG_RSS_KEY 125889214fe9SHaiyue Wang * VIRTCHNL_OP_CONFIG_RSS_LUT 125989214fe9SHaiyue Wang * VF sends these messages to configure RSS. Only supported if both PF 126089214fe9SHaiyue Wang * and VF drivers set the VIRTCHNL_VF_OFFLOAD_RSS_PF bit during 126189214fe9SHaiyue Wang * configuration negotiation. If this is the case, then the RSS fields in 126289214fe9SHaiyue Wang * the VF resource struct are valid. 126389214fe9SHaiyue Wang * Both the key and LUT are initialized to 0 by the PF, meaning that 126489214fe9SHaiyue Wang * RSS is effectively disabled until set up by the VF. 126589214fe9SHaiyue Wang */ 126689214fe9SHaiyue Wang struct virtchnl_rss_key { 126789214fe9SHaiyue Wang u16 vsi_id; 126889214fe9SHaiyue Wang u16 key_len; 126989214fe9SHaiyue Wang u8 key[1]; /* RSS hash key, packed bytes */ 127089214fe9SHaiyue Wang }; 127189214fe9SHaiyue Wang 127289214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(6, virtchnl_rss_key); 127389214fe9SHaiyue Wang 127489214fe9SHaiyue Wang struct virtchnl_rss_lut { 127589214fe9SHaiyue Wang u16 vsi_id; 127689214fe9SHaiyue Wang u16 lut_entries; 127789214fe9SHaiyue Wang u8 lut[1]; /* RSS lookup table */ 127889214fe9SHaiyue Wang }; 127989214fe9SHaiyue Wang 128089214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(6, virtchnl_rss_lut); 128189214fe9SHaiyue Wang 128289214fe9SHaiyue Wang /* VIRTCHNL_OP_GET_RSS_HENA_CAPS 128389214fe9SHaiyue Wang * VIRTCHNL_OP_SET_RSS_HENA 128489214fe9SHaiyue Wang * VF sends these messages to get and set the hash filter enable bits for RSS. 128589214fe9SHaiyue Wang * By default, the PF sets these to all possible traffic types that the 128689214fe9SHaiyue Wang * hardware supports. The VF can query this value if it wants to change the 128789214fe9SHaiyue Wang * traffic types that are hashed by the hardware. 128889214fe9SHaiyue Wang */ 128989214fe9SHaiyue Wang struct virtchnl_rss_hena { 129089214fe9SHaiyue Wang u64 hena; 129189214fe9SHaiyue Wang }; 129289214fe9SHaiyue Wang 129389214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_rss_hena); 129489214fe9SHaiyue Wang 129557094d59SQi Zhang /* Type of RSS algorithm */ 129657094d59SQi Zhang enum virtchnl_rss_algorithm { 129757094d59SQi Zhang VIRTCHNL_RSS_ALG_TOEPLITZ_ASYMMETRIC = 0, 129856e15e83SJeff Guo VIRTCHNL_RSS_ALG_XOR_ASYMMETRIC = 1, 129957094d59SQi Zhang VIRTCHNL_RSS_ALG_TOEPLITZ_SYMMETRIC = 2, 130057094d59SQi Zhang VIRTCHNL_RSS_ALG_XOR_SYMMETRIC = 3, 130157094d59SQi Zhang }; 130257094d59SQi Zhang 130389214fe9SHaiyue Wang /* This is used by PF driver to enforce how many channels can be supported. 130489214fe9SHaiyue Wang * When ADQ_V2 capability is negotiated, it will allow 16 channels otherwise 130589214fe9SHaiyue Wang * PF driver will allow only max 4 channels 130689214fe9SHaiyue Wang */ 130789214fe9SHaiyue Wang #define VIRTCHNL_MAX_ADQ_CHANNELS 4 130889214fe9SHaiyue Wang #define VIRTCHNL_MAX_ADQ_V2_CHANNELS 16 13090016b690SSudheer Mogilappagari /* This is used by PF driver to enforce max supported channels */ 13100016b690SSudheer Mogilappagari #define VIRTCHNL_MAX_QGRPS 16 131189214fe9SHaiyue Wang 1312*2381def4SAhmed Zaki /* VIRTCHNL_OP_CONFIG_RSS_HFUNC 1313*2381def4SAhmed Zaki * VF sends this message to configure the RSS hash function. Only supported 1314*2381def4SAhmed Zaki * if both PF and VF drivers set the VIRTCHNL_VF_OFFLOAD_RSS_PF bit during 1315*2381def4SAhmed Zaki * configuration negotiation. 1316*2381def4SAhmed Zaki * The hash function is initialized to VIRTCHNL_RSS_ALG_TOEPLITZ_ASYMMETRIC 1317*2381def4SAhmed Zaki * by the PF. 1318*2381def4SAhmed Zaki */ 1319*2381def4SAhmed Zaki struct virtchnl_rss_hfunc { 1320*2381def4SAhmed Zaki u16 vsi_id; 1321*2381def4SAhmed Zaki u16 rss_algorithm; /* enum virtchnl_rss_algorithm */ 1322*2381def4SAhmed Zaki u32 reserved; 1323*2381def4SAhmed Zaki }; 1324*2381def4SAhmed Zaki 1325*2381def4SAhmed Zaki VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_rss_hfunc); 1326*2381def4SAhmed Zaki 132789214fe9SHaiyue Wang /* VIRTCHNL_OP_ENABLE_CHANNELS 132889214fe9SHaiyue Wang * VIRTCHNL_OP_DISABLE_CHANNELS 132989214fe9SHaiyue Wang * VF sends these messages to enable or disable channels based on 133089214fe9SHaiyue Wang * the user specified queue count and queue offset for each traffic class. 133189214fe9SHaiyue Wang * This struct encompasses all the information that the PF needs from 133289214fe9SHaiyue Wang * VF to create a channel. 133389214fe9SHaiyue Wang */ 133489214fe9SHaiyue Wang struct virtchnl_channel_info { 133589214fe9SHaiyue Wang u16 count; /* number of queues in a channel */ 133689214fe9SHaiyue Wang u16 offset; /* queues in a channel start from 'offset' */ 133789214fe9SHaiyue Wang u32 pad; 133889214fe9SHaiyue Wang u64 max_tx_rate; 133989214fe9SHaiyue Wang }; 134089214fe9SHaiyue Wang 134189214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_channel_info); 134289214fe9SHaiyue Wang 134389214fe9SHaiyue Wang struct virtchnl_tc_info { 134489214fe9SHaiyue Wang u32 num_tc; 134589214fe9SHaiyue Wang u32 pad; 134689214fe9SHaiyue Wang struct virtchnl_channel_info list[1]; 134789214fe9SHaiyue Wang }; 134889214fe9SHaiyue Wang 134989214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_tc_info); 135089214fe9SHaiyue Wang 135189214fe9SHaiyue Wang /* VIRTCHNL_ADD_CLOUD_FILTER 135289214fe9SHaiyue Wang * VIRTCHNL_DEL_CLOUD_FILTER 135389214fe9SHaiyue Wang * VF sends these messages to add or delete a cloud filter based on the 135489214fe9SHaiyue Wang * user specified match and action filters. These structures encompass 135589214fe9SHaiyue Wang * all the information that the PF needs from the VF to add/delete a 135689214fe9SHaiyue Wang * cloud filter. 135789214fe9SHaiyue Wang */ 135889214fe9SHaiyue Wang 135989214fe9SHaiyue Wang struct virtchnl_l4_spec { 13609c43dd22SQi Zhang u8 src_mac[VIRTCHNL_ETH_LENGTH_OF_ADDRESS]; 13619c43dd22SQi Zhang u8 dst_mac[VIRTCHNL_ETH_LENGTH_OF_ADDRESS]; 136289214fe9SHaiyue Wang /* vlan_prio is part of this 16 bit field even from OS perspective 136389214fe9SHaiyue Wang * vlan_id:12 is actual vlan_id, then vlanid:bit14..12 is vlan_prio 136489214fe9SHaiyue Wang * in future, when decided to offload vlan_prio, pass that information 136589214fe9SHaiyue Wang * as part of the "vlan_id" field, Bit14..12 136689214fe9SHaiyue Wang */ 136789214fe9SHaiyue Wang __be16 vlan_id; 136889214fe9SHaiyue Wang __be16 pad; /* reserved for future use */ 136989214fe9SHaiyue Wang __be32 src_ip[4]; 137089214fe9SHaiyue Wang __be32 dst_ip[4]; 137189214fe9SHaiyue Wang __be16 src_port; 137289214fe9SHaiyue Wang __be16 dst_port; 137389214fe9SHaiyue Wang }; 137489214fe9SHaiyue Wang 137589214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(52, virtchnl_l4_spec); 137689214fe9SHaiyue Wang 137789214fe9SHaiyue Wang union virtchnl_flow_spec { 137889214fe9SHaiyue Wang struct virtchnl_l4_spec tcp_spec; 137989214fe9SHaiyue Wang u8 buffer[128]; /* reserved for future use */ 138089214fe9SHaiyue Wang }; 138189214fe9SHaiyue Wang 138289214fe9SHaiyue Wang VIRTCHNL_CHECK_UNION_LEN(128, virtchnl_flow_spec); 138389214fe9SHaiyue Wang 138489214fe9SHaiyue Wang enum virtchnl_action { 138589214fe9SHaiyue Wang /* action types */ 138689214fe9SHaiyue Wang VIRTCHNL_ACTION_DROP = 0, 138789214fe9SHaiyue Wang VIRTCHNL_ACTION_TC_REDIRECT, 138802ec7cf6SQi Zhang VIRTCHNL_ACTION_PASSTHRU, 138902ec7cf6SQi Zhang VIRTCHNL_ACTION_QUEUE, 139002ec7cf6SQi Zhang VIRTCHNL_ACTION_Q_REGION, 139102ec7cf6SQi Zhang VIRTCHNL_ACTION_MARK, 139202ec7cf6SQi Zhang VIRTCHNL_ACTION_COUNT, 139389214fe9SHaiyue Wang }; 139489214fe9SHaiyue Wang 139589214fe9SHaiyue Wang enum virtchnl_flow_type { 139689214fe9SHaiyue Wang /* flow types */ 139789214fe9SHaiyue Wang VIRTCHNL_TCP_V4_FLOW = 0, 139889214fe9SHaiyue Wang VIRTCHNL_TCP_V6_FLOW, 139989214fe9SHaiyue Wang VIRTCHNL_UDP_V4_FLOW, 140089214fe9SHaiyue Wang VIRTCHNL_UDP_V6_FLOW, 140189214fe9SHaiyue Wang }; 140289214fe9SHaiyue Wang 140389214fe9SHaiyue Wang struct virtchnl_filter { 140489214fe9SHaiyue Wang union virtchnl_flow_spec data; 140589214fe9SHaiyue Wang union virtchnl_flow_spec mask; 1406e53176efSQi Zhang 1407e53176efSQi Zhang /* see enum virtchnl_flow_type */ 1408e53176efSQi Zhang s32 flow_type; 1409e53176efSQi Zhang 1410e53176efSQi Zhang /* see enum virtchnl_action */ 1411e53176efSQi Zhang s32 action; 141289214fe9SHaiyue Wang u32 action_meta; 141389214fe9SHaiyue Wang u8 field_flags; 141489214fe9SHaiyue Wang }; 141589214fe9SHaiyue Wang 141689214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(272, virtchnl_filter); 141789214fe9SHaiyue Wang 14186b62423fSTing Xu struct virtchnl_shaper_bw { 14196b62423fSTing Xu /* Unit is Kbps */ 14206b62423fSTing Xu u32 committed; 14216b62423fSTing Xu u32 peak; 14226b62423fSTing Xu }; 14236b62423fSTing Xu 14246b62423fSTing Xu VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_shaper_bw); 14256b62423fSTing Xu 1426109e2abbSQi Zhang /* VIRTCHNL_OP_DCF_GET_VSI_MAP 1427109e2abbSQi Zhang * VF sends this message to get VSI mapping table. 1428109e2abbSQi Zhang * PF responds with an indirect message containing VF's 1429109e2abbSQi Zhang * HW VSI IDs. 1430109e2abbSQi Zhang * The index of vf_vsi array is the logical VF ID, the 1431109e2abbSQi Zhang * value of vf_vsi array is the VF's HW VSI ID with its 1432109e2abbSQi Zhang * valid configuration. 1433109e2abbSQi Zhang */ 1434109e2abbSQi Zhang struct virtchnl_dcf_vsi_map { 1435109e2abbSQi Zhang u16 pf_vsi; /* PF's HW VSI ID */ 1436109e2abbSQi Zhang u16 num_vfs; /* The actual number of VFs allocated */ 1437109e2abbSQi Zhang #define VIRTCHNL_DCF_VF_VSI_ID_S 0 1438109e2abbSQi Zhang #define VIRTCHNL_DCF_VF_VSI_ID_M (0xFFF << VIRTCHNL_DCF_VF_VSI_ID_S) 1439a8593fe8SQi Zhang #define VIRTCHNL_DCF_VF_VSI_VALID BIT(15) 1440109e2abbSQi Zhang u16 vf_vsi[1]; 1441109e2abbSQi Zhang }; 1442109e2abbSQi Zhang 1443109e2abbSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(6, virtchnl_dcf_vsi_map); 1444109e2abbSQi Zhang 1445f5cd3a9fSQi Zhang #define PKG_NAME_SIZE 32 1446f5cd3a9fSQi Zhang #define DSN_SIZE 8 1447f5cd3a9fSQi Zhang 1448f5cd3a9fSQi Zhang struct pkg_version { 1449f5cd3a9fSQi Zhang u8 major; 1450f5cd3a9fSQi Zhang u8 minor; 1451f5cd3a9fSQi Zhang u8 update; 1452f5cd3a9fSQi Zhang u8 draft; 1453f5cd3a9fSQi Zhang }; 1454f5cd3a9fSQi Zhang 1455f5cd3a9fSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(4, pkg_version); 1456f5cd3a9fSQi Zhang 1457f5cd3a9fSQi Zhang struct virtchnl_pkg_info { 1458f5cd3a9fSQi Zhang struct pkg_version pkg_ver; 1459f5cd3a9fSQi Zhang u32 track_id; 1460f5cd3a9fSQi Zhang char pkg_name[PKG_NAME_SIZE]; 1461f5cd3a9fSQi Zhang u8 dsn[DSN_SIZE]; 1462f5cd3a9fSQi Zhang }; 1463f5cd3a9fSQi Zhang 1464f5cd3a9fSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(48, virtchnl_pkg_info); 1465f5cd3a9fSQi Zhang 14664b4d2affSQi Zhang /* VIRTCHNL_OP_DCF_VLAN_OFFLOAD 14674b4d2affSQi Zhang * DCF negotiates the VIRTCHNL_VF_OFFLOAD_VLAN_V2 capability firstly to get 14684b4d2affSQi Zhang * the double VLAN configuration, then DCF sends this message to configure the 14694b4d2affSQi Zhang * outer or inner VLAN offloads (insertion and strip) for the target VF. 14704b4d2affSQi Zhang */ 14714b4d2affSQi Zhang struct virtchnl_dcf_vlan_offload { 14724b4d2affSQi Zhang u16 vf_id; 14734b4d2affSQi Zhang u16 tpid; 14744b4d2affSQi Zhang u16 vlan_flags; 14754b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_TYPE_S 0 14764b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_TYPE_M \ 14774b4d2affSQi Zhang (0x1 << VIRTCHNL_DCF_VLAN_TYPE_S) 14784b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_TYPE_INNER 0x0 14794b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_TYPE_OUTER 0x1 14804b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_INSERT_MODE_S 1 14814b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_INSERT_MODE_M \ 14824b4d2affSQi Zhang (0x7 << VIRTCHNL_DCF_VLAN_INSERT_MODE_S) 14834b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_INSERT_DISABLE 0x1 14844b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_INSERT_PORT_BASED 0x2 14854b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_INSERT_VIA_TX_DESC 0x3 14864b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_STRIP_MODE_S 4 14874b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_STRIP_MODE_M \ 14884b4d2affSQi Zhang (0x7 << VIRTCHNL_DCF_VLAN_STRIP_MODE_S) 14894b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_STRIP_DISABLE 0x1 14904b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_STRIP_ONLY 0x2 14914b4d2affSQi Zhang #define VIRTCHNL_DCF_VLAN_STRIP_INTO_RX_DESC 0x3 14924b4d2affSQi Zhang u16 vlan_id; 14934b4d2affSQi Zhang u16 pad[4]; 14944b4d2affSQi Zhang }; 14954b4d2affSQi Zhang 14964b4d2affSQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_dcf_vlan_offload); 14974b4d2affSQi Zhang 14986b62423fSTing Xu struct virtchnl_dcf_bw_cfg { 14996b62423fSTing Xu u8 tc_num; 15006b62423fSTing Xu #define VIRTCHNL_DCF_BW_CIR BIT(0) 15016b62423fSTing Xu #define VIRTCHNL_DCF_BW_PIR BIT(1) 15026b62423fSTing Xu u8 bw_type; 15036b62423fSTing Xu u8 pad[2]; 15046b62423fSTing Xu enum virtchnl_bw_limit_type type; 15056b62423fSTing Xu union { 15066b62423fSTing Xu struct virtchnl_shaper_bw shaper; 15076b62423fSTing Xu u8 pad2[32]; 15086b62423fSTing Xu }; 15096b62423fSTing Xu }; 15106b62423fSTing Xu 15116b62423fSTing Xu VIRTCHNL_CHECK_STRUCT_LEN(40, virtchnl_dcf_bw_cfg); 15126b62423fSTing Xu 15136b62423fSTing Xu /* VIRTCHNL_OP_DCF_CONFIG_BW 15146b62423fSTing Xu * VF send this message to set the bandwidth configuration of each 15156b62423fSTing Xu * TC with a specific vf id. The flag node_type is to indicate that 15166b62423fSTing Xu * this message is to configure VSI node or TC node bandwidth. 15176b62423fSTing Xu */ 15186b62423fSTing Xu struct virtchnl_dcf_bw_cfg_list { 15196b62423fSTing Xu u16 vf_id; 15206b62423fSTing Xu u8 num_elem; 15216b62423fSTing Xu #define VIRTCHNL_DCF_TARGET_TC_BW 0 15226b62423fSTing Xu #define VIRTCHNL_DCF_TARGET_VF_BW 1 15236b62423fSTing Xu u8 node_type; 15246b62423fSTing Xu struct virtchnl_dcf_bw_cfg cfg[1]; 15256b62423fSTing Xu }; 15266b62423fSTing Xu 15276b62423fSTing Xu VIRTCHNL_CHECK_STRUCT_LEN(44, virtchnl_dcf_bw_cfg_list); 15286b62423fSTing Xu 1529a8180656SQi Zhang struct virtchnl_supported_rxdids { 15308265d39aSQi Zhang /* see enum virtchnl_rx_desc_id_bitmasks */ 1531a8180656SQi Zhang u64 supported_rxdids; 1532a8180656SQi Zhang }; 1533a8180656SQi Zhang 1534a8180656SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_supported_rxdids); 1535a8180656SQi Zhang 153689214fe9SHaiyue Wang /* VIRTCHNL_OP_EVENT 153789214fe9SHaiyue Wang * PF sends this message to inform the VF driver of events that may affect it. 153889214fe9SHaiyue Wang * No direct response is expected from the VF, though it may generate other 153989214fe9SHaiyue Wang * messages in response to this one. 154089214fe9SHaiyue Wang */ 154189214fe9SHaiyue Wang enum virtchnl_event_codes { 154289214fe9SHaiyue Wang VIRTCHNL_EVENT_UNKNOWN = 0, 154389214fe9SHaiyue Wang VIRTCHNL_EVENT_LINK_CHANGE, 154489214fe9SHaiyue Wang VIRTCHNL_EVENT_RESET_IMPENDING, 154589214fe9SHaiyue Wang VIRTCHNL_EVENT_PF_DRIVER_CLOSE, 1546109e2abbSQi Zhang VIRTCHNL_EVENT_DCF_VSI_MAP_UPDATE, 154789214fe9SHaiyue Wang }; 154889214fe9SHaiyue Wang 154989214fe9SHaiyue Wang #define PF_EVENT_SEVERITY_INFO 0 155089214fe9SHaiyue Wang #define PF_EVENT_SEVERITY_ATTENTION 1 155189214fe9SHaiyue Wang #define PF_EVENT_SEVERITY_ACTION_REQUIRED 2 155289214fe9SHaiyue Wang #define PF_EVENT_SEVERITY_CERTAIN_DOOM 255 155389214fe9SHaiyue Wang 155489214fe9SHaiyue Wang struct virtchnl_pf_event { 1555e53176efSQi Zhang /* see enum virtchnl_event_codes */ 1556e53176efSQi Zhang s32 event; 155789214fe9SHaiyue Wang union { 155889214fe9SHaiyue Wang /* If the PF driver does not support the new speed reporting 155989214fe9SHaiyue Wang * capabilities then use link_event else use link_event_adv to 156089214fe9SHaiyue Wang * get the speed and link information. The ability to understand 156189214fe9SHaiyue Wang * new speeds is indicated by setting the capability flag 156289214fe9SHaiyue Wang * VIRTCHNL_VF_CAP_ADV_LINK_SPEED in vf_cap_flags parameter 156389214fe9SHaiyue Wang * in virtchnl_vf_resource struct and can be used to determine 156489214fe9SHaiyue Wang * which link event struct to use below. 156589214fe9SHaiyue Wang */ 156689214fe9SHaiyue Wang struct { 156789214fe9SHaiyue Wang enum virtchnl_link_speed link_speed; 156889214fe9SHaiyue Wang u8 link_status; 156989214fe9SHaiyue Wang } link_event; 157089214fe9SHaiyue Wang struct { 157189214fe9SHaiyue Wang /* link_speed provided in Mbps */ 157289214fe9SHaiyue Wang u32 link_speed; 157389214fe9SHaiyue Wang u8 link_status; 157489214fe9SHaiyue Wang } link_event_adv; 1575109e2abbSQi Zhang struct { 1576109e2abbSQi Zhang u16 vf_id; 1577109e2abbSQi Zhang u16 vsi_id; 1578109e2abbSQi Zhang } vf_vsi_map; 157989214fe9SHaiyue Wang } event_data; 158089214fe9SHaiyue Wang 158189214fe9SHaiyue Wang int severity; 158289214fe9SHaiyue Wang }; 158389214fe9SHaiyue Wang 158489214fe9SHaiyue Wang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_pf_event); 158589214fe9SHaiyue Wang 158689214fe9SHaiyue Wang 158789214fe9SHaiyue Wang /* VF reset states - these are written into the RSTAT register: 158889214fe9SHaiyue Wang * VFGEN_RSTAT on the VF 158989214fe9SHaiyue Wang * When the PF initiates a reset, it writes 0 159089214fe9SHaiyue Wang * When the reset is complete, it writes 1 159189214fe9SHaiyue Wang * When the PF detects that the VF has recovered, it writes 2 159289214fe9SHaiyue Wang * VF checks this register periodically to determine if a reset has occurred, 159389214fe9SHaiyue Wang * then polls it to know when the reset is complete. 159489214fe9SHaiyue Wang * If either the PF or VF reads the register while the hardware 159589214fe9SHaiyue Wang * is in a reset state, it will return DEADBEEF, which, when masked 159689214fe9SHaiyue Wang * will result in 3. 159789214fe9SHaiyue Wang */ 159889214fe9SHaiyue Wang enum virtchnl_vfr_states { 159989214fe9SHaiyue Wang VIRTCHNL_VFR_INPROGRESS = 0, 160089214fe9SHaiyue Wang VIRTCHNL_VFR_COMPLETED, 160189214fe9SHaiyue Wang VIRTCHNL_VFR_VFACTIVE, 160289214fe9SHaiyue Wang }; 160389214fe9SHaiyue Wang 160448558482SQi Zhang #define VIRTCHNL_MAX_NUM_PROTO_HDRS 32 1605096c2190SJie Wang #define VIRTCHNL_MAX_NUM_PROTO_HDRS_W_MSK 16 1606bdd7558fSJunfeng Guo #define VIRTCHNL_MAX_SIZE_RAW_PACKET 1024 160748558482SQi Zhang #define PROTO_HDR_SHIFT 5 160848558482SQi Zhang #define PROTO_HDR_FIELD_START(proto_hdr_type) \ 160948558482SQi Zhang (proto_hdr_type << PROTO_HDR_SHIFT) 161048558482SQi Zhang #define PROTO_HDR_FIELD_MASK ((1UL << PROTO_HDR_SHIFT) - 1) 161148558482SQi Zhang 161248558482SQi Zhang /* VF use these macros to configure each protocol header. 161348558482SQi Zhang * Specify which protocol headers and protocol header fields base on 161448558482SQi Zhang * virtchnl_proto_hdr_type and virtchnl_proto_hdr_field. 161548558482SQi Zhang * @param hdr: a struct of virtchnl_proto_hdr 161648558482SQi Zhang * @param hdr_type: ETH/IPV4/TCP, etc 161748558482SQi Zhang * @param field: SRC/DST/TEID/SPI, etc 161848558482SQi Zhang */ 161948558482SQi Zhang #define VIRTCHNL_ADD_PROTO_HDR_FIELD(hdr, field) \ 162048558482SQi Zhang ((hdr)->field_selector |= BIT((field) & PROTO_HDR_FIELD_MASK)) 162148558482SQi Zhang #define VIRTCHNL_DEL_PROTO_HDR_FIELD(hdr, field) \ 162248558482SQi Zhang ((hdr)->field_selector &= ~BIT((field) & PROTO_HDR_FIELD_MASK)) 162348558482SQi Zhang #define VIRTCHNL_TEST_PROTO_HDR_FIELD(hdr, val) \ 162448558482SQi Zhang ((hdr)->field_selector & BIT((val) & PROTO_HDR_FIELD_MASK)) 162548558482SQi Zhang #define VIRTCHNL_GET_PROTO_HDR_FIELD(hdr) ((hdr)->field_selector) 162648558482SQi Zhang 162748558482SQi Zhang #define VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, hdr_type, field) \ 162848558482SQi Zhang (VIRTCHNL_ADD_PROTO_HDR_FIELD(hdr, \ 162948558482SQi Zhang VIRTCHNL_PROTO_HDR_ ## hdr_type ## _ ## field)) 163048558482SQi Zhang #define VIRTCHNL_DEL_PROTO_HDR_FIELD_BIT(hdr, hdr_type, field) \ 163148558482SQi Zhang (VIRTCHNL_DEL_PROTO_HDR_FIELD(hdr, \ 163248558482SQi Zhang VIRTCHNL_PROTO_HDR_ ## hdr_type ## _ ## field)) 163348558482SQi Zhang 163448558482SQi Zhang #define VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, hdr_type) \ 163548558482SQi Zhang ((hdr)->type = VIRTCHNL_PROTO_HDR_ ## hdr_type) 163648558482SQi Zhang #define VIRTCHNL_GET_PROTO_HDR_TYPE(hdr) \ 163748558482SQi Zhang (((hdr)->type) >> PROTO_HDR_SHIFT) 163848558482SQi Zhang #define VIRTCHNL_TEST_PROTO_HDR_TYPE(hdr, val) \ 163948558482SQi Zhang ((hdr)->type == ((val) >> PROTO_HDR_SHIFT)) 164048558482SQi Zhang #define VIRTCHNL_TEST_PROTO_HDR(hdr, val) \ 164148558482SQi Zhang (VIRTCHNL_TEST_PROTO_HDR_TYPE(hdr, val) && \ 164248558482SQi Zhang VIRTCHNL_TEST_PROTO_HDR_FIELD(hdr, val)) 164348558482SQi Zhang 164448558482SQi Zhang /* Protocol header type within a packet segment. A segment consists of one or 164548558482SQi Zhang * more protocol headers that make up a logical group of protocol headers. Each 164648558482SQi Zhang * logical group of protocol headers encapsulates or is encapsulated using/by 164748558482SQi Zhang * tunneling or encapsulation protocols for network virtualization. 164848558482SQi Zhang */ 164948558482SQi Zhang enum virtchnl_proto_hdr_type { 165048558482SQi Zhang VIRTCHNL_PROTO_HDR_NONE, 165148558482SQi Zhang VIRTCHNL_PROTO_HDR_ETH, 165248558482SQi Zhang VIRTCHNL_PROTO_HDR_S_VLAN, 165348558482SQi Zhang VIRTCHNL_PROTO_HDR_C_VLAN, 165448558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV4, 165548558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV6, 165648558482SQi Zhang VIRTCHNL_PROTO_HDR_TCP, 165748558482SQi Zhang VIRTCHNL_PROTO_HDR_UDP, 165848558482SQi Zhang VIRTCHNL_PROTO_HDR_SCTP, 165948558482SQi Zhang VIRTCHNL_PROTO_HDR_GTPU_IP, 166048558482SQi Zhang VIRTCHNL_PROTO_HDR_GTPU_EH, 166148558482SQi Zhang VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_DWN, 166248558482SQi Zhang VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_UP, 166348558482SQi Zhang VIRTCHNL_PROTO_HDR_PPPOE, 166448558482SQi Zhang VIRTCHNL_PROTO_HDR_L2TPV3, 166548558482SQi Zhang VIRTCHNL_PROTO_HDR_ESP, 166648558482SQi Zhang VIRTCHNL_PROTO_HDR_AH, 166748558482SQi Zhang VIRTCHNL_PROTO_HDR_PFCP, 16680feece54SQi Zhang VIRTCHNL_PROTO_HDR_GTPC, 166937ab8bdcSJunfeng Guo VIRTCHNL_PROTO_HDR_ECPRI, 1670c5ed57d1STing Xu VIRTCHNL_PROTO_HDR_L2TPV2, 1671c5ed57d1STing Xu VIRTCHNL_PROTO_HDR_PPP, 1672cfacca20STing Xu /* IPv4 and IPv6 Fragment header types are only associated to 1673cfacca20STing Xu * VIRTCHNL_PROTO_HDR_IPV4 and VIRTCHNL_PROTO_HDR_IPV6 respectively, 1674cfacca20STing Xu * cannot be used independently. 1675cfacca20STing Xu */ 1676cfacca20STing Xu VIRTCHNL_PROTO_HDR_IPV4_FRAG, 1677cfacca20STing Xu VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG, 16785f115d7dSWenjun Wu VIRTCHNL_PROTO_HDR_GRE, 167948558482SQi Zhang }; 168048558482SQi Zhang 168148558482SQi Zhang /* Protocol header field within a protocol header. */ 168248558482SQi Zhang enum virtchnl_proto_hdr_field { 168348558482SQi Zhang /* ETHER */ 168448558482SQi Zhang VIRTCHNL_PROTO_HDR_ETH_SRC = 168548558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_ETH), 168648558482SQi Zhang VIRTCHNL_PROTO_HDR_ETH_DST, 168748558482SQi Zhang VIRTCHNL_PROTO_HDR_ETH_ETHERTYPE, 168848558482SQi Zhang /* S-VLAN */ 168948558482SQi Zhang VIRTCHNL_PROTO_HDR_S_VLAN_ID = 169048558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_S_VLAN), 169148558482SQi Zhang /* C-VLAN */ 169248558482SQi Zhang VIRTCHNL_PROTO_HDR_C_VLAN_ID = 169348558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_C_VLAN), 169448558482SQi Zhang /* IPV4 */ 169548558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV4_SRC = 169648558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV4), 169748558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV4_DST, 169848558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV4_DSCP, 169948558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV4_TTL, 170048558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV4_PROT, 170158aaf49dSAlvin Zhang VIRTCHNL_PROTO_HDR_IPV4_CHKSUM, 170248558482SQi Zhang /* IPV6 */ 170348558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV6_SRC = 170448558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6), 170548558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV6_DST, 170648558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV6_TC, 170748558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV6_HOP_LIMIT, 170848558482SQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PROT, 17098a4a417dSQi Zhang /* IPV6 Prefix */ 17108a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX32_SRC, 17118a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX32_DST, 17128a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX40_SRC, 17138a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX40_DST, 17148a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX48_SRC, 17158a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX48_DST, 17168a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX56_SRC, 17178a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX56_DST, 17188a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_SRC, 17198a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_DST, 17208a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX96_SRC, 17218a4a417dSQi Zhang VIRTCHNL_PROTO_HDR_IPV6_PREFIX96_DST, 172248558482SQi Zhang /* TCP */ 172348558482SQi Zhang VIRTCHNL_PROTO_HDR_TCP_SRC_PORT = 172448558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_TCP), 172548558482SQi Zhang VIRTCHNL_PROTO_HDR_TCP_DST_PORT, 172667edb141SAlvin Zhang VIRTCHNL_PROTO_HDR_TCP_CHKSUM, 172748558482SQi Zhang /* UDP */ 172848558482SQi Zhang VIRTCHNL_PROTO_HDR_UDP_SRC_PORT = 172948558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_UDP), 173048558482SQi Zhang VIRTCHNL_PROTO_HDR_UDP_DST_PORT, 173167edb141SAlvin Zhang VIRTCHNL_PROTO_HDR_UDP_CHKSUM, 173248558482SQi Zhang /* SCTP */ 173348558482SQi Zhang VIRTCHNL_PROTO_HDR_SCTP_SRC_PORT = 173448558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_SCTP), 173548558482SQi Zhang VIRTCHNL_PROTO_HDR_SCTP_DST_PORT, 173667edb141SAlvin Zhang VIRTCHNL_PROTO_HDR_SCTP_CHKSUM, 173748558482SQi Zhang /* GTPU_IP */ 173848558482SQi Zhang VIRTCHNL_PROTO_HDR_GTPU_IP_TEID = 173948558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_IP), 174048558482SQi Zhang /* GTPU_EH */ 174148558482SQi Zhang VIRTCHNL_PROTO_HDR_GTPU_EH_PDU = 174248558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_EH), 174348558482SQi Zhang VIRTCHNL_PROTO_HDR_GTPU_EH_QFI, 174448558482SQi Zhang /* PPPOE */ 174548558482SQi Zhang VIRTCHNL_PROTO_HDR_PPPOE_SESS_ID = 174648558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_PPPOE), 174748558482SQi Zhang /* L2TPV3 */ 174848558482SQi Zhang VIRTCHNL_PROTO_HDR_L2TPV3_SESS_ID = 174948558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_L2TPV3), 175048558482SQi Zhang /* ESP */ 175148558482SQi Zhang VIRTCHNL_PROTO_HDR_ESP_SPI = 175248558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_ESP), 175348558482SQi Zhang /* AH */ 175448558482SQi Zhang VIRTCHNL_PROTO_HDR_AH_SPI = 175548558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_AH), 175648558482SQi Zhang /* PFCP */ 175748558482SQi Zhang VIRTCHNL_PROTO_HDR_PFCP_S_FIELD = 175848558482SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_PFCP), 175948558482SQi Zhang VIRTCHNL_PROTO_HDR_PFCP_SEID, 17600feece54SQi Zhang /* GTPC */ 17610feece54SQi Zhang VIRTCHNL_PROTO_HDR_GTPC_TEID = 17620feece54SQi Zhang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPC), 176337ab8bdcSJunfeng Guo /* ECPRI */ 176437ab8bdcSJunfeng Guo VIRTCHNL_PROTO_HDR_ECPRI_MSG_TYPE = 176537ab8bdcSJunfeng Guo PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_ECPRI), 176637ab8bdcSJunfeng Guo VIRTCHNL_PROTO_HDR_ECPRI_PC_RTC_ID, 1767cfacca20STing Xu /* IPv4 Dummy Fragment */ 1768cfacca20STing Xu VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID = 1769cfacca20STing Xu PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV4_FRAG), 1770cfacca20STing Xu /* IPv6 Extension Fragment */ 1771cfacca20STing Xu VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG_PKID = 1772cfacca20STing Xu PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG), 1773e0c765feSJunfeng Guo /* GTPU_DWN/UP */ 1774e0c765feSJunfeng Guo VIRTCHNL_PROTO_HDR_GTPU_DWN_QFI = 1775e0c765feSJunfeng Guo PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_DWN), 1776e0c765feSJunfeng Guo VIRTCHNL_PROTO_HDR_GTPU_UP_QFI = 1777e0c765feSJunfeng Guo PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_UP), 1778984b99d6SJie Wang /* L2TPv2 */ 1779984b99d6SJie Wang VIRTCHNL_PROTO_HDR_L2TPV2_SESS_ID = 1780984b99d6SJie Wang PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_L2TPV2), 1781984b99d6SJie Wang VIRTCHNL_PROTO_HDR_L2TPV2_LEN_SESS_ID, 178248558482SQi Zhang }; 178348558482SQi Zhang 178448558482SQi Zhang struct virtchnl_proto_hdr { 1785e53176efSQi Zhang /* see enum virtchnl_proto_hdr_type */ 1786e53176efSQi Zhang s32 type; 178748558482SQi Zhang u32 field_selector; /* a bit mask to select field for header type */ 178848558482SQi Zhang u8 buffer[64]; 178948558482SQi Zhang /** 179048558482SQi Zhang * binary buffer in network order for specific header type. 179148558482SQi Zhang * For example, if type = VIRTCHNL_PROTO_HDR_IPV4, a IPv4 179248558482SQi Zhang * header is expected to be copied into the buffer. 179348558482SQi Zhang */ 179448558482SQi Zhang }; 179548558482SQi Zhang 179648558482SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(72, virtchnl_proto_hdr); 179748558482SQi Zhang 1798096c2190SJie Wang struct virtchnl_proto_hdr_w_msk { 1799096c2190SJie Wang /* see enum virtchnl_proto_hdr_type */ 1800096c2190SJie Wang s32 type; 1801096c2190SJie Wang u32 pad; 1802096c2190SJie Wang /** 1803096c2190SJie Wang * binary buffer in network order for specific header type. 1804096c2190SJie Wang * For example, if type = VIRTCHNL_PROTO_HDR_IPV4, a IPv4 1805096c2190SJie Wang * header is expected to be copied into the buffer. 1806096c2190SJie Wang */ 1807096c2190SJie Wang u8 buffer_spec[64]; 1808096c2190SJie Wang /* binary buffer for bit-mask applied to specific header type */ 1809096c2190SJie Wang u8 buffer_mask[64]; 1810096c2190SJie Wang }; 1811096c2190SJie Wang 1812096c2190SJie Wang VIRTCHNL_CHECK_STRUCT_LEN(136, virtchnl_proto_hdr_w_msk); 1813096c2190SJie Wang 181448558482SQi Zhang struct virtchnl_proto_hdrs { 181548558482SQi Zhang u8 tunnel_level; 181648558482SQi Zhang /** 1817bdd7558fSJunfeng Guo * specify where protocol header start from. must be 0 when sending a raw packet request. 181848558482SQi Zhang * 0 - from the outer layer 181948558482SQi Zhang * 1 - from the first inner layer 182048558482SQi Zhang * 2 - from the second inner layer 182148558482SQi Zhang * .... 1822bdd7558fSJunfeng Guo */ 1823bdd7558fSJunfeng Guo int count; 1824bdd7558fSJunfeng Guo /** 1825096c2190SJie Wang * count must <= 1826096c2190SJie Wang * VIRTCHNL_MAX_NUM_PROTO_HDRS + VIRTCHNL_MAX_NUM_PROTO_HDRS_W_MSK 1827096c2190SJie Wang * count = 0 : select raw 1828096c2190SJie Wang * 1 < count <= VIRTCHNL_MAX_NUM_PROTO_HDRS : select proto_hdr 1829096c2190SJie Wang * count > VIRTCHNL_MAX_NUM_PROTO_HDRS : select proto_hdr_w_msk 1830096c2190SJie Wang * last valid index = count - VIRTCHNL_MAX_NUM_PROTO_HDRS 1831bdd7558fSJunfeng Guo */ 1832bdd7558fSJunfeng Guo union { 1833096c2190SJie Wang struct virtchnl_proto_hdr 1834096c2190SJie Wang proto_hdr[VIRTCHNL_MAX_NUM_PROTO_HDRS]; 1835096c2190SJie Wang struct virtchnl_proto_hdr_w_msk 1836096c2190SJie Wang proto_hdr_w_msk[VIRTCHNL_MAX_NUM_PROTO_HDRS_W_MSK]; 1837bdd7558fSJunfeng Guo struct { 1838bdd7558fSJunfeng Guo u16 pkt_len; 1839bdd7558fSJunfeng Guo u8 spec[VIRTCHNL_MAX_SIZE_RAW_PACKET]; 1840bdd7558fSJunfeng Guo u8 mask[VIRTCHNL_MAX_SIZE_RAW_PACKET]; 1841bdd7558fSJunfeng Guo } raw; 1842bdd7558fSJunfeng Guo }; 184348558482SQi Zhang }; 184448558482SQi Zhang 184548558482SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(2312, virtchnl_proto_hdrs); 184648558482SQi Zhang 184757094d59SQi Zhang struct virtchnl_rss_cfg { 184857094d59SQi Zhang struct virtchnl_proto_hdrs proto_hdrs; /* protocol headers */ 1849e53176efSQi Zhang 1850e53176efSQi Zhang /* see enum virtchnl_rss_algorithm; rss algorithm type */ 1851e53176efSQi Zhang s32 rss_algorithm; 185257094d59SQi Zhang u8 reserved[128]; /* reserve for future */ 185357094d59SQi Zhang }; 185457094d59SQi Zhang 185557094d59SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(2444, virtchnl_rss_cfg); 185602ec7cf6SQi Zhang 1857096c2190SJie Wang /* action configuration for FDIR and FSUB */ 185802ec7cf6SQi Zhang struct virtchnl_filter_action { 1859e53176efSQi Zhang /* see enum virtchnl_action type */ 1860e53176efSQi Zhang s32 type; 186102ec7cf6SQi Zhang union { 186202ec7cf6SQi Zhang /* used for queue and qgroup action */ 186302ec7cf6SQi Zhang struct { 186402ec7cf6SQi Zhang u16 index; 186502ec7cf6SQi Zhang u8 region; 186602ec7cf6SQi Zhang } queue; 186702ec7cf6SQi Zhang /* used for count action */ 186802ec7cf6SQi Zhang struct { 186902ec7cf6SQi Zhang /* share counter ID with other flow rules */ 187002ec7cf6SQi Zhang u8 shared; 187102ec7cf6SQi Zhang u32 id; /* counter ID */ 187202ec7cf6SQi Zhang } count; 187302ec7cf6SQi Zhang /* used for mark action */ 187402ec7cf6SQi Zhang u32 mark_id; 187502ec7cf6SQi Zhang u8 reserve[32]; 187602ec7cf6SQi Zhang } act_conf; 187702ec7cf6SQi Zhang }; 187802ec7cf6SQi Zhang 187902ec7cf6SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(36, virtchnl_filter_action); 188002ec7cf6SQi Zhang 188102ec7cf6SQi Zhang #define VIRTCHNL_MAX_NUM_ACTIONS 8 188202ec7cf6SQi Zhang 188302ec7cf6SQi Zhang struct virtchnl_filter_action_set { 188402ec7cf6SQi Zhang /* action number must be less then VIRTCHNL_MAX_NUM_ACTIONS */ 188502ec7cf6SQi Zhang int count; 188602ec7cf6SQi Zhang struct virtchnl_filter_action actions[VIRTCHNL_MAX_NUM_ACTIONS]; 188702ec7cf6SQi Zhang }; 188802ec7cf6SQi Zhang 188902ec7cf6SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(292, virtchnl_filter_action_set); 189002ec7cf6SQi Zhang 189102ec7cf6SQi Zhang /* pattern and action for FDIR rule */ 189202ec7cf6SQi Zhang struct virtchnl_fdir_rule { 189302ec7cf6SQi Zhang struct virtchnl_proto_hdrs proto_hdrs; 189402ec7cf6SQi Zhang struct virtchnl_filter_action_set action_set; 189502ec7cf6SQi Zhang }; 189602ec7cf6SQi Zhang 189702ec7cf6SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(2604, virtchnl_fdir_rule); 189802ec7cf6SQi Zhang 189902ec7cf6SQi Zhang /* Status returned to VF after VF requests FDIR commands 190002ec7cf6SQi Zhang * VIRTCHNL_FDIR_SUCCESS 190102ec7cf6SQi Zhang * VF FDIR related request is successfully done by PF 190202ec7cf6SQi Zhang * The request can be OP_ADD/DEL/QUERY_FDIR_FILTER. 190302ec7cf6SQi Zhang * 190402ec7cf6SQi Zhang * VIRTCHNL_FDIR_FAILURE_RULE_NORESOURCE 190502ec7cf6SQi Zhang * OP_ADD_FDIR_FILTER request is failed due to no Hardware resource. 190602ec7cf6SQi Zhang * 190702ec7cf6SQi Zhang * VIRTCHNL_FDIR_FAILURE_RULE_EXIST 190802ec7cf6SQi Zhang * OP_ADD_FDIR_FILTER request is failed due to the rule is already existed. 190902ec7cf6SQi Zhang * 191002ec7cf6SQi Zhang * VIRTCHNL_FDIR_FAILURE_RULE_CONFLICT 191102ec7cf6SQi Zhang * OP_ADD_FDIR_FILTER request is failed due to conflict with existing rule. 191202ec7cf6SQi Zhang * 191302ec7cf6SQi Zhang * VIRTCHNL_FDIR_FAILURE_RULE_NONEXIST 191402ec7cf6SQi Zhang * OP_DEL_FDIR_FILTER request is failed due to this rule doesn't exist. 191502ec7cf6SQi Zhang * 191602ec7cf6SQi Zhang * VIRTCHNL_FDIR_FAILURE_RULE_INVALID 191702ec7cf6SQi Zhang * OP_ADD_FDIR_FILTER request is failed due to parameters validation 191802ec7cf6SQi Zhang * or HW doesn't support. 191902ec7cf6SQi Zhang * 192002ec7cf6SQi Zhang * VIRTCHNL_FDIR_FAILURE_RULE_TIMEOUT 192102ec7cf6SQi Zhang * OP_ADD/DEL_FDIR_FILTER request is failed due to timing out 192202ec7cf6SQi Zhang * for programming. 192302ec7cf6SQi Zhang * 192402ec7cf6SQi Zhang * VIRTCHNL_FDIR_FAILURE_QUERY_INVALID 192502ec7cf6SQi Zhang * OP_QUERY_FDIR_FILTER request is failed due to parameters validation, 192602ec7cf6SQi Zhang * for example, VF query counter of a rule who has no counter action. 192702ec7cf6SQi Zhang */ 192802ec7cf6SQi Zhang enum virtchnl_fdir_prgm_status { 192902ec7cf6SQi Zhang VIRTCHNL_FDIR_SUCCESS = 0, 193002ec7cf6SQi Zhang VIRTCHNL_FDIR_FAILURE_RULE_NORESOURCE, 193102ec7cf6SQi Zhang VIRTCHNL_FDIR_FAILURE_RULE_EXIST, 193202ec7cf6SQi Zhang VIRTCHNL_FDIR_FAILURE_RULE_CONFLICT, 193302ec7cf6SQi Zhang VIRTCHNL_FDIR_FAILURE_RULE_NONEXIST, 193402ec7cf6SQi Zhang VIRTCHNL_FDIR_FAILURE_RULE_INVALID, 193502ec7cf6SQi Zhang VIRTCHNL_FDIR_FAILURE_RULE_TIMEOUT, 193602ec7cf6SQi Zhang VIRTCHNL_FDIR_FAILURE_QUERY_INVALID, 193702ec7cf6SQi Zhang }; 193802ec7cf6SQi Zhang 193902ec7cf6SQi Zhang /* VIRTCHNL_OP_ADD_FDIR_FILTER 194002ec7cf6SQi Zhang * VF sends this request to PF by filling out vsi_id, 194102ec7cf6SQi Zhang * validate_only and rule_cfg. PF will return flow_id 194202ec7cf6SQi Zhang * if the request is successfully done and return add_status to VF. 194302ec7cf6SQi Zhang */ 194402ec7cf6SQi Zhang struct virtchnl_fdir_add { 194502ec7cf6SQi Zhang u16 vsi_id; /* INPUT */ 194602ec7cf6SQi Zhang /* 194702ec7cf6SQi Zhang * 1 for validating a fdir rule, 0 for creating a fdir rule. 194802ec7cf6SQi Zhang * Validate and create share one ops: VIRTCHNL_OP_ADD_FDIR_FILTER. 194902ec7cf6SQi Zhang */ 195002ec7cf6SQi Zhang u16 validate_only; /* INPUT */ 195102ec7cf6SQi Zhang u32 flow_id; /* OUTPUT */ 195202ec7cf6SQi Zhang struct virtchnl_fdir_rule rule_cfg; /* INPUT */ 1953e53176efSQi Zhang 1954e53176efSQi Zhang /* see enum virtchnl_fdir_prgm_status; OUTPUT */ 1955e53176efSQi Zhang s32 status; 195602ec7cf6SQi Zhang }; 195702ec7cf6SQi Zhang 195802ec7cf6SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(2616, virtchnl_fdir_add); 195902ec7cf6SQi Zhang 196002ec7cf6SQi Zhang /* VIRTCHNL_OP_DEL_FDIR_FILTER 196102ec7cf6SQi Zhang * VF sends this request to PF by filling out vsi_id 196202ec7cf6SQi Zhang * and flow_id. PF will return del_status to VF. 196302ec7cf6SQi Zhang */ 196402ec7cf6SQi Zhang struct virtchnl_fdir_del { 196502ec7cf6SQi Zhang u16 vsi_id; /* INPUT */ 196602ec7cf6SQi Zhang u16 pad; 196702ec7cf6SQi Zhang u32 flow_id; /* INPUT */ 1968e53176efSQi Zhang 1969e53176efSQi Zhang /* see enum virtchnl_fdir_prgm_status; OUTPUT */ 1970e53176efSQi Zhang s32 status; 197102ec7cf6SQi Zhang }; 197202ec7cf6SQi Zhang 197302ec7cf6SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_fdir_del); 197402ec7cf6SQi Zhang 1975096c2190SJie Wang /* Status returned to VF after VF requests FSUB commands 1976096c2190SJie Wang * VIRTCHNL_FSUB_SUCCESS 1977096c2190SJie Wang * VF FLOW related request is successfully done by PF 1978096c2190SJie Wang * The request can be OP_FLOW_SUBSCRIBE/UNSUBSCRIBE. 1979096c2190SJie Wang * 1980096c2190SJie Wang * VIRTCHNL_FSUB_FAILURE_RULE_NORESOURCE 1981096c2190SJie Wang * OP_FLOW_SUBSCRIBE request is failed due to no Hardware resource. 1982096c2190SJie Wang * 1983096c2190SJie Wang * VIRTCHNL_FSUB_FAILURE_RULE_EXIST 1984096c2190SJie Wang * OP_FLOW_SUBSCRIBE request is failed due to the rule is already existed. 1985096c2190SJie Wang * 1986096c2190SJie Wang * VIRTCHNL_FSUB_FAILURE_RULE_NONEXIST 1987096c2190SJie Wang * OP_FLOW_UNSUBSCRIBE request is failed due to this rule doesn't exist. 1988096c2190SJie Wang * 1989096c2190SJie Wang * VIRTCHNL_FSUB_FAILURE_RULE_INVALID 1990096c2190SJie Wang * OP_FLOW_SUBSCRIBE request is failed due to parameters validation 1991096c2190SJie Wang * or HW doesn't support. 1992096c2190SJie Wang */ 1993096c2190SJie Wang enum virtchnl_fsub_prgm_status { 1994096c2190SJie Wang VIRTCHNL_FSUB_SUCCESS = 0, 1995096c2190SJie Wang VIRTCHNL_FSUB_FAILURE_RULE_NORESOURCE, 1996096c2190SJie Wang VIRTCHNL_FSUB_FAILURE_RULE_EXIST, 1997096c2190SJie Wang VIRTCHNL_FSUB_FAILURE_RULE_NONEXIST, 1998096c2190SJie Wang VIRTCHNL_FSUB_FAILURE_RULE_INVALID, 1999096c2190SJie Wang }; 2000096c2190SJie Wang 2001096c2190SJie Wang /* VIRTCHNL_OP_FLOW_SUBSCRIBE 2002096c2190SJie Wang * VF sends this request to PF by filling out vsi_id, 2003096c2190SJie Wang * validate_only, priority, proto_hdrs and actions. 2004096c2190SJie Wang * PF will return flow_id 2005096c2190SJie Wang * if the request is successfully done and return status to VF. 2006096c2190SJie Wang */ 2007096c2190SJie Wang struct virtchnl_flow_sub { 2008096c2190SJie Wang u16 vsi_id; /* INPUT */ 2009096c2190SJie Wang u8 validate_only; /* INPUT */ 2010096c2190SJie Wang u8 priority; /* INPUT */ 2011096c2190SJie Wang u32 flow_id; /* OUTPUT */ 2012096c2190SJie Wang struct virtchnl_proto_hdrs proto_hdrs; /* INPUT */ 2013096c2190SJie Wang struct virtchnl_filter_action_set actions; /* INPUT */ 2014096c2190SJie Wang /* see enum virtchnl_fsub_prgm_status; OUTPUT */ 2015096c2190SJie Wang s32 status; 2016096c2190SJie Wang }; 2017096c2190SJie Wang 2018096c2190SJie Wang VIRTCHNL_CHECK_STRUCT_LEN(2616, virtchnl_flow_sub); 2019096c2190SJie Wang 2020096c2190SJie Wang /* VIRTCHNL_OP_FLOW_UNSUBSCRIBE 2021096c2190SJie Wang * VF sends this request to PF by filling out vsi_id 2022096c2190SJie Wang * and flow_id. PF will return status to VF. 2023096c2190SJie Wang */ 2024096c2190SJie Wang struct virtchnl_flow_unsub { 2025096c2190SJie Wang u16 vsi_id; /* INPUT */ 2026096c2190SJie Wang u16 pad; 2027096c2190SJie Wang u32 flow_id; /* INPUT */ 2028096c2190SJie Wang /* see enum virtchnl_fsub_prgm_status; OUTPUT */ 2029096c2190SJie Wang s32 status; 2030096c2190SJie Wang }; 2031096c2190SJie Wang 2032096c2190SJie Wang VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_flow_unsub); 2033096c2190SJie Wang 20346b62423fSTing Xu /* VIRTCHNL_OP_GET_QOS_CAPS 20356b62423fSTing Xu * VF sends this message to get its QoS Caps, such as 20366b62423fSTing Xu * TC number, Arbiter and Bandwidth. 20376b62423fSTing Xu */ 20386b62423fSTing Xu struct virtchnl_qos_cap_elem { 20396b62423fSTing Xu u8 tc_num; 20406b62423fSTing Xu u8 tc_prio; 20416b62423fSTing Xu #define VIRTCHNL_ABITER_STRICT 0 20426b62423fSTing Xu #define VIRTCHNL_ABITER_ETS 2 20436b62423fSTing Xu u8 arbiter; 20446b62423fSTing Xu #define VIRTCHNL_STRICT_WEIGHT 1 20456b62423fSTing Xu u8 weight; 20466b62423fSTing Xu enum virtchnl_bw_limit_type type; 20476b62423fSTing Xu union { 20486b62423fSTing Xu struct virtchnl_shaper_bw shaper; 20496b62423fSTing Xu u8 pad2[32]; 20506b62423fSTing Xu }; 20516b62423fSTing Xu }; 20526b62423fSTing Xu 20536b62423fSTing Xu VIRTCHNL_CHECK_STRUCT_LEN(40, virtchnl_qos_cap_elem); 20546b62423fSTing Xu 20556b62423fSTing Xu struct virtchnl_qos_cap_list { 20566b62423fSTing Xu u16 vsi_id; 20576b62423fSTing Xu u16 num_elem; 20586b62423fSTing Xu struct virtchnl_qos_cap_elem cap[1]; 20596b62423fSTing Xu }; 20606b62423fSTing Xu 20616b62423fSTing Xu VIRTCHNL_CHECK_STRUCT_LEN(44, virtchnl_qos_cap_list); 20626b62423fSTing Xu 20636b62423fSTing Xu /* VIRTCHNL_OP_CONFIG_QUEUE_TC_MAP 20646b62423fSTing Xu * VF sends message virtchnl_queue_tc_mapping to set queue to tc 20656b62423fSTing Xu * mapping for all the Tx and Rx queues with a specified VSI, and 20666b62423fSTing Xu * would get response about bitmap of valid user priorities 20676b62423fSTing Xu * associated with queues. 20686b62423fSTing Xu */ 20696b62423fSTing Xu struct virtchnl_queue_tc_mapping { 20706b62423fSTing Xu u16 vsi_id; 20716b62423fSTing Xu u16 num_tc; 20726b62423fSTing Xu u16 num_queue_pairs; 20736b62423fSTing Xu u8 pad[2]; 20746b62423fSTing Xu union { 20756b62423fSTing Xu struct { 20766b62423fSTing Xu u16 start_queue_id; 20776b62423fSTing Xu u16 queue_count; 20786b62423fSTing Xu } req; 20796b62423fSTing Xu struct { 20806b62423fSTing Xu #define VIRTCHNL_USER_PRIO_TYPE_UP 0 20816b62423fSTing Xu #define VIRTCHNL_USER_PRIO_TYPE_DSCP 1 20826b62423fSTing Xu u16 prio_type; 20836b62423fSTing Xu u16 valid_prio_bitmap; 20846b62423fSTing Xu } resp; 20856b62423fSTing Xu } tc[1]; 20866b62423fSTing Xu }; 20876b62423fSTing Xu 20886b62423fSTing Xu VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_queue_tc_mapping); 20896b62423fSTing Xu 20905779a889SWenjun Wu /* VIRTCHNL_OP_CONFIG_QUEUE_BW */ 20915779a889SWenjun Wu struct virtchnl_queue_bw { 20925779a889SWenjun Wu u16 queue_id; 20935779a889SWenjun Wu u8 tc; 20945779a889SWenjun Wu u8 pad; 20955779a889SWenjun Wu struct virtchnl_shaper_bw shaper; 20965779a889SWenjun Wu }; 20975779a889SWenjun Wu 20985779a889SWenjun Wu VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_queue_bw); 20995779a889SWenjun Wu 21005779a889SWenjun Wu struct virtchnl_queues_bw_cfg { 21015779a889SWenjun Wu u16 vsi_id; 21025779a889SWenjun Wu u16 num_queues; 21035779a889SWenjun Wu struct virtchnl_queue_bw cfg[1]; 21045779a889SWenjun Wu }; 21055779a889SWenjun Wu 21065779a889SWenjun Wu VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_queues_bw_cfg); 2107691ad362SQi Zhang 2108691ad362SQi Zhang /* TX and RX queue types are valid in legacy as well as split queue models. 2109691ad362SQi Zhang * With Split Queue model, 2 additional types are introduced - TX_COMPLETION 2110691ad362SQi Zhang * and RX_BUFFER. In split queue model, RX corresponds to the queue where HW 2111691ad362SQi Zhang * posts completions. 2112691ad362SQi Zhang */ 2113691ad362SQi Zhang enum virtchnl_queue_type { 2114691ad362SQi Zhang VIRTCHNL_QUEUE_TYPE_TX = 0, 2115691ad362SQi Zhang VIRTCHNL_QUEUE_TYPE_RX = 1, 2116691ad362SQi Zhang VIRTCHNL_QUEUE_TYPE_TX_COMPLETION = 2, 2117691ad362SQi Zhang VIRTCHNL_QUEUE_TYPE_RX_BUFFER = 3, 2118691ad362SQi Zhang VIRTCHNL_QUEUE_TYPE_CONFIG_TX = 4, 2119691ad362SQi Zhang VIRTCHNL_QUEUE_TYPE_CONFIG_RX = 5 2120691ad362SQi Zhang }; 2121691ad362SQi Zhang 2122691ad362SQi Zhang 2123691ad362SQi Zhang /* structure to specify a chunk of contiguous queues */ 2124691ad362SQi Zhang struct virtchnl_queue_chunk { 2125e53176efSQi Zhang /* see enum virtchnl_queue_type */ 2126e53176efSQi Zhang s32 type; 2127691ad362SQi Zhang u16 start_queue_id; 2128691ad362SQi Zhang u16 num_queues; 2129691ad362SQi Zhang }; 2130691ad362SQi Zhang 2131691ad362SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(8, virtchnl_queue_chunk); 2132691ad362SQi Zhang 2133691ad362SQi Zhang /* structure to specify several chunks of contiguous queues */ 2134691ad362SQi Zhang struct virtchnl_queue_chunks { 2135691ad362SQi Zhang u16 num_chunks; 2136691ad362SQi Zhang u16 rsvd; 2137691ad362SQi Zhang struct virtchnl_queue_chunk chunks[1]; 2138691ad362SQi Zhang }; 2139691ad362SQi Zhang 2140691ad362SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_queue_chunks); 2141691ad362SQi Zhang 2142691ad362SQi Zhang 2143691ad362SQi Zhang /* VIRTCHNL_OP_ENABLE_QUEUES_V2 2144691ad362SQi Zhang * VIRTCHNL_OP_DISABLE_QUEUES_V2 2145691ad362SQi Zhang * VIRTCHNL_OP_DEL_QUEUES 2146691ad362SQi Zhang * 2147691ad362SQi Zhang * If VIRTCHNL_CAP_EXT_FEATURES was negotiated in VIRTCHNL_OP_GET_VF_RESOURCES 2148691ad362SQi Zhang * then all of these ops are available. 2149691ad362SQi Zhang * 2150691ad362SQi Zhang * If VIRTCHNL_VF_LARGE_NUM_QPAIRS was negotiated in VIRTCHNL_OP_GET_VF_RESOURCES 2151691ad362SQi Zhang * then VIRTCHNL_OP_ENABLE_QUEUES_V2 and VIRTCHNL_OP_DISABLE_QUEUES_V2 are 2152691ad362SQi Zhang * available. 2153691ad362SQi Zhang * 2154691ad362SQi Zhang * PF sends these messages to enable, disable or delete queues specified in 2155691ad362SQi Zhang * chunks. PF sends virtchnl_del_ena_dis_queues struct to specify the queues 2156691ad362SQi Zhang * to be enabled/disabled/deleted. Also applicable to single queue RX or 2157691ad362SQi Zhang * TX. CP performs requested action and returns status. 2158691ad362SQi Zhang */ 2159691ad362SQi Zhang struct virtchnl_del_ena_dis_queues { 2160691ad362SQi Zhang u16 vport_id; 2161691ad362SQi Zhang u16 pad; 2162691ad362SQi Zhang struct virtchnl_queue_chunks chunks; 2163691ad362SQi Zhang }; 2164691ad362SQi Zhang 2165691ad362SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_del_ena_dis_queues); 2166691ad362SQi Zhang 2167691ad362SQi Zhang /* Virtchannel interrupt throttling rate index */ 2168691ad362SQi Zhang enum virtchnl_itr_idx { 2169691ad362SQi Zhang VIRTCHNL_ITR_IDX_0 = 0, 2170691ad362SQi Zhang VIRTCHNL_ITR_IDX_1 = 1, 2171691ad362SQi Zhang VIRTCHNL_ITR_IDX_NO_ITR = 3, 2172691ad362SQi Zhang }; 2173691ad362SQi Zhang 2174691ad362SQi Zhang /* Queue to vector mapping */ 2175691ad362SQi Zhang struct virtchnl_queue_vector { 2176691ad362SQi Zhang u16 queue_id; 2177691ad362SQi Zhang u16 vector_id; 2178691ad362SQi Zhang u8 pad[4]; 2179e53176efSQi Zhang 2180e53176efSQi Zhang /* see enum virtchnl_itr_idx */ 2181e53176efSQi Zhang s32 itr_idx; 2182e53176efSQi Zhang 2183e53176efSQi Zhang /* see enum virtchnl_queue_type */ 2184e53176efSQi Zhang s32 queue_type; 2185691ad362SQi Zhang }; 2186691ad362SQi Zhang 2187691ad362SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_queue_vector); 2188691ad362SQi Zhang 2189691ad362SQi Zhang /* VIRTCHNL_OP_MAP_QUEUE_VECTOR 2190691ad362SQi Zhang * VIRTCHNL_OP_UNMAP_QUEUE_VECTOR 2191691ad362SQi Zhang * 2192691ad362SQi Zhang * If VIRTCHNL_CAP_EXT_FEATURES was negotiated in VIRTCHNL_OP_GET_VF_RESOURCES 2193691ad362SQi Zhang * then all of these ops are available. 2194691ad362SQi Zhang * 2195691ad362SQi Zhang * If VIRTCHNL_VF_LARGE_NUM_QPAIRS was negotiated in VIRTCHNL_OP_GET_VF_RESOURCES 2196691ad362SQi Zhang * then only VIRTCHNL_OP_MAP_QUEUE_VECTOR is available. 2197691ad362SQi Zhang * 2198691ad362SQi Zhang * PF sends this message to map or unmap queues to vectors and ITR index 2199691ad362SQi Zhang * registers. External data buffer contains virtchnl_queue_vector_maps structure 2200691ad362SQi Zhang * that contains num_qv_maps of virtchnl_queue_vector structures. 2201691ad362SQi Zhang * CP maps the requested queue vector maps after validating the queue and vector 2202691ad362SQi Zhang * ids and returns a status code. 2203691ad362SQi Zhang */ 2204691ad362SQi Zhang struct virtchnl_queue_vector_maps { 2205691ad362SQi Zhang u16 vport_id; 2206691ad362SQi Zhang u16 num_qv_maps; 2207691ad362SQi Zhang u8 pad[4]; 2208691ad362SQi Zhang struct virtchnl_queue_vector qv_maps[1]; 2209691ad362SQi Zhang }; 2210691ad362SQi Zhang 2211691ad362SQi Zhang VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_queue_vector_maps); 2212691ad362SQi Zhang 2213b14e8a57SWenjun Wu struct virtchnl_quanta_cfg { 2214b14e8a57SWenjun Wu u16 quanta_size; 2215b14e8a57SWenjun Wu struct virtchnl_queue_chunk queue_select; 2216b14e8a57SWenjun Wu }; 2217b14e8a57SWenjun Wu 2218b14e8a57SWenjun Wu VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_quanta_cfg); 2219691ad362SQi Zhang 2220286e99f3SJacob Keller #define VIRTCHNL_1588_PTP_CAP_TX_TSTAMP BIT(0) 222190160401SSimei Su #define VIRTCHNL_1588_PTP_CAP_RX_TSTAMP BIT(1) 222290160401SSimei Su #define VIRTCHNL_1588_PTP_CAP_READ_PHC BIT(2) 2223286e99f3SJacob Keller #define VIRTCHNL_1588_PTP_CAP_WRITE_PHC BIT(3) 2224286e99f3SJacob Keller #define VIRTCHNL_1588_PTP_CAP_PHC_REGS BIT(4) 2225886cc4b8SPiotr Gardocki #define VIRTCHNL_1588_PTP_CAP_SYNCE BIT(6) 222670250571SJun Zhang #define VIRTCHNL_1588_PTP_CAP_GNSS BIT(7) 222790160401SSimei Su 222890160401SSimei Su struct virtchnl_phc_regs { 222990160401SSimei Su u32 clock_hi; 223090160401SSimei Su u32 clock_lo; 223190160401SSimei Su u8 pcie_region; 223290160401SSimei Su u8 rsvd[15]; 223390160401SSimei Su }; 223490160401SSimei Su 223590160401SSimei Su VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_phc_regs); 223690160401SSimei Su 2237286e99f3SJacob Keller enum virtchnl_ptp_tstamp_format { 2238286e99f3SJacob Keller VIRTCHNL_1588_PTP_TSTAMP_40BIT = 0, 2239286e99f3SJacob Keller VIRTCHNL_1588_PTP_TSTAMP_64BIT_NS = 1, 2240286e99f3SJacob Keller }; 2241286e99f3SJacob Keller 224290160401SSimei Su struct virtchnl_ptp_caps { 224390160401SSimei Su struct virtchnl_phc_regs phc_regs; 224490160401SSimei Su u32 caps; 224590160401SSimei Su s32 max_adj; 224690160401SSimei Su u8 tx_tstamp_idx; 224790160401SSimei Su u8 n_ext_ts; 224890160401SSimei Su u8 n_per_out; 224990160401SSimei Su u8 n_pins; 225090160401SSimei Su u8 tx_tstamp_format; 225190160401SSimei Su u8 rsvd[11]; 225290160401SSimei Su }; 225390160401SSimei Su 225490160401SSimei Su VIRTCHNL_CHECK_STRUCT_LEN(48, virtchnl_ptp_caps); 225590160401SSimei Su 225690160401SSimei Su struct virtchnl_phc_time { 225790160401SSimei Su u64 time; 225890160401SSimei Su u8 rsvd[8]; 225990160401SSimei Su }; 226090160401SSimei Su 226190160401SSimei Su VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_time); 226290160401SSimei Su 2263286e99f3SJacob Keller struct virtchnl_phc_adj_time { 2264286e99f3SJacob Keller s64 delta; 2265286e99f3SJacob Keller u8 rsvd[8]; 2266286e99f3SJacob Keller }; 2267286e99f3SJacob Keller VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_adj_time); 2268286e99f3SJacob Keller 2269286e99f3SJacob Keller struct virtchnl_phc_adj_freq { 2270286e99f3SJacob Keller s64 scaled_ppm; 2271286e99f3SJacob Keller u8 rsvd[8]; 2272286e99f3SJacob Keller }; 2273286e99f3SJacob Keller VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_adj_freq); 2274286e99f3SJacob Keller 2275286e99f3SJacob Keller struct virtchnl_phc_tx_tstamp { 2276286e99f3SJacob Keller u64 tstamp; 2277286e99f3SJacob Keller u8 rsvd[8]; 2278286e99f3SJacob Keller }; 2279286e99f3SJacob Keller VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_tx_tstamp); 2280286e99f3SJacob Keller 2281886cc4b8SPiotr Gardocki struct virtchnl_synce_get_phy_rec_clk_out { 2282886cc4b8SPiotr Gardocki u8 phy_output; 2283886cc4b8SPiotr Gardocki u8 port_num; 2284886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_PHY_REC_CLK_OUT_CURR_PORT 0xFF 2285886cc4b8SPiotr Gardocki u8 flags; 2286886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_PHY_REC_CLK_OUT_OUT_EN BIT(0) 2287886cc4b8SPiotr Gardocki u8 rsvd[13]; 2288886cc4b8SPiotr Gardocki }; 2289886cc4b8SPiotr Gardocki 2290886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_get_phy_rec_clk_out); 2291886cc4b8SPiotr Gardocki 2292886cc4b8SPiotr Gardocki struct virtchnl_synce_set_phy_rec_clk_out { 2293886cc4b8SPiotr Gardocki u8 phy_output; 2294886cc4b8SPiotr Gardocki u8 enable; 2295886cc4b8SPiotr Gardocki u8 rsvd[14]; 2296886cc4b8SPiotr Gardocki }; 2297886cc4b8SPiotr Gardocki 2298886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_set_phy_rec_clk_out); 2299886cc4b8SPiotr Gardocki 2300886cc4b8SPiotr Gardocki struct virtchnl_synce_get_cgu_ref_prio { 2301886cc4b8SPiotr Gardocki u8 dpll_num; 2302886cc4b8SPiotr Gardocki u8 ref_idx; 2303886cc4b8SPiotr Gardocki u8 ref_priority; 2304886cc4b8SPiotr Gardocki u8 rsvd[13]; 2305886cc4b8SPiotr Gardocki }; 2306886cc4b8SPiotr Gardocki 2307886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_get_cgu_ref_prio); 2308886cc4b8SPiotr Gardocki 2309886cc4b8SPiotr Gardocki struct virtchnl_synce_set_cgu_ref_prio { 2310886cc4b8SPiotr Gardocki u8 dpll_num; 2311886cc4b8SPiotr Gardocki u8 ref_idx; 2312886cc4b8SPiotr Gardocki u8 ref_priority; 2313886cc4b8SPiotr Gardocki u8 rsvd[13]; 2314886cc4b8SPiotr Gardocki }; 2315886cc4b8SPiotr Gardocki 2316886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_set_cgu_ref_prio); 2317886cc4b8SPiotr Gardocki 2318886cc4b8SPiotr Gardocki struct virtchnl_synce_get_input_pin_cfg { 2319886cc4b8SPiotr Gardocki u32 freq; 2320886cc4b8SPiotr Gardocki u32 phase_delay; 2321886cc4b8SPiotr Gardocki u8 input_idx; 2322886cc4b8SPiotr Gardocki u8 status; 2323886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_STATUS_LOS BIT(0) 2324886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_STATUS_SCM_FAIL BIT(1) 2325886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_STATUS_CFM_FAIL BIT(2) 2326886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_STATUS_GST_FAIL BIT(3) 2327886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_STATUS_PFM_FAIL BIT(4) 2328886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_STATUS_ESYNC_FAIL BIT(6) 2329886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_STATUS_ESYNC_CAP BIT(7) 2330886cc4b8SPiotr Gardocki u8 type; 2331886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_TYPE_READ_ONLY BIT(0) 2332886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_TYPE_GPS BIT(4) 2333886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_TYPE_EXTERNAL BIT(5) 2334886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_TYPE_PHY BIT(6) 2335886cc4b8SPiotr Gardocki u8 flags1; 2336886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_FLG1_PHASE_DELAY_SUPP BIT(0) 2337886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_FLG1_1PPS_SUPP BIT(2) 2338886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_FLG1_10MHZ_SUPP BIT(3) 2339886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_FLG1_ANYFREQ BIT(7) 2340886cc4b8SPiotr Gardocki u8 flags2; 2341886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_FLG2_INPUT_EN BIT(5) 2342886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_IN_CFG_FLG2_ESYNC_EN BIT(6) 2343a26c6596SJulian Grajkowski #define VIRTCHNL_GET_CGU_IN_CFG_FLG2_ESYNC_REFSYNC_EN_SHIFT 6 2344a26c6596SJulian Grajkowski #define VIRTHCNL_GET_CGU_IN_CFG_FLG2_ESYNC_REFSYNC_EN \ 2345a26c6596SJulian Grajkowski MAKEMASK(0x3, VIRTCHNL_GET_CGU_IN_CFG_FLG2_ESYNC_REFSYNC_EN_SHIFT) 2346a26c6596SJulian Grajkowski #define VIRTCHNL_GET_CGU_IN_CFG_ESYNC_DIS 0 2347a26c6596SJulian Grajkowski #define VIRTCHNL_GET_CGU_IN_CFG_ESYNC_EN 1 2348a26c6596SJulian Grajkowski #define VIRTCHNL_GET_CGU_IN_CFG_REFSYNC_EN 2 2349886cc4b8SPiotr Gardocki u8 rsvd[3]; 2350886cc4b8SPiotr Gardocki }; 2351886cc4b8SPiotr Gardocki 2352886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_get_input_pin_cfg); 2353886cc4b8SPiotr Gardocki 2354886cc4b8SPiotr Gardocki struct virtchnl_synce_set_input_pin_cfg { 2355886cc4b8SPiotr Gardocki u32 freq; 2356886cc4b8SPiotr Gardocki u32 phase_delay; 2357886cc4b8SPiotr Gardocki u8 input_idx; 2358886cc4b8SPiotr Gardocki u8 flags1; 2359886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_IN_CFG_FLG1_UPDATE_FREQ BIT(6) 2360886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_IN_CFG_FLG1_UPDATE_DELAY BIT(7) 2361886cc4b8SPiotr Gardocki u8 flags2; 2362886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_IN_CFG_FLG2_INPUT_EN BIT(5) 2363886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_IN_CFG_FLG2_ESYNC_EN BIT(6) 2364a26c6596SJulian Grajkowski #define VIRTCHNL_SET_CGU_IN_CFG_FLG2_ESYNC_REFSYNC_EN_SHIFT 6 2365a26c6596SJulian Grajkowski #define VIRTCHNL_SET_CGU_IN_CFG_FLG2_ESYNC_REFSYNC_EN \ 2366a26c6596SJulian Grajkowski MAKEMASK(0x3, ICE_AQC_SET_CGU_IN_CFG_FLG2_ESYNC_REFSYNC_EN_SHIFT) 2367a26c6596SJulian Grajkowski #define VIRTCHNL_SET_CGU_IN_CFG_ESYNC_DIS 0 2368a26c6596SJulian Grajkowski #define VIRTCHNL_SET_CGU_IN_CFG_ESYNC_EN 1 2369a26c6596SJulian Grajkowski #define VIRTCHNL_SET_CGU_IN_CFG_REFSYNC_EN 2 2370886cc4b8SPiotr Gardocki u8 rsvd[5]; 2371886cc4b8SPiotr Gardocki }; 2372886cc4b8SPiotr Gardocki 2373886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_set_input_pin_cfg); 2374886cc4b8SPiotr Gardocki 2375886cc4b8SPiotr Gardocki struct virtchnl_synce_get_output_pin_cfg { 2376886cc4b8SPiotr Gardocki u32 freq; 2377886cc4b8SPiotr Gardocki u32 src_freq; 2378886cc4b8SPiotr Gardocki u8 output_idx; 2379886cc4b8SPiotr Gardocki u8 flags; 2380886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_OUT_CFG_OUT_EN BIT(0) 2381886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_OUT_CFG_ESYNC_EN BIT(1) 2382886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_OUT_CFG_ESYNC_ABILITY BIT(2) 2383886cc4b8SPiotr Gardocki u8 src_sel; 2384886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_OUT_CFG_DPLL_SRC_SEL_SHIFT 0 2385886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_OUT_CFG_DPLL_SRC_SEL \ 2386886cc4b8SPiotr Gardocki (0x1F << VIRTCHNL_GET_CGU_OUT_CFG_DPLL_SRC_SEL_SHIFT) 2387886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_OUT_CFG_DPLL_MODE_SHIFT 5 2388886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_OUT_CFG_DPLL_MODE \ 2389886cc4b8SPiotr Gardocki (0x7 << VIRTCHNL_GET_CGU_OUT_CFG_DPLL_MODE_SHIFT) 2390886cc4b8SPiotr Gardocki u8 rsvd[5]; 2391886cc4b8SPiotr Gardocki }; 2392886cc4b8SPiotr Gardocki 2393886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_get_output_pin_cfg); 2394886cc4b8SPiotr Gardocki 2395886cc4b8SPiotr Gardocki struct virtchnl_synce_set_output_pin_cfg { 2396886cc4b8SPiotr Gardocki u32 freq; 2397886cc4b8SPiotr Gardocki u32 phase_delay; 2398886cc4b8SPiotr Gardocki u8 output_idx; 2399886cc4b8SPiotr Gardocki u8 flags; 2400886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_OUT_CFG_OUT_EN BIT(0) 2401886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_OUT_CFG_ESYNC_EN BIT(1) 2402886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_OUT_CFG_UPDATE_FREQ BIT(2) 2403886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_OUT_CFG_UPDATE_PHASE BIT(3) 2404886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_OUT_CFG_UPDATE_SRC_SEL BIT(4) 2405886cc4b8SPiotr Gardocki u8 src_sel; 2406886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_OUT_CFG_DPLL_SRC_SEL 0x1F 2407886cc4b8SPiotr Gardocki u8 rsvd[5]; 2408886cc4b8SPiotr Gardocki }; 2409886cc4b8SPiotr Gardocki 2410886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_set_output_pin_cfg); 2411886cc4b8SPiotr Gardocki 2412886cc4b8SPiotr Gardocki struct virtchnl_synce_get_cgu_abilities { 2413886cc4b8SPiotr Gardocki u8 num_inputs; 2414886cc4b8SPiotr Gardocki u8 num_outputs; 2415886cc4b8SPiotr Gardocki u8 pps_dpll_idx; 2416886cc4b8SPiotr Gardocki u8 synce_dpll_idx; 2417886cc4b8SPiotr Gardocki u32 max_in_freq; 2418886cc4b8SPiotr Gardocki u32 max_in_phase_adj; 2419886cc4b8SPiotr Gardocki u32 max_out_freq; 2420886cc4b8SPiotr Gardocki u32 max_out_phase_adj; 2421886cc4b8SPiotr Gardocki u8 cgu_part_num; 2422886cc4b8SPiotr Gardocki u8 rsvd[3]; 2423886cc4b8SPiotr Gardocki }; 2424886cc4b8SPiotr Gardocki 2425886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_synce_get_cgu_abilities); 2426886cc4b8SPiotr Gardocki 2427886cc4b8SPiotr Gardocki struct virtchnl_synce_get_cgu_dpll_status { 2428886cc4b8SPiotr Gardocki s64 phase_offset; 2429886cc4b8SPiotr Gardocki u16 dpll_state; 2430886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_LOCK BIT(0) 2431886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_HO BIT(1) 2432886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_HO_READY BIT(2) 2433886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_FLHIT BIT(5) 2434886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_PSLHIT BIT(7) 2435886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT 8 2436886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SEL \ 2437886cc4b8SPiotr Gardocki (0x1F << VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_CLK_REF_SHIFT) 2438886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_MODE_SHIFT 13 2439886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_MODE \ 2440886cc4b8SPiotr Gardocki (0x7 << VIRTCHNL_GET_CGU_DPLL_STATUS_STATE_MODE_SHIFT) 2441886cc4b8SPiotr Gardocki u8 dpll_num; 2442886cc4b8SPiotr Gardocki u8 ref_state; 2443886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_REF_SW_LOS BIT(0) 2444886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_REF_SW_SCM BIT(1) 2445886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_REF_SW_CFM BIT(2) 2446886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_REF_SW_GST BIT(3) 2447886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_REF_SW_PFM BIT(4) 2448886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_FAST_LOCK_EN BIT(5) 2449886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_REF_SW_ESYNC BIT(6) 2450886cc4b8SPiotr Gardocki u8 eec_mode; 2451886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_EEC_MODE_1 0xA 2452886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_EEC_MODE_2 0xB 2453886cc4b8SPiotr Gardocki #define VIRTCHNL_GET_CGU_DPLL_STATUS_EEC_MODE_UNKNOWN 0xF 2454886cc4b8SPiotr Gardocki u8 rsvd[11]; 2455886cc4b8SPiotr Gardocki }; 2456886cc4b8SPiotr Gardocki 2457886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_synce_get_cgu_dpll_status); 2458886cc4b8SPiotr Gardocki 2459886cc4b8SPiotr Gardocki struct virtchnl_synce_set_cgu_dpll_config { 2460886cc4b8SPiotr Gardocki u8 dpll_num; 2461886cc4b8SPiotr Gardocki u8 ref_state; 2462886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_REF_SW_LOS BIT(0) 2463886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_REF_SW_SCM BIT(1) 2464886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_REF_SW_CFM BIT(2) 2465886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_REF_SW_GST BIT(3) 2466886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_REF_SW_PFM BIT(4) 2467886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_REF_FLOCK_EN BIT(5) 2468886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_REF_SW_ESYNC BIT(6) 2469886cc4b8SPiotr Gardocki u8 config; 2470886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_CLK_REF_SEL 0x1F 2471886cc4b8SPiotr Gardocki #define VIRTCHNL_SET_CGU_DPLL_CONFIG_MODE (0x7 << 5) 2472886cc4b8SPiotr Gardocki u8 eec_mode; 2473886cc4b8SPiotr Gardocki u8 rsvd[12]; 2474886cc4b8SPiotr Gardocki }; 2475886cc4b8SPiotr Gardocki 2476886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_set_cgu_dpll_config); 2477886cc4b8SPiotr Gardocki 2478886cc4b8SPiotr Gardocki struct virtchnl_synce_get_cgu_info { 2479886cc4b8SPiotr Gardocki u32 cgu_id; 2480886cc4b8SPiotr Gardocki u32 cgu_cfg_ver; 2481886cc4b8SPiotr Gardocki u32 cgu_fw_ver; 2482886cc4b8SPiotr Gardocki u8 rsvd[4]; 2483886cc4b8SPiotr Gardocki }; 2484886cc4b8SPiotr Gardocki 2485886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_synce_get_cgu_info); 2486886cc4b8SPiotr Gardocki 2487886cc4b8SPiotr Gardocki struct virtchnl_cgu_pin { 2488886cc4b8SPiotr Gardocki u8 pin_index; 2489886cc4b8SPiotr Gardocki char name[63]; 2490886cc4b8SPiotr Gardocki }; 2491886cc4b8SPiotr Gardocki 2492886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(64, virtchnl_cgu_pin); 2493886cc4b8SPiotr Gardocki 2494886cc4b8SPiotr Gardocki struct virtchnl_synce_get_hw_info { 2495886cc4b8SPiotr Gardocki u8 cgu_present; 2496886cc4b8SPiotr Gardocki u8 rclk_present; 2497886cc4b8SPiotr Gardocki u8 c827_idx; 2498886cc4b8SPiotr Gardocki u8 len; 2499886cc4b8SPiotr Gardocki u8 rsvd[4]; 2500886cc4b8SPiotr Gardocki struct virtchnl_cgu_pin pins[1]; 2501886cc4b8SPiotr Gardocki }; 2502886cc4b8SPiotr Gardocki 2503886cc4b8SPiotr Gardocki VIRTCHNL_CHECK_STRUCT_LEN(72, virtchnl_synce_get_hw_info); 2504886cc4b8SPiotr Gardocki 250570250571SJun Zhang struct virtchnl_link_topo_params { 250670250571SJun Zhang u8 lport_num; 250770250571SJun Zhang u8 lport_num_valid; 250870250571SJun Zhang u8 node_type_ctx; 250970250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_TYPE_GPS 11 251070250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_CTX_S 4 251170250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_CTX_M \ 251270250571SJun Zhang (0xF << VIRTCHNL_LINK_TOPO_NODE_CTX_S) 251370250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_CTX_GLOBAL 0 251470250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_CTX_BOARD 1 251570250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_CTX_PORT 2 251670250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_CTX_NODE 3 251770250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_CTX_PROVIDED 4 251870250571SJun Zhang #define VIRTCHNL_LINK_TOPO_NODE_CTX_OVERRIDE 5 251970250571SJun Zhang u8 index; 252070250571SJun Zhang }; 252170250571SJun Zhang 252270250571SJun Zhang VIRTCHNL_CHECK_STRUCT_LEN(4, virtchnl_link_topo_params); 252370250571SJun Zhang 252470250571SJun Zhang struct virtchnl_link_topo_addr { 252570250571SJun Zhang struct virtchnl_link_topo_params topo_params; 252670250571SJun Zhang u16 handle; 252770250571SJun Zhang }; 252870250571SJun Zhang 252970250571SJun Zhang VIRTCHNL_CHECK_STRUCT_LEN(6, virtchnl_link_topo_addr); 253070250571SJun Zhang 253170250571SJun Zhang struct virtchnl_gnss_i2c { 253270250571SJun Zhang struct virtchnl_link_topo_addr topo_addr; 253370250571SJun Zhang u16 i2c_addr; 253470250571SJun Zhang u8 i2c_params; 253570250571SJun Zhang #define VIRTCHNL_I2C_DATA_SIZE_S 0 253670250571SJun Zhang #define VIRTCHNL_I2C_DATA_SIZE_M (0xF << VIRTCHNL_I2C_DATA_SIZE_S) 253770250571SJun Zhang #define VIRTCHNL_I2C_ADDR_TYPE_M BIT(4) 253870250571SJun Zhang #define VIRTCHNL_I2C_ADDR_TYPE_7BIT 0 253970250571SJun Zhang #define VIRTCHNL_I2C_ADDR_TYPE_10BIT VIRTCHNL_I2C_ADDR_TYPE_M 254070250571SJun Zhang #define VIRTCHNL_I2C_DATA_OFFSET_S 5 254170250571SJun Zhang #define VIRTCHNL_I2C_DATA_OFFSET_M (0x3 << VIRTCHNL_I2C_DATA_OFFSET_S) 254270250571SJun Zhang #define VIRTCHNL_I2C_USE_REPEATED_START BIT(7) 254370250571SJun Zhang u8 rsvd; 254470250571SJun Zhang u16 i2c_bus_addr; 254570250571SJun Zhang #define VIRTCHNL_I2C_ADDR_7BIT_MASK 0x7F 254670250571SJun Zhang #define VIRTCHNL_I2C_ADDR_10BIT_MASK 0x3FF 254770250571SJun Zhang u8 i2c_data[4]; /* Used only by write command, reserved in read. */ 254870250571SJun Zhang }; 254970250571SJun Zhang 255070250571SJun Zhang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_gnss_i2c); 255170250571SJun Zhang 255270250571SJun Zhang struct virtchnl_gnss_read_i2c_resp { 255370250571SJun Zhang u8 i2c_data[16]; 255470250571SJun Zhang }; 255570250571SJun Zhang 255670250571SJun Zhang VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_gnss_read_i2c_resp); 255770250571SJun Zhang 2558d00846d9SLukasz Plachno /* 2559d00846d9SLukasz Plachno * VIRTCHNL_OP_HQOS_READ_TREE 2560d00846d9SLukasz Plachno * VIRTCHNL_OP_HQOS_ELEM_ADD 2561d00846d9SLukasz Plachno * VIRTCHNL_OP_HQOS_ELEM_DEL 2562d00846d9SLukasz Plachno * VIRTCHNL_OP_HQOS_ELEM_BW_SET 2563d00846d9SLukasz Plachno * List with tc and queues HW QoS values 2564d00846d9SLukasz Plachno */ 2565d00846d9SLukasz Plachno struct virtchnl_hqos_cfg { 2566d00846d9SLukasz Plachno #define VIRTCHNL_HQOS_ELEM_TYPE_NODE 0 2567d00846d9SLukasz Plachno #define VIRTCHNL_HQOS_ELEM_TYPE_LEAF 1 2568d00846d9SLukasz Plachno u8 node_type; 2569d00846d9SLukasz Plachno u8 pad[7]; 2570d00846d9SLukasz Plachno u32 teid; 2571d00846d9SLukasz Plachno u32 parent_teid; 2572d00846d9SLukasz Plachno u64 tx_max; 2573d00846d9SLukasz Plachno u64 tx_share; 2574d00846d9SLukasz Plachno u32 tx_priority; 2575d00846d9SLukasz Plachno u32 tx_weight; 2576d00846d9SLukasz Plachno }; 2577d00846d9SLukasz Plachno VIRTCHNL_CHECK_STRUCT_LEN(40, virtchnl_hqos_cfg); 2578d00846d9SLukasz Plachno 2579d00846d9SLukasz Plachno struct virtchnl_hqos_cfg_list { 2580d00846d9SLukasz Plachno u16 num_elem; 2581d00846d9SLukasz Plachno u8 pad[6]; 2582d00846d9SLukasz Plachno struct virtchnl_hqos_cfg cfg[1]; 2583d00846d9SLukasz Plachno }; 2584d00846d9SLukasz Plachno VIRTCHNL_CHECK_STRUCT_LEN(48, virtchnl_hqos_cfg_list); 2585d00846d9SLukasz Plachno 2586691ad362SQi Zhang /* Since VF messages are limited by u16 size, precalculate the maximum possible 2587691ad362SQi Zhang * values of nested elements in virtchnl structures that virtual channel can 2588691ad362SQi Zhang * possibly handle in a single message. 2589691ad362SQi Zhang */ 2590691ad362SQi Zhang enum virtchnl_vector_limits { 2591691ad362SQi Zhang VIRTCHNL_OP_CONFIG_VSI_QUEUES_MAX = 2592691ad362SQi Zhang ((u16)(~0) - sizeof(struct virtchnl_vsi_queue_config_info)) / 2593691ad362SQi Zhang sizeof(struct virtchnl_queue_pair_info), 2594691ad362SQi Zhang 2595691ad362SQi Zhang VIRTCHNL_OP_CONFIG_IRQ_MAP_MAX = 2596691ad362SQi Zhang ((u16)(~0) - sizeof(struct virtchnl_irq_map_info)) / 2597691ad362SQi Zhang sizeof(struct virtchnl_vector_map), 2598691ad362SQi Zhang 2599691ad362SQi Zhang VIRTCHNL_OP_ADD_DEL_ETH_ADDR_MAX = 2600691ad362SQi Zhang ((u16)(~0) - sizeof(struct virtchnl_ether_addr_list)) / 2601691ad362SQi Zhang sizeof(struct virtchnl_ether_addr), 2602691ad362SQi Zhang 2603691ad362SQi Zhang VIRTCHNL_OP_ADD_DEL_VLAN_MAX = 2604691ad362SQi Zhang ((u16)(~0) - sizeof(struct virtchnl_vlan_filter_list)) / 2605691ad362SQi Zhang sizeof(u16), 2606691ad362SQi Zhang 2607691ad362SQi Zhang 2608691ad362SQi Zhang VIRTCHNL_OP_ENABLE_CHANNELS_MAX = 2609691ad362SQi Zhang ((u16)(~0) - sizeof(struct virtchnl_tc_info)) / 2610691ad362SQi Zhang sizeof(struct virtchnl_channel_info), 2611691ad362SQi Zhang 2612691ad362SQi Zhang VIRTCHNL_OP_ENABLE_DISABLE_DEL_QUEUES_V2_MAX = 2613691ad362SQi Zhang ((u16)(~0) - sizeof(struct virtchnl_del_ena_dis_queues)) / 2614691ad362SQi Zhang sizeof(struct virtchnl_queue_chunk), 2615691ad362SQi Zhang 2616691ad362SQi Zhang VIRTCHNL_OP_MAP_UNMAP_QUEUE_VECTOR_MAX = 2617691ad362SQi Zhang ((u16)(~0) - sizeof(struct virtchnl_queue_vector_maps)) / 2618691ad362SQi Zhang sizeof(struct virtchnl_queue_vector), 261986edb0bdSQi Zhang 262086edb0bdSQi Zhang VIRTCHNL_OP_ADD_DEL_VLAN_V2_MAX = 262186edb0bdSQi Zhang ((u16)(~0) - sizeof(struct virtchnl_vlan_filter_list_v2)) / 262286edb0bdSQi Zhang sizeof(struct virtchnl_vlan_filter), 2623d00846d9SLukasz Plachno 2624d00846d9SLukasz Plachno VIRTCHNL_OP_HQOS_ELEMS_MAX = 2625d00846d9SLukasz Plachno ((u16)(~0) - sizeof(struct virtchnl_hqos_cfg_list)) / 2626d00846d9SLukasz Plachno sizeof(struct virtchnl_hqos_cfg), 2627691ad362SQi Zhang }; 2628691ad362SQi Zhang 262989214fe9SHaiyue Wang /** 263089214fe9SHaiyue Wang * virtchnl_vc_validate_vf_msg 263189214fe9SHaiyue Wang * @ver: Virtchnl version info 263289214fe9SHaiyue Wang * @v_opcode: Opcode for the message 263389214fe9SHaiyue Wang * @msg: pointer to the msg buffer 263489214fe9SHaiyue Wang * @msglen: msg length 263589214fe9SHaiyue Wang * 263689214fe9SHaiyue Wang * validate msg format against struct for each opcode 263789214fe9SHaiyue Wang */ 263889214fe9SHaiyue Wang static inline int 263989214fe9SHaiyue Wang virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode, 264089214fe9SHaiyue Wang u8 *msg, u16 msglen) 264189214fe9SHaiyue Wang { 264289214fe9SHaiyue Wang bool err_msg_format = false; 264357094d59SQi Zhang u32 valid_len = 0; 264489214fe9SHaiyue Wang 264589214fe9SHaiyue Wang /* Validate message length. */ 264689214fe9SHaiyue Wang switch (v_opcode) { 264789214fe9SHaiyue Wang case VIRTCHNL_OP_VERSION: 264889214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_version_info); 264989214fe9SHaiyue Wang break; 265089214fe9SHaiyue Wang case VIRTCHNL_OP_RESET_VF: 265189214fe9SHaiyue Wang break; 265289214fe9SHaiyue Wang case VIRTCHNL_OP_GET_VF_RESOURCES: 265389214fe9SHaiyue Wang if (VF_IS_V11(ver)) 265489214fe9SHaiyue Wang valid_len = sizeof(u32); 265589214fe9SHaiyue Wang break; 265689214fe9SHaiyue Wang case VIRTCHNL_OP_CONFIG_TX_QUEUE: 265789214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_txq_info); 265889214fe9SHaiyue Wang break; 265989214fe9SHaiyue Wang case VIRTCHNL_OP_CONFIG_RX_QUEUE: 266089214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_rxq_info); 266189214fe9SHaiyue Wang break; 266289214fe9SHaiyue Wang case VIRTCHNL_OP_CONFIG_VSI_QUEUES: 266389214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_vsi_queue_config_info); 266489214fe9SHaiyue Wang if (msglen >= valid_len) { 266589214fe9SHaiyue Wang struct virtchnl_vsi_queue_config_info *vqc = 266689214fe9SHaiyue Wang (struct virtchnl_vsi_queue_config_info *)msg; 266789214fe9SHaiyue Wang 266889214fe9SHaiyue Wang if (vqc->num_queue_pairs == 0 || vqc->num_queue_pairs > 266989214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_VSI_QUEUES_MAX) { 267089214fe9SHaiyue Wang err_msg_format = true; 267189214fe9SHaiyue Wang break; 267289214fe9SHaiyue Wang } 267389214fe9SHaiyue Wang 267489214fe9SHaiyue Wang valid_len += (vqc->num_queue_pairs * 267589214fe9SHaiyue Wang sizeof(struct 267689214fe9SHaiyue Wang virtchnl_queue_pair_info)); 267789214fe9SHaiyue Wang } 267889214fe9SHaiyue Wang break; 267989214fe9SHaiyue Wang case VIRTCHNL_OP_CONFIG_IRQ_MAP: 268089214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_irq_map_info); 268189214fe9SHaiyue Wang if (msglen >= valid_len) { 268289214fe9SHaiyue Wang struct virtchnl_irq_map_info *vimi = 268389214fe9SHaiyue Wang (struct virtchnl_irq_map_info *)msg; 268489214fe9SHaiyue Wang 268589214fe9SHaiyue Wang if (vimi->num_vectors == 0 || vimi->num_vectors > 268689214fe9SHaiyue Wang VIRTCHNL_OP_CONFIG_IRQ_MAP_MAX) { 268789214fe9SHaiyue Wang err_msg_format = true; 268889214fe9SHaiyue Wang break; 268989214fe9SHaiyue Wang } 269089214fe9SHaiyue Wang 269189214fe9SHaiyue Wang valid_len += (vimi->num_vectors * 269289214fe9SHaiyue Wang sizeof(struct virtchnl_vector_map)); 269389214fe9SHaiyue Wang } 269489214fe9SHaiyue Wang break; 269589214fe9SHaiyue Wang case VIRTCHNL_OP_ENABLE_QUEUES: 269689214fe9SHaiyue Wang case VIRTCHNL_OP_DISABLE_QUEUES: 269789214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_queue_select); 269889214fe9SHaiyue Wang break; 2699691ad362SQi Zhang case VIRTCHNL_OP_GET_MAX_RSS_QREGION: 2700691ad362SQi Zhang break; 270189214fe9SHaiyue Wang case VIRTCHNL_OP_ADD_ETH_ADDR: 270289214fe9SHaiyue Wang case VIRTCHNL_OP_DEL_ETH_ADDR: 270389214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_ether_addr_list); 270489214fe9SHaiyue Wang if (msglen >= valid_len) { 270589214fe9SHaiyue Wang struct virtchnl_ether_addr_list *veal = 270689214fe9SHaiyue Wang (struct virtchnl_ether_addr_list *)msg; 270789214fe9SHaiyue Wang 270889214fe9SHaiyue Wang if (veal->num_elements == 0 || veal->num_elements > 270989214fe9SHaiyue Wang VIRTCHNL_OP_ADD_DEL_ETH_ADDR_MAX) { 271089214fe9SHaiyue Wang err_msg_format = true; 271189214fe9SHaiyue Wang break; 271289214fe9SHaiyue Wang } 271389214fe9SHaiyue Wang 271489214fe9SHaiyue Wang valid_len += veal->num_elements * 271589214fe9SHaiyue Wang sizeof(struct virtchnl_ether_addr); 271689214fe9SHaiyue Wang } 271789214fe9SHaiyue Wang break; 271889214fe9SHaiyue Wang case VIRTCHNL_OP_ADD_VLAN: 271989214fe9SHaiyue Wang case VIRTCHNL_OP_DEL_VLAN: 272089214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_vlan_filter_list); 272189214fe9SHaiyue Wang if (msglen >= valid_len) { 272289214fe9SHaiyue Wang struct virtchnl_vlan_filter_list *vfl = 272389214fe9SHaiyue Wang (struct virtchnl_vlan_filter_list *)msg; 272489214fe9SHaiyue Wang 272589214fe9SHaiyue Wang if (vfl->num_elements == 0 || vfl->num_elements > 272689214fe9SHaiyue Wang VIRTCHNL_OP_ADD_DEL_VLAN_MAX) { 272789214fe9SHaiyue Wang err_msg_format = true; 272889214fe9SHaiyue Wang break; 272989214fe9SHaiyue Wang } 273089214fe9SHaiyue Wang 273189214fe9SHaiyue Wang valid_len += vfl->num_elements * sizeof(u16); 273289214fe9SHaiyue Wang } 273389214fe9SHaiyue Wang break; 273489214fe9SHaiyue Wang case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: 273589214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_promisc_info); 273689214fe9SHaiyue Wang break; 273789214fe9SHaiyue Wang case VIRTCHNL_OP_GET_STATS: 273889214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_queue_select); 273989214fe9SHaiyue Wang break; 274089214fe9SHaiyue Wang case VIRTCHNL_OP_CONFIG_RSS_KEY: 274189214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_rss_key); 274289214fe9SHaiyue Wang if (msglen >= valid_len) { 274389214fe9SHaiyue Wang struct virtchnl_rss_key *vrk = 274489214fe9SHaiyue Wang (struct virtchnl_rss_key *)msg; 274589214fe9SHaiyue Wang 274689214fe9SHaiyue Wang if (vrk->key_len == 0) { 274789214fe9SHaiyue Wang /* zero length is allowed as input */ 274889214fe9SHaiyue Wang break; 274989214fe9SHaiyue Wang } 275089214fe9SHaiyue Wang 275189214fe9SHaiyue Wang valid_len += vrk->key_len - 1; 275289214fe9SHaiyue Wang } 275389214fe9SHaiyue Wang break; 275489214fe9SHaiyue Wang case VIRTCHNL_OP_CONFIG_RSS_LUT: 275589214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_rss_lut); 275689214fe9SHaiyue Wang if (msglen >= valid_len) { 275789214fe9SHaiyue Wang struct virtchnl_rss_lut *vrl = 275889214fe9SHaiyue Wang (struct virtchnl_rss_lut *)msg; 275989214fe9SHaiyue Wang 276089214fe9SHaiyue Wang if (vrl->lut_entries == 0) { 276189214fe9SHaiyue Wang /* zero entries is allowed as input */ 276289214fe9SHaiyue Wang break; 276389214fe9SHaiyue Wang } 276489214fe9SHaiyue Wang 276589214fe9SHaiyue Wang valid_len += vrl->lut_entries - 1; 276689214fe9SHaiyue Wang } 276789214fe9SHaiyue Wang break; 2768*2381def4SAhmed Zaki case VIRTCHNL_OP_CONFIG_RSS_HFUNC: 2769*2381def4SAhmed Zaki valid_len = sizeof(struct virtchnl_rss_hfunc); 2770*2381def4SAhmed Zaki break; 277189214fe9SHaiyue Wang case VIRTCHNL_OP_GET_RSS_HENA_CAPS: 277289214fe9SHaiyue Wang break; 277389214fe9SHaiyue Wang case VIRTCHNL_OP_SET_RSS_HENA: 277489214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_rss_hena); 277589214fe9SHaiyue Wang break; 277689214fe9SHaiyue Wang case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING: 277789214fe9SHaiyue Wang case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING: 277889214fe9SHaiyue Wang break; 277989214fe9SHaiyue Wang case VIRTCHNL_OP_REQUEST_QUEUES: 278089214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_vf_res_request); 278189214fe9SHaiyue Wang break; 278289214fe9SHaiyue Wang case VIRTCHNL_OP_ENABLE_CHANNELS: 278389214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_tc_info); 278489214fe9SHaiyue Wang if (msglen >= valid_len) { 278589214fe9SHaiyue Wang struct virtchnl_tc_info *vti = 278689214fe9SHaiyue Wang (struct virtchnl_tc_info *)msg; 278789214fe9SHaiyue Wang 278889214fe9SHaiyue Wang if (vti->num_tc == 0 || vti->num_tc > 278989214fe9SHaiyue Wang VIRTCHNL_OP_ENABLE_CHANNELS_MAX) { 279089214fe9SHaiyue Wang err_msg_format = true; 279189214fe9SHaiyue Wang break; 279289214fe9SHaiyue Wang } 279389214fe9SHaiyue Wang 279489214fe9SHaiyue Wang valid_len += (vti->num_tc - 1) * 279589214fe9SHaiyue Wang sizeof(struct virtchnl_channel_info); 279689214fe9SHaiyue Wang } 279789214fe9SHaiyue Wang break; 279889214fe9SHaiyue Wang case VIRTCHNL_OP_DISABLE_CHANNELS: 279989214fe9SHaiyue Wang break; 280089214fe9SHaiyue Wang case VIRTCHNL_OP_ADD_CLOUD_FILTER: 280189214fe9SHaiyue Wang case VIRTCHNL_OP_DEL_CLOUD_FILTER: 280289214fe9SHaiyue Wang valid_len = sizeof(struct virtchnl_filter); 280389214fe9SHaiyue Wang break; 28044b4d2affSQi Zhang case VIRTCHNL_OP_DCF_VLAN_OFFLOAD: 28054b4d2affSQi Zhang valid_len = sizeof(struct virtchnl_dcf_vlan_offload); 28064b4d2affSQi Zhang break; 28074831dfa1SQi Zhang case VIRTCHNL_OP_DCF_CMD_DESC: 28084831dfa1SQi Zhang case VIRTCHNL_OP_DCF_CMD_BUFF: 28094831dfa1SQi Zhang /* These two opcodes are specific to handle the AdminQ command, 28104831dfa1SQi Zhang * so the validation needs to be done in PF's context. 28114831dfa1SQi Zhang */ 2812a8593fe8SQi Zhang valid_len = msglen; 2813a8593fe8SQi Zhang break; 2814ddfd1f9bSQi Zhang case VIRTCHNL_OP_DCF_DISABLE: 2815109e2abbSQi Zhang case VIRTCHNL_OP_DCF_GET_VSI_MAP: 2816f5cd3a9fSQi Zhang case VIRTCHNL_OP_DCF_GET_PKG_INFO: 2817f5cd3a9fSQi Zhang break; 28186b62423fSTing Xu case VIRTCHNL_OP_DCF_CONFIG_BW: 28196b62423fSTing Xu valid_len = sizeof(struct virtchnl_dcf_bw_cfg_list); 28206b62423fSTing Xu if (msglen >= valid_len) { 28216b62423fSTing Xu struct virtchnl_dcf_bw_cfg_list *cfg_list = 28226b62423fSTing Xu (struct virtchnl_dcf_bw_cfg_list *)msg; 28236b62423fSTing Xu if (cfg_list->num_elem == 0) { 28246b62423fSTing Xu err_msg_format = true; 28256b62423fSTing Xu break; 28266b62423fSTing Xu } 28276b62423fSTing Xu valid_len += (cfg_list->num_elem - 1) * 28286b62423fSTing Xu sizeof(struct virtchnl_dcf_bw_cfg); 28296b62423fSTing Xu } 28306b62423fSTing Xu break; 2831a8180656SQi Zhang case VIRTCHNL_OP_GET_SUPPORTED_RXDIDS: 2832a8180656SQi Zhang break; 283357094d59SQi Zhang case VIRTCHNL_OP_ADD_RSS_CFG: 283457094d59SQi Zhang case VIRTCHNL_OP_DEL_RSS_CFG: 283557094d59SQi Zhang valid_len = sizeof(struct virtchnl_rss_cfg); 283657094d59SQi Zhang break; 283702ec7cf6SQi Zhang case VIRTCHNL_OP_ADD_FDIR_FILTER: 283802ec7cf6SQi Zhang valid_len = sizeof(struct virtchnl_fdir_add); 283902ec7cf6SQi Zhang break; 284002ec7cf6SQi Zhang case VIRTCHNL_OP_DEL_FDIR_FILTER: 284102ec7cf6SQi Zhang valid_len = sizeof(struct virtchnl_fdir_del); 284202ec7cf6SQi Zhang break; 2843096c2190SJie Wang case VIRTCHNL_OP_FLOW_SUBSCRIBE: 2844096c2190SJie Wang valid_len = sizeof(struct virtchnl_flow_sub); 2845096c2190SJie Wang break; 2846096c2190SJie Wang case VIRTCHNL_OP_FLOW_UNSUBSCRIBE: 2847096c2190SJie Wang valid_len = sizeof(struct virtchnl_flow_unsub); 2848096c2190SJie Wang break; 28496b62423fSTing Xu case VIRTCHNL_OP_GET_QOS_CAPS: 28506b62423fSTing Xu break; 28516b62423fSTing Xu case VIRTCHNL_OP_CONFIG_QUEUE_TC_MAP: 28526b62423fSTing Xu valid_len = sizeof(struct virtchnl_queue_tc_mapping); 28536b62423fSTing Xu if (msglen >= valid_len) { 28546b62423fSTing Xu struct virtchnl_queue_tc_mapping *q_tc = 28556b62423fSTing Xu (struct virtchnl_queue_tc_mapping *)msg; 28566b62423fSTing Xu if (q_tc->num_tc == 0) { 28576b62423fSTing Xu err_msg_format = true; 28586b62423fSTing Xu break; 28596b62423fSTing Xu } 28606b62423fSTing Xu valid_len += (q_tc->num_tc - 1) * 28616b62423fSTing Xu sizeof(q_tc->tc[0]); 28626b62423fSTing Xu } 28636b62423fSTing Xu break; 28645779a889SWenjun Wu case VIRTCHNL_OP_CONFIG_QUEUE_BW: 28655779a889SWenjun Wu valid_len = sizeof(struct virtchnl_queues_bw_cfg); 28665779a889SWenjun Wu if (msglen >= valid_len) { 28675779a889SWenjun Wu struct virtchnl_queues_bw_cfg *q_bw = 28685779a889SWenjun Wu (struct virtchnl_queues_bw_cfg *)msg; 28695779a889SWenjun Wu if (q_bw->num_queues == 0) { 28705779a889SWenjun Wu err_msg_format = true; 28715779a889SWenjun Wu break; 28725779a889SWenjun Wu } 28735779a889SWenjun Wu valid_len += (q_bw->num_queues - 1) * 28745779a889SWenjun Wu sizeof(q_bw->cfg[0]); 28755779a889SWenjun Wu } 28765779a889SWenjun Wu break; 2877b14e8a57SWenjun Wu case VIRTCHNL_OP_CONFIG_QUANTA: 2878b14e8a57SWenjun Wu valid_len = sizeof(struct virtchnl_quanta_cfg); 2879b14e8a57SWenjun Wu if (msglen >= valid_len) { 2880b14e8a57SWenjun Wu struct virtchnl_quanta_cfg *q_quanta = 2881b14e8a57SWenjun Wu (struct virtchnl_quanta_cfg *)msg; 2882b14e8a57SWenjun Wu if (q_quanta->quanta_size == 0 || 2883b14e8a57SWenjun Wu q_quanta->queue_select.num_queues == 0) { 2884b14e8a57SWenjun Wu err_msg_format = true; 2885b14e8a57SWenjun Wu break; 2886b14e8a57SWenjun Wu } 2887b14e8a57SWenjun Wu } 2888b14e8a57SWenjun Wu break; 288986edb0bdSQi Zhang case VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS: 289086edb0bdSQi Zhang break; 289186edb0bdSQi Zhang case VIRTCHNL_OP_ADD_VLAN_V2: 289286edb0bdSQi Zhang case VIRTCHNL_OP_DEL_VLAN_V2: 289386edb0bdSQi Zhang valid_len = sizeof(struct virtchnl_vlan_filter_list_v2); 289486edb0bdSQi Zhang if (msglen >= valid_len) { 289586edb0bdSQi Zhang struct virtchnl_vlan_filter_list_v2 *vfl = 289686edb0bdSQi Zhang (struct virtchnl_vlan_filter_list_v2 *)msg; 289786edb0bdSQi Zhang 289886edb0bdSQi Zhang if (vfl->num_elements == 0 || vfl->num_elements > 289986edb0bdSQi Zhang VIRTCHNL_OP_ADD_DEL_VLAN_V2_MAX) { 290086edb0bdSQi Zhang err_msg_format = true; 290186edb0bdSQi Zhang break; 290286edb0bdSQi Zhang } 290386edb0bdSQi Zhang 290486edb0bdSQi Zhang valid_len += (vfl->num_elements - 1) * 290586edb0bdSQi Zhang sizeof(struct virtchnl_vlan_filter); 290686edb0bdSQi Zhang } 290786edb0bdSQi Zhang break; 290886edb0bdSQi Zhang case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING_V2: 290986edb0bdSQi Zhang case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING_V2: 291086edb0bdSQi Zhang case VIRTCHNL_OP_ENABLE_VLAN_INSERTION_V2: 291186edb0bdSQi Zhang case VIRTCHNL_OP_DISABLE_VLAN_INSERTION_V2: 29126247f281SHaiyue Wang case VIRTCHNL_OP_ENABLE_VLAN_FILTERING_V2: 29136247f281SHaiyue Wang case VIRTCHNL_OP_DISABLE_VLAN_FILTERING_V2: 29146247f281SHaiyue Wang valid_len = sizeof(struct virtchnl_vlan_setting); 291586edb0bdSQi Zhang break; 291690160401SSimei Su case VIRTCHNL_OP_1588_PTP_GET_CAPS: 291790160401SSimei Su valid_len = sizeof(struct virtchnl_ptp_caps); 291890160401SSimei Su break; 291990160401SSimei Su case VIRTCHNL_OP_1588_PTP_GET_TIME: 292090160401SSimei Su valid_len = sizeof(struct virtchnl_phc_time); 292190160401SSimei Su break; 2922286e99f3SJacob Keller case VIRTCHNL_OP_1588_PTP_SET_TIME: 2923286e99f3SJacob Keller valid_len = sizeof(struct virtchnl_phc_time); 2924286e99f3SJacob Keller break; 2925286e99f3SJacob Keller case VIRTCHNL_OP_1588_PTP_ADJ_TIME: 2926286e99f3SJacob Keller valid_len = sizeof(struct virtchnl_phc_adj_time); 2927286e99f3SJacob Keller break; 2928286e99f3SJacob Keller case VIRTCHNL_OP_1588_PTP_ADJ_FREQ: 2929286e99f3SJacob Keller valid_len = sizeof(struct virtchnl_phc_adj_freq); 2930286e99f3SJacob Keller break; 2931286e99f3SJacob Keller case VIRTCHNL_OP_1588_PTP_TX_TIMESTAMP: 2932286e99f3SJacob Keller valid_len = sizeof(struct virtchnl_phc_tx_tstamp); 2933286e99f3SJacob Keller break; 2934886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_PHY_REC_CLK_OUT: 2935886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_get_phy_rec_clk_out); 2936886cc4b8SPiotr Gardocki break; 2937886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_PHY_REC_CLK_OUT: 2938886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_set_phy_rec_clk_out); 2939886cc4b8SPiotr Gardocki break; 2940886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_CGU_REF_PRIO: 2941886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_get_cgu_ref_prio); 2942886cc4b8SPiotr Gardocki break; 2943886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_CGU_REF_PRIO: 2944886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_set_cgu_ref_prio); 2945886cc4b8SPiotr Gardocki break; 2946886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_INPUT_PIN_CFG: 2947886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_get_input_pin_cfg); 2948886cc4b8SPiotr Gardocki break; 2949886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_INPUT_PIN_CFG: 2950886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_set_input_pin_cfg); 2951886cc4b8SPiotr Gardocki break; 2952886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_OUTPUT_PIN_CFG: 2953886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_get_output_pin_cfg); 2954886cc4b8SPiotr Gardocki break; 2955886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_OUTPUT_PIN_CFG: 2956886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_set_output_pin_cfg); 2957886cc4b8SPiotr Gardocki break; 2958886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_CGU_ABILITIES: 2959886cc4b8SPiotr Gardocki break; 2960886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_CGU_DPLL_STATUS: 2961886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_get_cgu_dpll_status); 2962886cc4b8SPiotr Gardocki break; 2963886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_SET_CGU_DPLL_CONFIG: 2964886cc4b8SPiotr Gardocki valid_len = sizeof(struct virtchnl_synce_set_cgu_dpll_config); 2965886cc4b8SPiotr Gardocki break; 2966886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_CGU_INFO: 2967886cc4b8SPiotr Gardocki break; 2968886cc4b8SPiotr Gardocki case VIRTCHNL_OP_SYNCE_GET_HW_INFO: 2969886cc4b8SPiotr Gardocki break; 297070250571SJun Zhang case VIRTCHNL_OP_GNSS_READ_I2C: 297170250571SJun Zhang valid_len = sizeof(struct virtchnl_gnss_i2c); 297270250571SJun Zhang break; 297370250571SJun Zhang case VIRTCHNL_OP_GNSS_WRITE_I2C: 297470250571SJun Zhang valid_len = sizeof(struct virtchnl_gnss_i2c); 297570250571SJun Zhang break; 2976691ad362SQi Zhang case VIRTCHNL_OP_ENABLE_QUEUES_V2: 2977691ad362SQi Zhang case VIRTCHNL_OP_DISABLE_QUEUES_V2: 2978691ad362SQi Zhang valid_len = sizeof(struct virtchnl_del_ena_dis_queues); 2979691ad362SQi Zhang if (msglen >= valid_len) { 2980691ad362SQi Zhang struct virtchnl_del_ena_dis_queues *qs = 2981691ad362SQi Zhang (struct virtchnl_del_ena_dis_queues *)msg; 2982691ad362SQi Zhang if (qs->chunks.num_chunks == 0 || 2983691ad362SQi Zhang qs->chunks.num_chunks > VIRTCHNL_OP_ENABLE_DISABLE_DEL_QUEUES_V2_MAX) { 2984691ad362SQi Zhang err_msg_format = true; 2985691ad362SQi Zhang break; 2986691ad362SQi Zhang } 2987691ad362SQi Zhang valid_len += (qs->chunks.num_chunks - 1) * 2988691ad362SQi Zhang sizeof(struct virtchnl_queue_chunk); 2989691ad362SQi Zhang } 2990691ad362SQi Zhang break; 2991691ad362SQi Zhang case VIRTCHNL_OP_MAP_QUEUE_VECTOR: 2992691ad362SQi Zhang valid_len = sizeof(struct virtchnl_queue_vector_maps); 2993691ad362SQi Zhang if (msglen >= valid_len) { 2994691ad362SQi Zhang struct virtchnl_queue_vector_maps *v_qp = 2995691ad362SQi Zhang (struct virtchnl_queue_vector_maps *)msg; 2996691ad362SQi Zhang if (v_qp->num_qv_maps == 0 || 2997691ad362SQi Zhang v_qp->num_qv_maps > VIRTCHNL_OP_MAP_UNMAP_QUEUE_VECTOR_MAX) { 2998691ad362SQi Zhang err_msg_format = true; 2999691ad362SQi Zhang break; 3000691ad362SQi Zhang } 3001691ad362SQi Zhang valid_len += (v_qp->num_qv_maps - 1) * 3002691ad362SQi Zhang sizeof(struct virtchnl_queue_vector); 3003691ad362SQi Zhang } 3004691ad362SQi Zhang break; 3005993f0d4dSRadu Nicolau 3006993f0d4dSRadu Nicolau case VIRTCHNL_OP_INLINE_IPSEC_CRYPTO: 3007993f0d4dSRadu Nicolau { 3008993f0d4dSRadu Nicolau struct inline_ipsec_msg *iim = (struct inline_ipsec_msg *)msg; 3009993f0d4dSRadu Nicolau valid_len = 3010993f0d4dSRadu Nicolau virtchnl_inline_ipsec_val_msg_len(iim->ipsec_opcode); 3011993f0d4dSRadu Nicolau break; 3012993f0d4dSRadu Nicolau } 3013d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_ELEMS_ADD: 3014d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_ELEMS_DEL: 3015d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_ELEMS_MOVE: 3016d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_ELEMS_CONF: 3017d00846d9SLukasz Plachno valid_len = sizeof(struct virtchnl_hqos_cfg_list); 3018d00846d9SLukasz Plachno if (msglen >= valid_len) { 3019d00846d9SLukasz Plachno struct virtchnl_hqos_cfg_list *v_hcl = 3020d00846d9SLukasz Plachno (struct virtchnl_hqos_cfg_list *)msg; 3021d00846d9SLukasz Plachno if (v_hcl->num_elem == 0 || 3022d00846d9SLukasz Plachno v_hcl->num_elem > VIRTCHNL_OP_HQOS_ELEMS_MAX) { 3023d00846d9SLukasz Plachno err_msg_format = true; 3024d00846d9SLukasz Plachno break; 3025d00846d9SLukasz Plachno } 3026d00846d9SLukasz Plachno valid_len += (v_hcl->num_elem - 1) * 3027d00846d9SLukasz Plachno sizeof(struct virtchnl_hqos_cfg); 3028d00846d9SLukasz Plachno } 3029d00846d9SLukasz Plachno break; 3030d00846d9SLukasz Plachno case VIRTCHNL_OP_HQOS_TREE_READ: 3031d00846d9SLukasz Plachno break; 303289214fe9SHaiyue Wang /* These are always errors coming from the VF. */ 303389214fe9SHaiyue Wang case VIRTCHNL_OP_EVENT: 303489214fe9SHaiyue Wang case VIRTCHNL_OP_UNKNOWN: 303589214fe9SHaiyue Wang default: 303689214fe9SHaiyue Wang return VIRTCHNL_STATUS_ERR_PARAM; 303789214fe9SHaiyue Wang } 303889214fe9SHaiyue Wang /* few more checks */ 303989214fe9SHaiyue Wang if (err_msg_format || valid_len != msglen) 304089214fe9SHaiyue Wang return VIRTCHNL_STATUS_ERR_OPCODE_MISMATCH; 304189214fe9SHaiyue Wang 304289214fe9SHaiyue Wang return 0; 304389214fe9SHaiyue Wang } 304489214fe9SHaiyue Wang #endif /* _VIRTCHNL_H_ */ 3045