1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Cavium, Inc 3 */ 4 5 #ifndef _CPT_MCODE_DEFINES_H_ 6 #define _CPT_MCODE_DEFINES_H_ 7 8 #include <rte_byteorder.h> 9 #include <rte_crypto_asym.h> 10 #include <rte_memory.h> 11 12 /* 13 * This file defines macros and structures according to microcode spec 14 * 15 */ 16 /* SE opcodes */ 17 #define CPT_MAJOR_OP_FC 0x33 18 #define CPT_MAJOR_OP_HASH 0x34 19 #define CPT_MAJOR_OP_HMAC 0x35 20 #define CPT_MAJOR_OP_ZUC_SNOW3G 0x37 21 #define CPT_MAJOR_OP_KASUMI 0x38 22 #define CPT_MAJOR_OP_MISC 0x01 23 24 /* AE opcodes */ 25 #define CPT_MAJOR_OP_MODEX 0x03 26 #define CPT_MINOR_OP_MODEX 0x01 27 #define CPT_MINOR_OP_PKCS_ENC 0x02 28 #define CPT_MINOR_OP_PKCS_ENC_CRT 0x03 29 #define CPT_MINOR_OP_PKCS_DEC 0x04 30 #define CPT_MINOR_OP_PKCS_DEC_CRT 0x05 31 #define CPT_MINOR_OP_MODEX_CRT 0x06 32 33 #define CPT_BLOCK_TYPE1 0 34 #define CPT_BLOCK_TYPE2 1 35 36 #define CPT_BYTE_16 16 37 #define CPT_BYTE_24 24 38 #define CPT_BYTE_32 32 39 #define CPT_MAX_SG_IN_OUT_CNT 32 40 #define CPT_MAX_SG_CNT (CPT_MAX_SG_IN_OUT_CNT/2) 41 42 #define COMPLETION_CODE_SIZE 8 43 #define COMPLETION_CODE_INIT 0 44 45 #define SG_LIST_HDR_SIZE (8u) 46 #define SG_ENTRY_SIZE sizeof(sg_comp_t) 47 48 #define CPT_DMA_MODE (1 << 7) 49 50 #define CPT_FROM_CTX 0 51 #define CPT_FROM_DPTR 1 52 53 #define FC_GEN 0x1 54 #define ZUC_SNOW3G 0x2 55 #define KASUMI 0x3 56 #define HASH_HMAC 0x4 57 58 #define ZS_EA 0x1 59 #define ZS_IA 0x2 60 #define K_F8 0x4 61 #define K_F9 0x8 62 63 #define CPT_OP_CIPHER_ENCRYPT 0x1 64 #define CPT_OP_CIPHER_DECRYPT 0x2 65 #define CPT_OP_CIPHER_MASK 0x3 66 67 #define CPT_OP_AUTH_VERIFY 0x4 68 #define CPT_OP_AUTH_GENERATE 0x8 69 #define CPT_OP_AUTH_MASK 0xC 70 71 #define CPT_OP_ENCODE (CPT_OP_CIPHER_ENCRYPT | CPT_OP_AUTH_GENERATE) 72 #define CPT_OP_DECODE (CPT_OP_CIPHER_DECRYPT | CPT_OP_AUTH_VERIFY) 73 74 /* #define CPT_ALWAYS_USE_SG_MODE */ 75 #define CPT_ALWAYS_USE_SEPARATE_BUF 76 77 /* 78 * Parameters for Flexi Crypto 79 * requests 80 */ 81 #define VALID_AAD_BUF 0x01 82 #define VALID_MAC_BUF 0x02 83 #define VALID_IV_BUF 0x04 84 #define SINGLE_BUF_INPLACE 0x08 85 #define SINGLE_BUF_HEADTAILROOM 0x10 86 87 #define ENCR_IV_OFFSET(__d_offs) ((__d_offs >> 32) & 0xffff) 88 #define ENCR_OFFSET(__d_offs) ((__d_offs >> 16) & 0xffff) 89 #define AUTH_OFFSET(__d_offs) (__d_offs & 0xffff) 90 #define ENCR_DLEN(__d_lens) (__d_lens >> 32) 91 #define AUTH_DLEN(__d_lens) (__d_lens & 0xffffffff) 92 93 /* FC offset_control at start of DPTR in bytes */ 94 #define OFF_CTRL_LEN 8 /**< bytes */ 95 96 typedef enum { 97 MD5_TYPE = 1, 98 SHA1_TYPE = 2, 99 SHA2_SHA224 = 3, 100 SHA2_SHA256 = 4, 101 SHA2_SHA384 = 5, 102 SHA2_SHA512 = 6, 103 GMAC_TYPE = 7, 104 XCBC_TYPE = 8, 105 SHA3_SHA224 = 10, 106 SHA3_SHA256 = 11, 107 SHA3_SHA384 = 12, 108 SHA3_SHA512 = 13, 109 SHA3_SHAKE256 = 14, 110 SHA3_SHAKE512 = 15, 111 112 /* These are only for software use */ 113 ZUC_EIA3 = 0x90, 114 SNOW3G_UIA2 = 0x91, 115 KASUMI_F9_CBC = 0x92, 116 KASUMI_F9_ECB = 0x93, 117 } mc_hash_type_t; 118 119 typedef enum { 120 /* To support passthrough */ 121 PASSTHROUGH = 0x0, 122 /* 123 * These are defined by MC for Flexi crypto 124 * for field of 4 bits 125 */ 126 DES3_CBC = 0x1, 127 DES3_ECB = 0x2, 128 AES_CBC = 0x3, 129 AES_ECB = 0x4, 130 AES_CFB = 0x5, 131 AES_CTR = 0x6, 132 AES_GCM = 0x7, 133 AES_XTS = 0x8, 134 135 /* These are only for software use */ 136 ZUC_EEA3 = 0x90, 137 SNOW3G_UEA2 = 0x91, 138 KASUMI_F8_CBC = 0x92, 139 KASUMI_F8_ECB = 0x93, 140 } mc_cipher_type_t; 141 142 typedef enum { 143 AES_128_BIT = 0x1, 144 AES_192_BIT = 0x2, 145 AES_256_BIT = 0x3 146 } mc_aes_type_t; 147 148 typedef enum { 149 /* Microcode errors */ 150 NO_ERR = 0x00, 151 ERR_OPCODE_UNSUPPORTED = 0x01, 152 153 /* SCATTER GATHER */ 154 ERR_SCATTER_GATHER_WRITE_LENGTH = 0x02, 155 ERR_SCATTER_GATHER_LIST = 0x03, 156 ERR_SCATTER_GATHER_NOT_SUPPORTED = 0x04, 157 158 /* SE GC */ 159 ERR_GC_LENGTH_INVALID = 0x41, 160 ERR_GC_RANDOM_LEN_INVALID = 0x42, 161 ERR_GC_DATA_LEN_INVALID = 0x43, 162 ERR_GC_DRBG_TYPE_INVALID = 0x44, 163 ERR_GC_CTX_LEN_INVALID = 0x45, 164 ERR_GC_CIPHER_UNSUPPORTED = 0x46, 165 ERR_GC_AUTH_UNSUPPORTED = 0x47, 166 ERR_GC_OFFSET_INVALID = 0x48, 167 ERR_GC_HASH_MODE_UNSUPPORTED = 0x49, 168 ERR_GC_DRBG_ENTROPY_LEN_INVALID = 0x4a, 169 ERR_GC_DRBG_ADDNL_LEN_INVALID = 0x4b, 170 ERR_GC_ICV_MISCOMPARE = 0x4c, 171 ERR_GC_DATA_UNALIGNED = 0x4d, 172 173 /* API Layer */ 174 ERR_BAD_ALT_CCODE = 0xfd, 175 ERR_REQ_PENDING = 0xfe, 176 ERR_REQ_TIMEOUT = 0xff, 177 178 ERR_BAD_INPUT_LENGTH = (0x40000000 | 384), /* 0x40000180 */ 179 ERR_BAD_KEY_LENGTH, 180 ERR_BAD_KEY_HANDLE, 181 ERR_BAD_CONTEXT_HANDLE, 182 ERR_BAD_SCALAR_LENGTH, 183 ERR_BAD_DIGEST_LENGTH, 184 ERR_BAD_INPUT_ARG, 185 ERR_BAD_RECORD_PADDING, 186 ERR_NB_REQUEST_PENDING, 187 ERR_EIO, 188 ERR_ENODEV, 189 } mc_error_code_t; 190 191 /** 192 * Enumeration cpt_comp_e 193 * 194 * CPT Completion Enumeration 195 * Enumerates the values of CPT_RES_S[COMPCODE]. 196 */ 197 typedef enum { 198 CPT_8X_COMP_E_NOTDONE = (0x00), 199 CPT_8X_COMP_E_GOOD = (0x01), 200 CPT_8X_COMP_E_FAULT = (0x02), 201 CPT_8X_COMP_E_SWERR = (0x03), 202 CPT_8X_COMP_E_HWERR = (0x04), 203 CPT_8X_COMP_E_LAST_ENTRY = (0xFF) 204 } cpt_comp_e_t; 205 206 typedef struct sglist_comp { 207 union { 208 uint64_t len; 209 struct { 210 uint16_t len[4]; 211 } s; 212 } u; 213 uint64_t ptr[4]; 214 } sg_comp_t; 215 216 struct cpt_sess_misc { 217 /** CPT opcode */ 218 uint16_t cpt_op:4; 219 /** ZUC, SNOW3G & KASUMI flags */ 220 uint16_t zsk_flag:4; 221 /** Flag for AES GCM */ 222 uint16_t aes_gcm:1; 223 /** Flag for AES CTR */ 224 uint16_t aes_ctr:1; 225 /** Flag for NULL cipher/auth */ 226 uint16_t is_null:1; 227 /** Flag for GMAC */ 228 uint16_t is_gmac:1; 229 /** Engine group */ 230 uint16_t egrp:3; 231 /** AAD length */ 232 uint16_t aad_length; 233 /** MAC len in bytes */ 234 uint8_t mac_len; 235 /** IV length in bytes */ 236 uint8_t iv_length; 237 /** Auth IV length in bytes */ 238 uint8_t auth_iv_length; 239 /** Reserved field */ 240 uint8_t rsvd1; 241 /** IV offset in bytes */ 242 uint16_t iv_offset; 243 /** Auth IV offset in bytes */ 244 uint16_t auth_iv_offset; 245 /** Salt */ 246 uint32_t salt; 247 /** Context DMA address */ 248 phys_addr_t ctx_dma_addr; 249 }; 250 251 typedef union { 252 uint64_t flags; 253 struct { 254 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN 255 uint64_t enc_cipher : 4; 256 uint64_t reserved1 : 1; 257 uint64_t aes_key : 2; 258 uint64_t iv_source : 1; 259 uint64_t hash_type : 4; 260 uint64_t reserved2 : 3; 261 uint64_t auth_input_type : 1; 262 uint64_t mac_len : 8; 263 uint64_t reserved3 : 8; 264 uint64_t encr_offset : 16; 265 uint64_t iv_offset : 8; 266 uint64_t auth_offset : 8; 267 #else 268 uint64_t auth_offset : 8; 269 uint64_t iv_offset : 8; 270 uint64_t encr_offset : 16; 271 uint64_t reserved3 : 8; 272 uint64_t mac_len : 8; 273 uint64_t auth_input_type : 1; 274 uint64_t reserved2 : 3; 275 uint64_t hash_type : 4; 276 uint64_t iv_source : 1; 277 uint64_t aes_key : 2; 278 uint64_t reserved1 : 1; 279 uint64_t enc_cipher : 4; 280 #endif 281 } e; 282 } encr_ctrl_t; 283 284 typedef struct { 285 encr_ctrl_t enc_ctrl; 286 uint8_t encr_key[32]; 287 uint8_t encr_iv[16]; 288 } mc_enc_context_t; 289 290 typedef struct { 291 uint8_t ipad[64]; 292 uint8_t opad[64]; 293 } mc_fc_hmac_context_t; 294 295 typedef struct { 296 mc_enc_context_t enc; 297 mc_fc_hmac_context_t hmac; 298 } mc_fc_context_t; 299 300 typedef struct { 301 uint8_t encr_auth_iv[16]; 302 uint8_t ci_key[16]; 303 uint8_t zuc_const[32]; 304 } mc_zuc_snow3g_ctx_t; 305 306 typedef struct { 307 uint8_t reg_A[8]; 308 uint8_t ci_key[16]; 309 } mc_kasumi_ctx_t; 310 311 struct cpt_ctx { 312 /* Below fields are accessed by sw */ 313 uint64_t enc_cipher :8; 314 uint64_t hash_type :8; 315 uint64_t mac_len :8; 316 uint64_t auth_key_len :8; 317 uint64_t fc_type :4; 318 uint64_t hmac :1; 319 uint64_t zsk_flags :3; 320 uint64_t k_ecb :1; 321 uint64_t snow3g :2; 322 uint64_t rsvd :21; 323 /* Below fields are accessed by hardware */ 324 union { 325 mc_fc_context_t fctx; 326 mc_zuc_snow3g_ctx_t zs_ctx; 327 mc_kasumi_ctx_t k_ctx; 328 }; 329 uint8_t auth_key[64]; 330 }; 331 332 struct cpt_asym_sess_misc { 333 enum rte_crypto_asym_xform_type xfrm_type; 334 union { 335 struct rte_crypto_rsa_xform rsa_ctx; 336 struct rte_crypto_modex_xform mod_ctx; 337 }; 338 }; 339 340 /* Buffer pointer */ 341 typedef struct buf_ptr { 342 void *vaddr; 343 phys_addr_t dma_addr; 344 uint32_t size; 345 uint32_t resv; 346 } buf_ptr_t; 347 348 /* IOV Pointer */ 349 typedef struct{ 350 int buf_cnt; 351 buf_ptr_t bufs[0]; 352 } iov_ptr_t; 353 354 typedef union opcode_info { 355 uint16_t flags; 356 struct { 357 uint8_t major; 358 uint8_t minor; 359 } s; 360 } opcode_info_t; 361 362 typedef struct fc_params { 363 /* 0th cache line */ 364 union { 365 buf_ptr_t bufs[1]; 366 struct { 367 iov_ptr_t *src_iov; 368 iov_ptr_t *dst_iov; 369 }; 370 }; 371 void *iv_buf; 372 void *auth_iv_buf; 373 buf_ptr_t meta_buf; 374 buf_ptr_t ctx_buf; 375 uint64_t rsvd2; 376 377 /* 1st cache line */ 378 buf_ptr_t aad_buf; 379 buf_ptr_t mac_buf; 380 381 } fc_params_t; 382 383 /* 384 * Parameters for asymmetric operations 385 */ 386 struct asym_op_params { 387 struct cpt_request_info *req; 388 phys_addr_t meta_buf; 389 }; 390 391 /* 392 * Parameters for digest 393 * generate requests 394 * Only src_iov, op, ctx_buf, mac_buf, prep_req 395 * meta_buf, auth_data_len are used for digest gen. 396 */ 397 typedef struct fc_params digest_params_t; 398 399 /* Cipher Algorithms */ 400 typedef mc_cipher_type_t cipher_type_t; 401 402 /* Auth Algorithms */ 403 typedef mc_hash_type_t auth_type_t; 404 405 /* Helper macros */ 406 407 #define CPT_P_ENC_CTRL(fctx) fctx->enc.enc_ctrl.e 408 409 #define SRC_IOV_SIZE \ 410 (sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT)) 411 #define DST_IOV_SIZE \ 412 (sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT)) 413 414 #define SESS_PRIV(__sess) \ 415 (void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc)) 416 417 /* 418 * Get the session size 419 * 420 * @return 421 * - session size 422 */ 423 static __rte_always_inline unsigned int 424 cpt_get_session_size(void) 425 { 426 unsigned int ctx_len = sizeof(struct cpt_ctx); 427 return (sizeof(struct cpt_sess_misc) + RTE_ALIGN_CEIL(ctx_len, 8)); 428 } 429 #endif /* _CPT_MCODE_DEFINES_H_ */ 430