xref: /dpdk/drivers/common/cpt/cpt_mcode_defines.h (revision 9c4491cf5c89a015cf358011151a92b9cba78560)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018 Cavium, Inc
3  */
4 
5 #ifndef _CPT_MCODE_DEFINES_H_
6 #define _CPT_MCODE_DEFINES_H_
7 
8 #include <rte_byteorder.h>
9 #include <rte_memory.h>
10 
11 /*
12  * This file defines macros and structures according to microcode spec
13  *
14  */
15 /* SE opcodes */
16 #define CPT_MAJOR_OP_FC		0x33
17 #define CPT_MAJOR_OP_HASH	0x34
18 #define CPT_MAJOR_OP_HMAC	0x35
19 #define CPT_MAJOR_OP_ZUC_SNOW3G	0x37
20 #define CPT_MAJOR_OP_KASUMI	0x38
21 #define CPT_MAJOR_OP_MISC	0x01
22 
23 #define CPT_BYTE_16		16
24 #define CPT_BYTE_24		24
25 #define CPT_BYTE_32		32
26 #define CPT_MAX_SG_IN_OUT_CNT	32
27 #define CPT_MAX_SG_CNT		(CPT_MAX_SG_IN_OUT_CNT/2)
28 
29 #define COMPLETION_CODE_SIZE	8
30 #define COMPLETION_CODE_INIT	0
31 
32 #define SG_LIST_HDR_SIZE	(8u)
33 #define SG_ENTRY_SIZE		sizeof(sg_comp_t)
34 
35 #define CPT_DMA_MODE		(1 << 7)
36 
37 #define CPT_FROM_CTX		0
38 #define CPT_FROM_DPTR		1
39 
40 #define FC_GEN			0x1
41 #define ZUC_SNOW3G		0x2
42 #define KASUMI			0x3
43 #define HASH_HMAC		0x4
44 
45 #define ZS_EA			0x1
46 #define ZS_IA			0x2
47 #define K_F8			0x4
48 #define K_F9			0x8
49 
50 #define CPT_OP_CIPHER_ENCRYPT	0x1
51 #define CPT_OP_CIPHER_DECRYPT	0x2
52 #define CPT_OP_CIPHER_MASK	0x3
53 
54 #define CPT_OP_AUTH_VERIFY	0x4
55 #define CPT_OP_AUTH_GENERATE	0x8
56 #define CPT_OP_AUTH_MASK	0xC
57 
58 #define CPT_OP_ENCODE	(CPT_OP_CIPHER_ENCRYPT | CPT_OP_AUTH_GENERATE)
59 #define CPT_OP_DECODE	(CPT_OP_CIPHER_DECRYPT | CPT_OP_AUTH_VERIFY)
60 
61 /* #define CPT_ALWAYS_USE_SG_MODE */
62 #define CPT_ALWAYS_USE_SEPARATE_BUF
63 
64 /*
65  * Parameters for Flexi Crypto
66  * requests
67  */
68 #define VALID_AAD_BUF 0x01
69 #define VALID_MAC_BUF 0x02
70 #define VALID_IV_BUF 0x04
71 #define SINGLE_BUF_INPLACE 0x08
72 #define SINGLE_BUF_HEADTAILROOM 0x10
73 
74 #define ENCR_IV_OFFSET(__d_offs) ((__d_offs >> 32) & 0xffff)
75 #define ENCR_OFFSET(__d_offs) ((__d_offs >> 16) & 0xffff)
76 #define AUTH_OFFSET(__d_offs) (__d_offs & 0xffff)
77 #define ENCR_DLEN(__d_lens) (__d_lens >> 32)
78 #define AUTH_DLEN(__d_lens) (__d_lens & 0xffffffff)
79 
80 /* FC offset_control at start of DPTR in bytes */
81 #define OFF_CTRL_LEN  8 /**< bytes */
82 
83 typedef enum {
84 	MD5_TYPE        = 1,
85 	SHA1_TYPE       = 2,
86 	SHA2_SHA224     = 3,
87 	SHA2_SHA256     = 4,
88 	SHA2_SHA384     = 5,
89 	SHA2_SHA512     = 6,
90 	GMAC_TYPE       = 7,
91 	XCBC_TYPE       = 8,
92 	SHA3_SHA224     = 10,
93 	SHA3_SHA256     = 11,
94 	SHA3_SHA384     = 12,
95 	SHA3_SHA512     = 13,
96 	SHA3_SHAKE256   = 14,
97 	SHA3_SHAKE512   = 15,
98 
99 	/* These are only for software use */
100 	ZUC_EIA3        = 0x90,
101 	SNOW3G_UIA2     = 0x91,
102 	KASUMI_F9_CBC   = 0x92,
103 	KASUMI_F9_ECB   = 0x93,
104 } mc_hash_type_t;
105 
106 typedef enum {
107 	/* To support passthrough */
108 	PASSTHROUGH  = 0x0,
109 	/*
110 	 * These are defined by MC for Flexi crypto
111 	 * for field of 4 bits
112 	 */
113 	DES3_CBC    = 0x1,
114 	DES3_ECB    = 0x2,
115 	AES_CBC     = 0x3,
116 	AES_ECB     = 0x4,
117 	AES_CFB     = 0x5,
118 	AES_CTR     = 0x6,
119 	AES_GCM     = 0x7,
120 	AES_XTS     = 0x8,
121 
122 	/* These are only for software use */
123 	ZUC_EEA3        = 0x90,
124 	SNOW3G_UEA2     = 0x91,
125 	KASUMI_F8_CBC   = 0x92,
126 	KASUMI_F8_ECB   = 0x93,
127 } mc_cipher_type_t;
128 
129 typedef enum {
130 	AES_128_BIT = 0x1,
131 	AES_192_BIT = 0x2,
132 	AES_256_BIT = 0x3
133 } mc_aes_type_t;
134 
135 typedef enum {
136 	/* Microcode errors */
137 	NO_ERR = 0x00,
138 	ERR_OPCODE_UNSUPPORTED = 0x01,
139 
140 	/* SCATTER GATHER */
141 	ERR_SCATTER_GATHER_WRITE_LENGTH = 0x02,
142 	ERR_SCATTER_GATHER_LIST = 0x03,
143 	ERR_SCATTER_GATHER_NOT_SUPPORTED = 0x04,
144 
145 	/* SE GC */
146 	ERR_GC_LENGTH_INVALID = 0x41,
147 	ERR_GC_RANDOM_LEN_INVALID = 0x42,
148 	ERR_GC_DATA_LEN_INVALID = 0x43,
149 	ERR_GC_DRBG_TYPE_INVALID = 0x44,
150 	ERR_GC_CTX_LEN_INVALID = 0x45,
151 	ERR_GC_CIPHER_UNSUPPORTED = 0x46,
152 	ERR_GC_AUTH_UNSUPPORTED = 0x47,
153 	ERR_GC_OFFSET_INVALID = 0x48,
154 	ERR_GC_HASH_MODE_UNSUPPORTED = 0x49,
155 	ERR_GC_DRBG_ENTROPY_LEN_INVALID = 0x4a,
156 	ERR_GC_DRBG_ADDNL_LEN_INVALID = 0x4b,
157 	ERR_GC_ICV_MISCOMPARE = 0x4c,
158 	ERR_GC_DATA_UNALIGNED = 0x4d,
159 
160 	/* API Layer */
161 	ERR_BAD_ALT_CCODE = 0xfd,
162 	ERR_REQ_PENDING = 0xfe,
163 	ERR_REQ_TIMEOUT = 0xff,
164 
165 	ERR_BAD_INPUT_LENGTH = (0x40000000 | 384),    /* 0x40000180 */
166 	ERR_BAD_KEY_LENGTH,
167 	ERR_BAD_KEY_HANDLE,
168 	ERR_BAD_CONTEXT_HANDLE,
169 	ERR_BAD_SCALAR_LENGTH,
170 	ERR_BAD_DIGEST_LENGTH,
171 	ERR_BAD_INPUT_ARG,
172 	ERR_BAD_RECORD_PADDING,
173 	ERR_NB_REQUEST_PENDING,
174 	ERR_EIO,
175 	ERR_ENODEV,
176 } mc_error_code_t;
177 
178 /**
179  * Enumeration cpt_comp_e
180  *
181  * CPT Completion Enumeration
182  * Enumerates the values of CPT_RES_S[COMPCODE].
183  */
184 typedef enum {
185 	CPT_8X_COMP_E_NOTDONE    = (0x00),
186 	CPT_8X_COMP_E_GOOD       = (0x01),
187 	CPT_8X_COMP_E_FAULT      = (0x02),
188 	CPT_8X_COMP_E_SWERR      = (0x03),
189 	CPT_8X_COMP_E_HWERR      = (0x04),
190 	CPT_8X_COMP_E_LAST_ENTRY = (0xFF)
191 } cpt_comp_e_t;
192 
193 typedef struct sglist_comp {
194 	union {
195 		uint64_t len;
196 		struct {
197 			uint16_t len[4];
198 		} s;
199 	} u;
200 	uint64_t ptr[4];
201 } sg_comp_t;
202 
203 struct cpt_sess_misc {
204 	/** CPT opcode */
205 	uint16_t cpt_op:4;
206 	/** ZUC, SNOW3G &  KASUMI flags */
207 	uint16_t zsk_flag:4;
208 	/** Flag for AES GCM */
209 	uint16_t aes_gcm:1;
210 	/** Flag for AES CTR */
211 	uint16_t aes_ctr:1;
212 	/** Flag for NULL cipher/auth */
213 	uint16_t is_null:1;
214 	/** Flag for GMAC */
215 	uint16_t is_gmac:1;
216 	/** AAD length */
217 	uint16_t aad_length;
218 	/** MAC len in bytes */
219 	uint8_t mac_len;
220 	/** IV length in bytes */
221 	uint8_t iv_length;
222 	/** Auth IV length in bytes */
223 	uint8_t auth_iv_length;
224 	/** Reserved field */
225 	uint8_t rsvd1;
226 	/** IV offset in bytes */
227 	uint16_t iv_offset;
228 	/** Auth IV offset in bytes */
229 	uint16_t auth_iv_offset;
230 	/** Salt */
231 	uint32_t salt;
232 	/** Context DMA address */
233 	phys_addr_t ctx_dma_addr;
234 };
235 
236 typedef union {
237 	uint64_t flags;
238 	struct {
239 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
240 		uint64_t enc_cipher   : 4;
241 		uint64_t reserved1    : 1;
242 		uint64_t aes_key      : 2;
243 		uint64_t iv_source    : 1;
244 		uint64_t hash_type    : 4;
245 		uint64_t reserved2    : 3;
246 		uint64_t auth_input_type : 1;
247 		uint64_t mac_len      : 8;
248 		uint64_t reserved3    : 8;
249 		uint64_t encr_offset  : 16;
250 		uint64_t iv_offset    : 8;
251 		uint64_t auth_offset  : 8;
252 #else
253 		uint64_t auth_offset  : 8;
254 		uint64_t iv_offset    : 8;
255 		uint64_t encr_offset  : 16;
256 		uint64_t reserved3    : 8;
257 		uint64_t mac_len      : 8;
258 		uint64_t auth_input_type : 1;
259 		uint64_t reserved2    : 3;
260 		uint64_t hash_type    : 4;
261 		uint64_t iv_source    : 1;
262 		uint64_t aes_key      : 2;
263 		uint64_t reserved1    : 1;
264 		uint64_t enc_cipher   : 4;
265 #endif
266 	} e;
267 } encr_ctrl_t;
268 
269 typedef struct {
270 	encr_ctrl_t enc_ctrl;
271 	uint8_t  encr_key[32];
272 	uint8_t  encr_iv[16];
273 } mc_enc_context_t;
274 
275 typedef struct {
276 	uint8_t  ipad[64];
277 	uint8_t  opad[64];
278 } mc_fc_hmac_context_t;
279 
280 typedef struct {
281 	mc_enc_context_t     enc;
282 	mc_fc_hmac_context_t hmac;
283 } mc_fc_context_t;
284 
285 typedef struct {
286 	uint8_t encr_auth_iv[16];
287 	uint8_t ci_key[16];
288 	uint8_t zuc_const[32];
289 } mc_zuc_snow3g_ctx_t;
290 
291 typedef struct {
292 	uint8_t reg_A[8];
293 	uint8_t ci_key[16];
294 } mc_kasumi_ctx_t;
295 
296 struct cpt_ctx {
297 	/* Below fields are accessed by sw */
298 	uint64_t enc_cipher	:8;
299 	uint64_t hash_type	:8;
300 	uint64_t mac_len	:8;
301 	uint64_t auth_key_len	:8;
302 	uint64_t fc_type	:4;
303 	uint64_t hmac		:1;
304 	uint64_t zsk_flags	:3;
305 	uint64_t k_ecb		:1;
306 	uint64_t snow3g		:1;
307 	uint64_t rsvd		:22;
308 	/* Below fields are accessed by hardware */
309 	union {
310 		mc_fc_context_t fctx;
311 		mc_zuc_snow3g_ctx_t zs_ctx;
312 		mc_kasumi_ctx_t k_ctx;
313 	};
314 	uint8_t  auth_key[64];
315 };
316 
317 /* Buffer pointer */
318 typedef struct buf_ptr {
319 	void *vaddr;
320 	phys_addr_t dma_addr;
321 	uint32_t size;
322 	uint32_t resv;
323 } buf_ptr_t;
324 
325 /* IOV Pointer */
326 typedef struct{
327 	int buf_cnt;
328 	buf_ptr_t bufs[0];
329 } iov_ptr_t;
330 
331 typedef union opcode_info {
332 	uint16_t flags;
333 	struct {
334 		uint8_t major;
335 		uint8_t minor;
336 	} s;
337 } opcode_info_t;
338 
339 typedef struct fc_params {
340 	/* 0th cache line */
341 	union {
342 		buf_ptr_t bufs[1];
343 		struct {
344 			iov_ptr_t *src_iov;
345 			iov_ptr_t *dst_iov;
346 		};
347 	};
348 	void *iv_buf;
349 	void *auth_iv_buf;
350 	buf_ptr_t meta_buf;
351 	buf_ptr_t ctx_buf;
352 	uint64_t rsvd2;
353 
354 	/* 1st cache line */
355 	buf_ptr_t aad_buf;
356 	buf_ptr_t mac_buf;
357 
358 } fc_params_t;
359 
360 /*
361  * Parameters for digest
362  * generate requests
363  * Only src_iov, op, ctx_buf, mac_buf, prep_req
364  * meta_buf, auth_data_len are used for digest gen.
365  */
366 typedef struct fc_params digest_params_t;
367 
368 /* Cipher Algorithms */
369 typedef mc_cipher_type_t cipher_type_t;
370 
371 /* Auth Algorithms */
372 typedef mc_hash_type_t auth_type_t;
373 
374 /* Helper macros */
375 
376 #define CPT_P_ENC_CTRL(fctx)  fctx->enc.enc_ctrl.e
377 
378 #define SRC_IOV_SIZE \
379 	(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
380 #define DST_IOV_SIZE \
381 	(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
382 
383 #define SESS_PRIV(__sess) \
384 	(void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc))
385 
386 #endif /* _CPT_MCODE_DEFINES_H_ */
387