xref: /dpdk/drivers/common/cpt/cpt_mcode_defines.h (revision 8809f78c7dd9f33a44a4f89c58fc91ded34296ed)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018 Cavium, Inc
3  */
4 
5 #ifndef _CPT_MCODE_DEFINES_H_
6 #define _CPT_MCODE_DEFINES_H_
7 
8 #include <rte_byteorder.h>
9 #include <rte_crypto_asym.h>
10 #include <rte_memory.h>
11 
12 /*
13  * This file defines macros and structures according to microcode spec
14  *
15  */
16 /* SE opcodes */
17 #define CPT_MAJOR_OP_FC		0x33
18 #define CPT_MAJOR_OP_HASH	0x34
19 #define CPT_MAJOR_OP_HMAC	0x35
20 #define CPT_MAJOR_OP_ZUC_SNOW3G	0x37
21 #define CPT_MAJOR_OP_KASUMI	0x38
22 #define CPT_MAJOR_OP_MISC	0x01
23 
24 /* AE opcodes */
25 #define CPT_MAJOR_OP_MODEX	0x03
26 #define CPT_MAJOR_OP_ECDSA	0x04
27 #define CPT_MAJOR_OP_ECC	0x05
28 #define CPT_MINOR_OP_MODEX	0x01
29 #define CPT_MINOR_OP_PKCS_ENC	0x02
30 #define CPT_MINOR_OP_PKCS_ENC_CRT	0x03
31 #define CPT_MINOR_OP_PKCS_DEC	0x04
32 #define CPT_MINOR_OP_PKCS_DEC_CRT	0x05
33 #define CPT_MINOR_OP_MODEX_CRT	0x06
34 #define CPT_MINOR_OP_ECDSA_SIGN	0x01
35 #define CPT_MINOR_OP_ECDSA_VERIFY	0x02
36 #define CPT_MINOR_OP_ECC_UMP	0x03
37 
38 #define CPT_BLOCK_TYPE1 0
39 #define CPT_BLOCK_TYPE2 1
40 
41 #define CPT_MAX_SG_IN_OUT_CNT	32
42 #define CPT_MAX_SG_CNT		(CPT_MAX_SG_IN_OUT_CNT/2)
43 
44 #define COMPLETION_CODE_SIZE	8
45 #define COMPLETION_CODE_INIT	0
46 
47 #define SG_LIST_HDR_SIZE	(8u)
48 #define SG_ENTRY_SIZE		sizeof(sg_comp_t)
49 
50 #define CPT_DMA_MODE		(1 << 7)
51 
52 #define CPT_FROM_CTX		0
53 #define CPT_FROM_DPTR		1
54 
55 #define FC_GEN			0x1
56 #define ZUC_SNOW3G		0x2
57 #define KASUMI			0x3
58 #define HASH_HMAC		0x4
59 
60 #define ZS_EA			0x1
61 #define ZS_IA			0x2
62 #define K_F8			0x4
63 #define K_F9			0x8
64 
65 #define CPT_OP_CIPHER_ENCRYPT	0x1
66 #define CPT_OP_CIPHER_DECRYPT	0x2
67 #define CPT_OP_CIPHER_MASK	0x3
68 
69 #define CPT_OP_AUTH_VERIFY	0x4
70 #define CPT_OP_AUTH_GENERATE	0x8
71 #define CPT_OP_AUTH_MASK	0xC
72 
73 #define CPT_OP_ENCODE	(CPT_OP_CIPHER_ENCRYPT | CPT_OP_AUTH_GENERATE)
74 #define CPT_OP_DECODE	(CPT_OP_CIPHER_DECRYPT | CPT_OP_AUTH_VERIFY)
75 
76 /* #define CPT_ALWAYS_USE_SG_MODE */
77 #define CPT_ALWAYS_USE_SEPARATE_BUF
78 
79 /*
80  * Parameters for Flexi Crypto
81  * requests
82  */
83 #define VALID_AAD_BUF 0x01
84 #define VALID_MAC_BUF 0x02
85 #define VALID_IV_BUF 0x04
86 #define SINGLE_BUF_INPLACE 0x08
87 #define SINGLE_BUF_HEADTAILROOM 0x10
88 
89 #define ENCR_IV_OFFSET(__d_offs) ((__d_offs >> 32) & 0xffff)
90 #define ENCR_OFFSET(__d_offs) ((__d_offs >> 16) & 0xffff)
91 #define AUTH_OFFSET(__d_offs) (__d_offs & 0xffff)
92 #define ENCR_DLEN(__d_lens) (__d_lens >> 32)
93 #define AUTH_DLEN(__d_lens) (__d_lens & 0xffffffff)
94 
95 /* FC offset_control at start of DPTR in bytes */
96 #define OFF_CTRL_LEN  8 /**< bytes */
97 
98 typedef enum {
99 	MD5_TYPE        = 1,
100 	SHA1_TYPE       = 2,
101 	SHA2_SHA224     = 3,
102 	SHA2_SHA256     = 4,
103 	SHA2_SHA384     = 5,
104 	SHA2_SHA512     = 6,
105 	GMAC_TYPE       = 7,
106 	POLY1305        = 8,
107 	SHA3_SHA224     = 10,
108 	SHA3_SHA256     = 11,
109 	SHA3_SHA384     = 12,
110 	SHA3_SHA512     = 13,
111 	SHA3_SHAKE256   = 14,
112 	SHA3_SHAKE512   = 15,
113 
114 	/* These are only for software use */
115 	ZUC_EIA3        = 0x90,
116 	SNOW3G_UIA2     = 0x91,
117 	KASUMI_F9_CBC   = 0x92,
118 	KASUMI_F9_ECB   = 0x93,
119 } mc_hash_type_t;
120 
121 typedef enum {
122 	/* To support passthrough */
123 	PASSTHROUGH  = 0x0,
124 	/*
125 	 * These are defined by MC for Flexi crypto
126 	 * for field of 4 bits
127 	 */
128 	DES3_CBC    = 0x1,
129 	DES3_ECB    = 0x2,
130 	AES_CBC     = 0x3,
131 	AES_ECB     = 0x4,
132 	AES_CFB     = 0x5,
133 	AES_CTR     = 0x6,
134 	AES_GCM     = 0x7,
135 	AES_XTS     = 0x8,
136 	CHACHA20    = 0x9,
137 
138 	/* These are only for software use */
139 	ZUC_EEA3        = 0x90,
140 	SNOW3G_UEA2     = 0x91,
141 	KASUMI_F8_CBC   = 0x92,
142 	KASUMI_F8_ECB   = 0x93,
143 } mc_cipher_type_t;
144 
145 typedef enum {
146 	AES_128_BIT = 0x1,
147 	AES_192_BIT = 0x2,
148 	AES_256_BIT = 0x3
149 } mc_aes_type_t;
150 
151 typedef enum {
152 	/* Microcode errors */
153 	NO_ERR = 0x00,
154 	ERR_OPCODE_UNSUPPORTED = 0x01,
155 
156 	/* SCATTER GATHER */
157 	ERR_SCATTER_GATHER_WRITE_LENGTH = 0x02,
158 	ERR_SCATTER_GATHER_LIST = 0x03,
159 	ERR_SCATTER_GATHER_NOT_SUPPORTED = 0x04,
160 
161 	/* SE GC */
162 	ERR_GC_LENGTH_INVALID = 0x41,
163 	ERR_GC_RANDOM_LEN_INVALID = 0x42,
164 	ERR_GC_DATA_LEN_INVALID = 0x43,
165 	ERR_GC_DRBG_TYPE_INVALID = 0x44,
166 	ERR_GC_CTX_LEN_INVALID = 0x45,
167 	ERR_GC_CIPHER_UNSUPPORTED = 0x46,
168 	ERR_GC_AUTH_UNSUPPORTED = 0x47,
169 	ERR_GC_OFFSET_INVALID = 0x48,
170 	ERR_GC_HASH_MODE_UNSUPPORTED = 0x49,
171 	ERR_GC_DRBG_ENTROPY_LEN_INVALID = 0x4a,
172 	ERR_GC_DRBG_ADDNL_LEN_INVALID = 0x4b,
173 	ERR_GC_ICV_MISCOMPARE = 0x4c,
174 	ERR_GC_DATA_UNALIGNED = 0x4d,
175 
176 	/* API Layer */
177 	ERR_BAD_ALT_CCODE = 0xfd,
178 	ERR_REQ_PENDING = 0xfe,
179 	ERR_REQ_TIMEOUT = 0xff,
180 
181 	ERR_BAD_INPUT_LENGTH = (0x40000000 | 384),    /* 0x40000180 */
182 	ERR_BAD_KEY_LENGTH,
183 	ERR_BAD_KEY_HANDLE,
184 	ERR_BAD_CONTEXT_HANDLE,
185 	ERR_BAD_SCALAR_LENGTH,
186 	ERR_BAD_DIGEST_LENGTH,
187 	ERR_BAD_INPUT_ARG,
188 	ERR_BAD_RECORD_PADDING,
189 	ERR_NB_REQUEST_PENDING,
190 	ERR_EIO,
191 	ERR_ENODEV,
192 } mc_error_code_t;
193 
194 /**
195  * Enumeration cpt_comp_e
196  *
197  * CPT Completion Enumeration
198  * Enumerates the values of CPT_RES_S[COMPCODE].
199  */
200 typedef enum {
201 	CPT_8X_COMP_E_NOTDONE    = (0x00),
202 	CPT_8X_COMP_E_GOOD       = (0x01),
203 	CPT_8X_COMP_E_FAULT      = (0x02),
204 	CPT_8X_COMP_E_SWERR      = (0x03),
205 	CPT_8X_COMP_E_HWERR      = (0x04),
206 	CPT_8X_COMP_E_LAST_ENTRY = (0xFF)
207 } cpt_comp_e_t;
208 
209 /**
210  * Enumeration cpt_ec_id
211  *
212  * Enumerates supported elliptic curves
213  */
214 typedef enum {
215 	CPT_EC_ID_P192 = 0,
216 	CPT_EC_ID_P224 = 1,
217 	CPT_EC_ID_P256 = 2,
218 	CPT_EC_ID_P384 = 3,
219 	CPT_EC_ID_P521 = 4,
220 	CPT_EC_ID_PMAX = 5
221 } cpt_ec_id_t;
222 
223 typedef struct sglist_comp {
224 	union {
225 		uint64_t len;
226 		struct {
227 			uint16_t len[4];
228 		} s;
229 	} u;
230 	uint64_t ptr[4];
231 } sg_comp_t;
232 
233 struct cpt_sess_misc {
234 	/** CPT opcode */
235 	uint16_t cpt_op:4;
236 	/** ZUC, SNOW3G &  KASUMI flags */
237 	uint16_t zsk_flag:4;
238 	/** Flag for AES GCM */
239 	uint16_t aes_gcm:1;
240 	/** Flag for AES CTR */
241 	uint16_t aes_ctr:1;
242 	/** Flag for CHACHA POLY */
243 	uint16_t chacha_poly:1;
244 	/** Flag for NULL cipher/auth */
245 	uint16_t is_null:1;
246 	/** Flag for GMAC */
247 	uint16_t is_gmac:1;
248 	/** Engine group */
249 	uint16_t egrp:3;
250 	/** AAD length */
251 	uint16_t aad_length;
252 	/** MAC len in bytes */
253 	uint8_t mac_len;
254 	/** IV length in bytes */
255 	uint8_t iv_length;
256 	/** Auth IV length in bytes */
257 	uint8_t auth_iv_length;
258 	/** Reserved field */
259 	uint8_t rsvd1;
260 	/** IV offset in bytes */
261 	uint16_t iv_offset;
262 	/** Auth IV offset in bytes */
263 	uint16_t auth_iv_offset;
264 	/** Salt */
265 	uint32_t salt;
266 	/** Context DMA address */
267 	phys_addr_t ctx_dma_addr;
268 };
269 
270 typedef struct {
271 	uint64_t iv_source      : 1;
272 	uint64_t aes_key        : 2;
273 	uint64_t rsvd_60        : 1;
274 	uint64_t enc_cipher     : 4;
275 	uint64_t auth_input_type : 1;
276 	uint64_t rsvd_52_54     : 3;
277 	uint64_t hash_type      : 4;
278 	uint64_t mac_len        : 8;
279 	uint64_t rsvd_39_0      : 40;
280 	uint8_t  encr_key[32];
281 	uint8_t  encr_iv[16];
282 } mc_enc_context_t;
283 
284 typedef struct {
285 	uint8_t  ipad[64];
286 	uint8_t  opad[64];
287 } mc_fc_hmac_context_t;
288 
289 typedef struct {
290 	mc_enc_context_t     enc;
291 	mc_fc_hmac_context_t hmac;
292 } mc_fc_context_t;
293 
294 typedef struct {
295 	uint8_t encr_auth_iv[16];
296 	uint8_t ci_key[16];
297 	uint8_t zuc_const[32];
298 } mc_zuc_snow3g_ctx_t;
299 
300 typedef struct {
301 	uint8_t reg_A[8];
302 	uint8_t ci_key[16];
303 } mc_kasumi_ctx_t;
304 
305 struct cpt_ctx {
306 	/* Below fields are accessed by sw */
307 	uint64_t enc_cipher	:8;
308 	uint64_t hash_type	:8;
309 	uint64_t mac_len	:8;
310 	uint64_t auth_key_len	:8;
311 	uint64_t fc_type	:4;
312 	uint64_t hmac		:1;
313 	uint64_t zsk_flags	:3;
314 	uint64_t k_ecb		:1;
315 	uint64_t snow3g		:2;
316 	uint64_t rsvd		:21;
317 	/* Below fields are accessed by hardware */
318 	union {
319 		mc_fc_context_t fctx;
320 		mc_zuc_snow3g_ctx_t zs_ctx;
321 		mc_kasumi_ctx_t k_ctx;
322 	};
323 	uint8_t  auth_key[1024];
324 };
325 
326 /* Prime and order fields of built-in elliptic curves */
327 struct cpt_ec_group {
328 	struct {
329 		/* P521 maximum length */
330 		uint8_t data[66];
331 		unsigned int length;
332 	} prime;
333 
334 	struct {
335 		/* P521 maximum length */
336 		uint8_t data[66];
337 		unsigned int length;
338 	} order;
339 };
340 
341 struct cpt_asym_ec_ctx {
342 	/* Prime length defined by microcode for EC operations */
343 	uint8_t curveid;
344 };
345 
346 struct cpt_asym_sess_misc {
347 	enum rte_crypto_asym_xform_type xfrm_type;
348 	union {
349 		struct rte_crypto_rsa_xform rsa_ctx;
350 		struct rte_crypto_modex_xform mod_ctx;
351 		struct cpt_asym_ec_ctx ec_ctx;
352 	};
353 };
354 
355 /* Buffer pointer */
356 typedef struct buf_ptr {
357 	void *vaddr;
358 	phys_addr_t dma_addr;
359 	uint32_t size;
360 	uint32_t resv;
361 } buf_ptr_t;
362 
363 /* IOV Pointer */
364 typedef struct{
365 	int buf_cnt;
366 	buf_ptr_t bufs[0];
367 } iov_ptr_t;
368 
369 typedef union opcode_info {
370 	uint16_t flags;
371 	struct {
372 		uint8_t major;
373 		uint8_t minor;
374 	} s;
375 } opcode_info_t;
376 
377 typedef struct fc_params {
378 	/* 0th cache line */
379 	union {
380 		buf_ptr_t bufs[1];
381 		struct {
382 			iov_ptr_t *src_iov;
383 			iov_ptr_t *dst_iov;
384 		};
385 	};
386 	void *iv_buf;
387 	void *auth_iv_buf;
388 	buf_ptr_t meta_buf;
389 	buf_ptr_t ctx_buf;
390 	uint64_t rsvd2;
391 
392 	/* 1st cache line */
393 	buf_ptr_t aad_buf;
394 	buf_ptr_t mac_buf;
395 
396 } fc_params_t;
397 
398 /*
399  * Parameters for asymmetric operations
400  */
401 struct asym_op_params {
402 	struct cpt_request_info *req;
403 	phys_addr_t meta_buf;
404 };
405 
406 /*
407  * Parameters for digest
408  * generate requests
409  * Only src_iov, op, ctx_buf, mac_buf, prep_req
410  * meta_buf, auth_data_len are used for digest gen.
411  */
412 typedef struct fc_params digest_params_t;
413 
414 /* Cipher Algorithms */
415 typedef mc_cipher_type_t cipher_type_t;
416 
417 /* Auth Algorithms */
418 typedef mc_hash_type_t auth_type_t;
419 
420 /* Helper macros */
421 
422 #define SRC_IOV_SIZE \
423 	(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
424 #define DST_IOV_SIZE \
425 	(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
426 
427 #define SESS_PRIV(__sess) \
428 	(void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc))
429 
430 #define GET_SESS_FC_TYPE(__sess) \
431 	(((struct cpt_ctx *)(SESS_PRIV(__sess)))->fc_type)
432 
433 /*
434  * Get the session size
435  *
436  * @return
437  *   - session size
438  */
439 static __rte_always_inline unsigned int
440 cpt_get_session_size(void)
441 {
442 	unsigned int ctx_len = sizeof(struct cpt_ctx);
443 	return (sizeof(struct cpt_sess_misc) + RTE_ALIGN_CEIL(ctx_len, 8));
444 }
445 #endif /* _CPT_MCODE_DEFINES_H_ */
446