xref: /dpdk/drivers/common/cpt/cpt_mcode_defines.h (revision 7efe28bd07b3ac8cbc5cbc35ca6c5bc2f30c6a5b)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018 Cavium, Inc
3  */
4 
5 #ifndef _CPT_MCODE_DEFINES_H_
6 #define _CPT_MCODE_DEFINES_H_
7 
8 #include <rte_byteorder.h>
9 #include <rte_crypto_asym.h>
10 #include <rte_memory.h>
11 
12 /*
13  * This file defines macros and structures according to microcode spec
14  *
15  */
16 /* SE opcodes */
17 #define CPT_MAJOR_OP_FC		0x33
18 #define CPT_MAJOR_OP_HASH	0x34
19 #define CPT_MAJOR_OP_HMAC	0x35
20 #define CPT_MAJOR_OP_ZUC_SNOW3G	0x37
21 #define CPT_MAJOR_OP_KASUMI	0x38
22 #define CPT_MAJOR_OP_MISC	0x01
23 
24 /* AE opcodes */
25 #define CPT_MAJOR_OP_MODEX	0x03
26 #define CPT_MAJOR_OP_ECDSA	0x04
27 #define CPT_MAJOR_OP_ECC	0x05
28 #define CPT_MINOR_OP_MODEX	0x01
29 #define CPT_MINOR_OP_PKCS_ENC	0x02
30 #define CPT_MINOR_OP_PKCS_ENC_CRT	0x03
31 #define CPT_MINOR_OP_PKCS_DEC	0x04
32 #define CPT_MINOR_OP_PKCS_DEC_CRT	0x05
33 #define CPT_MINOR_OP_MODEX_CRT	0x06
34 #define CPT_MINOR_OP_ECDSA_SIGN	0x01
35 #define CPT_MINOR_OP_ECDSA_VERIFY	0x02
36 #define CPT_MINOR_OP_ECC_UMP	0x03
37 
38 #define CPT_BLOCK_TYPE1 0
39 #define CPT_BLOCK_TYPE2 1
40 
41 #define CPT_BYTE_16		16
42 #define CPT_BYTE_24		24
43 #define CPT_BYTE_32		32
44 #define CPT_MAX_SG_IN_OUT_CNT	32
45 #define CPT_MAX_SG_CNT		(CPT_MAX_SG_IN_OUT_CNT/2)
46 
47 #define COMPLETION_CODE_SIZE	8
48 #define COMPLETION_CODE_INIT	0
49 
50 #define SG_LIST_HDR_SIZE	(8u)
51 #define SG_ENTRY_SIZE		sizeof(sg_comp_t)
52 
53 #define CPT_DMA_MODE		(1 << 7)
54 
55 #define CPT_FROM_CTX		0
56 #define CPT_FROM_DPTR		1
57 
58 #define FC_GEN			0x1
59 #define ZUC_SNOW3G		0x2
60 #define KASUMI			0x3
61 #define HASH_HMAC		0x4
62 
63 #define ZS_EA			0x1
64 #define ZS_IA			0x2
65 #define K_F8			0x4
66 #define K_F9			0x8
67 
68 #define CPT_OP_CIPHER_ENCRYPT	0x1
69 #define CPT_OP_CIPHER_DECRYPT	0x2
70 #define CPT_OP_CIPHER_MASK	0x3
71 
72 #define CPT_OP_AUTH_VERIFY	0x4
73 #define CPT_OP_AUTH_GENERATE	0x8
74 #define CPT_OP_AUTH_MASK	0xC
75 
76 #define CPT_OP_ENCODE	(CPT_OP_CIPHER_ENCRYPT | CPT_OP_AUTH_GENERATE)
77 #define CPT_OP_DECODE	(CPT_OP_CIPHER_DECRYPT | CPT_OP_AUTH_VERIFY)
78 
79 /* #define CPT_ALWAYS_USE_SG_MODE */
80 #define CPT_ALWAYS_USE_SEPARATE_BUF
81 
82 /*
83  * Parameters for Flexi Crypto
84  * requests
85  */
86 #define VALID_AAD_BUF 0x01
87 #define VALID_MAC_BUF 0x02
88 #define VALID_IV_BUF 0x04
89 #define SINGLE_BUF_INPLACE 0x08
90 #define SINGLE_BUF_HEADTAILROOM 0x10
91 
92 #define ENCR_IV_OFFSET(__d_offs) ((__d_offs >> 32) & 0xffff)
93 #define ENCR_OFFSET(__d_offs) ((__d_offs >> 16) & 0xffff)
94 #define AUTH_OFFSET(__d_offs) (__d_offs & 0xffff)
95 #define ENCR_DLEN(__d_lens) (__d_lens >> 32)
96 #define AUTH_DLEN(__d_lens) (__d_lens & 0xffffffff)
97 
98 /* FC offset_control at start of DPTR in bytes */
99 #define OFF_CTRL_LEN  8 /**< bytes */
100 
101 typedef enum {
102 	MD5_TYPE        = 1,
103 	SHA1_TYPE       = 2,
104 	SHA2_SHA224     = 3,
105 	SHA2_SHA256     = 4,
106 	SHA2_SHA384     = 5,
107 	SHA2_SHA512     = 6,
108 	GMAC_TYPE       = 7,
109 	XCBC_TYPE       = 8,
110 	SHA3_SHA224     = 10,
111 	SHA3_SHA256     = 11,
112 	SHA3_SHA384     = 12,
113 	SHA3_SHA512     = 13,
114 	SHA3_SHAKE256   = 14,
115 	SHA3_SHAKE512   = 15,
116 
117 	/* These are only for software use */
118 	ZUC_EIA3        = 0x90,
119 	SNOW3G_UIA2     = 0x91,
120 	KASUMI_F9_CBC   = 0x92,
121 	KASUMI_F9_ECB   = 0x93,
122 } mc_hash_type_t;
123 
124 typedef enum {
125 	/* To support passthrough */
126 	PASSTHROUGH  = 0x0,
127 	/*
128 	 * These are defined by MC for Flexi crypto
129 	 * for field of 4 bits
130 	 */
131 	DES3_CBC    = 0x1,
132 	DES3_ECB    = 0x2,
133 	AES_CBC     = 0x3,
134 	AES_ECB     = 0x4,
135 	AES_CFB     = 0x5,
136 	AES_CTR     = 0x6,
137 	AES_GCM     = 0x7,
138 	AES_XTS     = 0x8,
139 
140 	/* These are only for software use */
141 	ZUC_EEA3        = 0x90,
142 	SNOW3G_UEA2     = 0x91,
143 	KASUMI_F8_CBC   = 0x92,
144 	KASUMI_F8_ECB   = 0x93,
145 } mc_cipher_type_t;
146 
147 typedef enum {
148 	AES_128_BIT = 0x1,
149 	AES_192_BIT = 0x2,
150 	AES_256_BIT = 0x3
151 } mc_aes_type_t;
152 
153 typedef enum {
154 	/* Microcode errors */
155 	NO_ERR = 0x00,
156 	ERR_OPCODE_UNSUPPORTED = 0x01,
157 
158 	/* SCATTER GATHER */
159 	ERR_SCATTER_GATHER_WRITE_LENGTH = 0x02,
160 	ERR_SCATTER_GATHER_LIST = 0x03,
161 	ERR_SCATTER_GATHER_NOT_SUPPORTED = 0x04,
162 
163 	/* SE GC */
164 	ERR_GC_LENGTH_INVALID = 0x41,
165 	ERR_GC_RANDOM_LEN_INVALID = 0x42,
166 	ERR_GC_DATA_LEN_INVALID = 0x43,
167 	ERR_GC_DRBG_TYPE_INVALID = 0x44,
168 	ERR_GC_CTX_LEN_INVALID = 0x45,
169 	ERR_GC_CIPHER_UNSUPPORTED = 0x46,
170 	ERR_GC_AUTH_UNSUPPORTED = 0x47,
171 	ERR_GC_OFFSET_INVALID = 0x48,
172 	ERR_GC_HASH_MODE_UNSUPPORTED = 0x49,
173 	ERR_GC_DRBG_ENTROPY_LEN_INVALID = 0x4a,
174 	ERR_GC_DRBG_ADDNL_LEN_INVALID = 0x4b,
175 	ERR_GC_ICV_MISCOMPARE = 0x4c,
176 	ERR_GC_DATA_UNALIGNED = 0x4d,
177 
178 	/* API Layer */
179 	ERR_BAD_ALT_CCODE = 0xfd,
180 	ERR_REQ_PENDING = 0xfe,
181 	ERR_REQ_TIMEOUT = 0xff,
182 
183 	ERR_BAD_INPUT_LENGTH = (0x40000000 | 384),    /* 0x40000180 */
184 	ERR_BAD_KEY_LENGTH,
185 	ERR_BAD_KEY_HANDLE,
186 	ERR_BAD_CONTEXT_HANDLE,
187 	ERR_BAD_SCALAR_LENGTH,
188 	ERR_BAD_DIGEST_LENGTH,
189 	ERR_BAD_INPUT_ARG,
190 	ERR_BAD_RECORD_PADDING,
191 	ERR_NB_REQUEST_PENDING,
192 	ERR_EIO,
193 	ERR_ENODEV,
194 } mc_error_code_t;
195 
196 /**
197  * Enumeration cpt_comp_e
198  *
199  * CPT Completion Enumeration
200  * Enumerates the values of CPT_RES_S[COMPCODE].
201  */
202 typedef enum {
203 	CPT_8X_COMP_E_NOTDONE    = (0x00),
204 	CPT_8X_COMP_E_GOOD       = (0x01),
205 	CPT_8X_COMP_E_FAULT      = (0x02),
206 	CPT_8X_COMP_E_SWERR      = (0x03),
207 	CPT_8X_COMP_E_HWERR      = (0x04),
208 	CPT_8X_COMP_E_LAST_ENTRY = (0xFF)
209 } cpt_comp_e_t;
210 
211 /**
212  * Enumeration cpt_ec_id
213  *
214  * Enumerates supported elliptic curves
215  */
216 typedef enum {
217 	CPT_EC_ID_P192 = 0,
218 	CPT_EC_ID_P224 = 1,
219 	CPT_EC_ID_P256 = 2,
220 	CPT_EC_ID_P384 = 3,
221 	CPT_EC_ID_P521 = 4,
222 	CPT_EC_ID_PMAX = 5
223 } cpt_ec_id_t;
224 
225 typedef struct sglist_comp {
226 	union {
227 		uint64_t len;
228 		struct {
229 			uint16_t len[4];
230 		} s;
231 	} u;
232 	uint64_t ptr[4];
233 } sg_comp_t;
234 
235 struct cpt_sess_misc {
236 	/** CPT opcode */
237 	uint16_t cpt_op:4;
238 	/** ZUC, SNOW3G &  KASUMI flags */
239 	uint16_t zsk_flag:4;
240 	/** Flag for AES GCM */
241 	uint16_t aes_gcm:1;
242 	/** Flag for AES CTR */
243 	uint16_t aes_ctr:1;
244 	/** Flag for NULL cipher/auth */
245 	uint16_t is_null:1;
246 	/** Flag for GMAC */
247 	uint16_t is_gmac:1;
248 	/** Engine group */
249 	uint16_t egrp:3;
250 	/** AAD length */
251 	uint16_t aad_length;
252 	/** MAC len in bytes */
253 	uint8_t mac_len;
254 	/** IV length in bytes */
255 	uint8_t iv_length;
256 	/** Auth IV length in bytes */
257 	uint8_t auth_iv_length;
258 	/** Reserved field */
259 	uint8_t rsvd1;
260 	/** IV offset in bytes */
261 	uint16_t iv_offset;
262 	/** Auth IV offset in bytes */
263 	uint16_t auth_iv_offset;
264 	/** Salt */
265 	uint32_t salt;
266 	/** Context DMA address */
267 	phys_addr_t ctx_dma_addr;
268 };
269 
270 typedef union {
271 	uint64_t flags;
272 	struct {
273 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
274 		uint64_t enc_cipher   : 4;
275 		uint64_t reserved1    : 1;
276 		uint64_t aes_key      : 2;
277 		uint64_t iv_source    : 1;
278 		uint64_t hash_type    : 4;
279 		uint64_t reserved2    : 3;
280 		uint64_t auth_input_type : 1;
281 		uint64_t mac_len      : 8;
282 		uint64_t reserved3    : 8;
283 		uint64_t encr_offset  : 16;
284 		uint64_t iv_offset    : 8;
285 		uint64_t auth_offset  : 8;
286 #else
287 		uint64_t auth_offset  : 8;
288 		uint64_t iv_offset    : 8;
289 		uint64_t encr_offset  : 16;
290 		uint64_t reserved3    : 8;
291 		uint64_t mac_len      : 8;
292 		uint64_t auth_input_type : 1;
293 		uint64_t reserved2    : 3;
294 		uint64_t hash_type    : 4;
295 		uint64_t iv_source    : 1;
296 		uint64_t aes_key      : 2;
297 		uint64_t reserved1    : 1;
298 		uint64_t enc_cipher   : 4;
299 #endif
300 	} e;
301 } encr_ctrl_t;
302 
303 typedef struct {
304 	encr_ctrl_t enc_ctrl;
305 	uint8_t  encr_key[32];
306 	uint8_t  encr_iv[16];
307 } mc_enc_context_t;
308 
309 typedef struct {
310 	uint8_t  ipad[64];
311 	uint8_t  opad[64];
312 } mc_fc_hmac_context_t;
313 
314 typedef struct {
315 	mc_enc_context_t     enc;
316 	mc_fc_hmac_context_t hmac;
317 } mc_fc_context_t;
318 
319 typedef struct {
320 	uint8_t encr_auth_iv[16];
321 	uint8_t ci_key[16];
322 	uint8_t zuc_const[32];
323 } mc_zuc_snow3g_ctx_t;
324 
325 typedef struct {
326 	uint8_t reg_A[8];
327 	uint8_t ci_key[16];
328 } mc_kasumi_ctx_t;
329 
330 struct cpt_ctx {
331 	/* Below fields are accessed by sw */
332 	uint64_t enc_cipher	:8;
333 	uint64_t hash_type	:8;
334 	uint64_t mac_len	:8;
335 	uint64_t auth_key_len	:8;
336 	uint64_t fc_type	:4;
337 	uint64_t hmac		:1;
338 	uint64_t zsk_flags	:3;
339 	uint64_t k_ecb		:1;
340 	uint64_t snow3g		:2;
341 	uint64_t rsvd		:21;
342 	/* Below fields are accessed by hardware */
343 	union {
344 		mc_fc_context_t fctx;
345 		mc_zuc_snow3g_ctx_t zs_ctx;
346 		mc_kasumi_ctx_t k_ctx;
347 	};
348 	uint8_t  auth_key[64];
349 };
350 
351 /* Prime and order fields of built-in elliptic curves */
352 struct cpt_ec_group {
353 	struct {
354 		/* P521 maximum length */
355 		uint8_t data[66];
356 		unsigned int length;
357 	} prime;
358 
359 	struct {
360 		/* P521 maximum length */
361 		uint8_t data[66];
362 		unsigned int length;
363 	} order;
364 };
365 
366 struct cpt_asym_ec_ctx {
367 	/* Prime length defined by microcode for EC operations */
368 	uint8_t curveid;
369 };
370 
371 struct cpt_asym_sess_misc {
372 	enum rte_crypto_asym_xform_type xfrm_type;
373 	union {
374 		struct rte_crypto_rsa_xform rsa_ctx;
375 		struct rte_crypto_modex_xform mod_ctx;
376 		struct cpt_asym_ec_ctx ec_ctx;
377 	};
378 };
379 
380 /* Buffer pointer */
381 typedef struct buf_ptr {
382 	void *vaddr;
383 	phys_addr_t dma_addr;
384 	uint32_t size;
385 	uint32_t resv;
386 } buf_ptr_t;
387 
388 /* IOV Pointer */
389 typedef struct{
390 	int buf_cnt;
391 	buf_ptr_t bufs[0];
392 } iov_ptr_t;
393 
394 typedef union opcode_info {
395 	uint16_t flags;
396 	struct {
397 		uint8_t major;
398 		uint8_t minor;
399 	} s;
400 } opcode_info_t;
401 
402 typedef struct fc_params {
403 	/* 0th cache line */
404 	union {
405 		buf_ptr_t bufs[1];
406 		struct {
407 			iov_ptr_t *src_iov;
408 			iov_ptr_t *dst_iov;
409 		};
410 	};
411 	void *iv_buf;
412 	void *auth_iv_buf;
413 	buf_ptr_t meta_buf;
414 	buf_ptr_t ctx_buf;
415 	uint64_t rsvd2;
416 
417 	/* 1st cache line */
418 	buf_ptr_t aad_buf;
419 	buf_ptr_t mac_buf;
420 
421 } fc_params_t;
422 
423 /*
424  * Parameters for asymmetric operations
425  */
426 struct asym_op_params {
427 	struct cpt_request_info *req;
428 	phys_addr_t meta_buf;
429 };
430 
431 /*
432  * Parameters for digest
433  * generate requests
434  * Only src_iov, op, ctx_buf, mac_buf, prep_req
435  * meta_buf, auth_data_len are used for digest gen.
436  */
437 typedef struct fc_params digest_params_t;
438 
439 /* Cipher Algorithms */
440 typedef mc_cipher_type_t cipher_type_t;
441 
442 /* Auth Algorithms */
443 typedef mc_hash_type_t auth_type_t;
444 
445 /* Helper macros */
446 
447 #define CPT_P_ENC_CTRL(fctx)  fctx->enc.enc_ctrl.e
448 
449 #define SRC_IOV_SIZE \
450 	(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
451 #define DST_IOV_SIZE \
452 	(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
453 
454 #define SESS_PRIV(__sess) \
455 	(void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc))
456 
457 /*
458  * Get the session size
459  *
460  * @return
461  *   - session size
462  */
463 static __rte_always_inline unsigned int
464 cpt_get_session_size(void)
465 {
466 	unsigned int ctx_len = sizeof(struct cpt_ctx);
467 	return (sizeof(struct cpt_sess_misc) + RTE_ALIGN_CEIL(ctx_len, 8));
468 }
469 #endif /* _CPT_MCODE_DEFINES_H_ */
470