xref: /dpdk/drivers/bus/pci/linux/pci.c (revision 8f4de2dba9b90e97537e3bcc2db539c85210d854)
15566a3e3SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
25566a3e3SBruce Richardson  * Copyright(c) 2010-2014 Intel Corporation
3c752998bSGaetan Rivet  */
4c752998bSGaetan Rivet 
5c752998bSGaetan Rivet #include <string.h>
6c752998bSGaetan Rivet #include <dirent.h>
7c752998bSGaetan Rivet 
8c752998bSGaetan Rivet #include <rte_log.h>
9c752998bSGaetan Rivet #include <rte_pci.h>
10c752998bSGaetan Rivet #include <rte_bus_pci.h>
11c752998bSGaetan Rivet #include <rte_malloc.h>
12c752998bSGaetan Rivet #include <rte_devargs.h>
13c752998bSGaetan Rivet #include <rte_memcpy.h>
14c752998bSGaetan Rivet #include <rte_vfio.h>
15c752998bSGaetan Rivet 
16c752998bSGaetan Rivet #include "eal_filesystem.h"
17c752998bSGaetan Rivet 
18c752998bSGaetan Rivet #include "private.h"
19c752998bSGaetan Rivet #include "pci_init.h"
20c752998bSGaetan Rivet 
21c752998bSGaetan Rivet /**
22c752998bSGaetan Rivet  * @file
23aa777f00SThomas Monjalon  * PCI probing using Linux sysfs.
24c752998bSGaetan Rivet  */
25c752998bSGaetan Rivet 
26c752998bSGaetan Rivet static int
2752f711f7SAndy Green pci_get_kernel_driver_by_path(const char *filename, char *dri_name,
2852f711f7SAndy Green 			      size_t len)
29c752998bSGaetan Rivet {
30c752998bSGaetan Rivet 	int count;
31c752998bSGaetan Rivet 	char path[PATH_MAX];
32c752998bSGaetan Rivet 	char *name;
33c752998bSGaetan Rivet 
34c752998bSGaetan Rivet 	if (!filename || !dri_name)
35c752998bSGaetan Rivet 		return -1;
36c752998bSGaetan Rivet 
37c752998bSGaetan Rivet 	count = readlink(filename, path, PATH_MAX);
38c752998bSGaetan Rivet 	if (count >= PATH_MAX)
39c752998bSGaetan Rivet 		return -1;
40c752998bSGaetan Rivet 
41c752998bSGaetan Rivet 	/* For device does not have a driver */
42c752998bSGaetan Rivet 	if (count < 0)
43c752998bSGaetan Rivet 		return 1;
44c752998bSGaetan Rivet 
45c752998bSGaetan Rivet 	path[count] = '\0';
46c752998bSGaetan Rivet 
47c752998bSGaetan Rivet 	name = strrchr(path, '/');
48c752998bSGaetan Rivet 	if (name) {
4952f711f7SAndy Green 		strlcpy(dri_name, name + 1, len);
50c752998bSGaetan Rivet 		return 0;
51c752998bSGaetan Rivet 	}
52c752998bSGaetan Rivet 
53c752998bSGaetan Rivet 	return -1;
54c752998bSGaetan Rivet }
55c752998bSGaetan Rivet 
56c752998bSGaetan Rivet /* Map pci device */
57c752998bSGaetan Rivet int
58c752998bSGaetan Rivet rte_pci_map_device(struct rte_pci_device *dev)
59c752998bSGaetan Rivet {
60c752998bSGaetan Rivet 	int ret = -1;
61c752998bSGaetan Rivet 
62c752998bSGaetan Rivet 	/* try mapping the NIC resources using VFIO if it exists */
63c752998bSGaetan Rivet 	switch (dev->kdrv) {
647c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO:
65c752998bSGaetan Rivet #ifdef VFIO_PRESENT
66c752998bSGaetan Rivet 		if (pci_vfio_is_enabled())
67c752998bSGaetan Rivet 			ret = pci_vfio_map_resource(dev);
68c752998bSGaetan Rivet #endif
69c752998bSGaetan Rivet 		break;
707c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
717c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
72c752998bSGaetan Rivet 		if (rte_eal_using_phys_addrs()) {
73c752998bSGaetan Rivet 			/* map resources for devices that use uio */
74c752998bSGaetan Rivet 			ret = pci_uio_map_resource(dev);
75c752998bSGaetan Rivet 		}
76c752998bSGaetan Rivet 		break;
77c752998bSGaetan Rivet 	default:
78c752998bSGaetan Rivet 		RTE_LOG(DEBUG, EAL,
79c752998bSGaetan Rivet 			"  Not managed by a supported kernel driver, skipped\n");
80c752998bSGaetan Rivet 		ret = 1;
81c752998bSGaetan Rivet 		break;
82c752998bSGaetan Rivet 	}
83c752998bSGaetan Rivet 
84c752998bSGaetan Rivet 	return ret;
85c752998bSGaetan Rivet }
86c752998bSGaetan Rivet 
87c752998bSGaetan Rivet /* Unmap pci device */
88c752998bSGaetan Rivet void
89c752998bSGaetan Rivet rte_pci_unmap_device(struct rte_pci_device *dev)
90c752998bSGaetan Rivet {
91c752998bSGaetan Rivet 	/* try unmapping the NIC resources using VFIO if it exists */
92c752998bSGaetan Rivet 	switch (dev->kdrv) {
937c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO:
94c752998bSGaetan Rivet #ifdef VFIO_PRESENT
95c752998bSGaetan Rivet 		if (pci_vfio_is_enabled())
96c752998bSGaetan Rivet 			pci_vfio_unmap_resource(dev);
97c752998bSGaetan Rivet #endif
98c752998bSGaetan Rivet 		break;
997c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
1007c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
101c752998bSGaetan Rivet 		/* unmap resources for devices that use uio */
102c752998bSGaetan Rivet 		pci_uio_unmap_resource(dev);
103c752998bSGaetan Rivet 		break;
104c752998bSGaetan Rivet 	default:
105c752998bSGaetan Rivet 		RTE_LOG(DEBUG, EAL,
106c752998bSGaetan Rivet 			"  Not managed by a supported kernel driver, skipped\n");
107c752998bSGaetan Rivet 		break;
108c752998bSGaetan Rivet 	}
109c752998bSGaetan Rivet }
110c752998bSGaetan Rivet 
1117411d032SAnatoly Burakov static int
11266cc45e2SAnatoly Burakov find_max_end_va(const struct rte_memseg_list *msl, void *arg)
1137411d032SAnatoly Burakov {
1144104b2a4SAnatoly Burakov 	size_t sz = msl->len;
11566cc45e2SAnatoly Burakov 	void *end_va = RTE_PTR_ADD(msl->base_va, sz);
1167411d032SAnatoly Burakov 	void **max_va = arg;
1177411d032SAnatoly Burakov 
1187411d032SAnatoly Burakov 	if (*max_va < end_va)
1197411d032SAnatoly Burakov 		*max_va = end_va;
1207411d032SAnatoly Burakov 	return 0;
1217411d032SAnatoly Burakov }
1227411d032SAnatoly Burakov 
123c752998bSGaetan Rivet void *
124c752998bSGaetan Rivet pci_find_max_end_va(void)
125c752998bSGaetan Rivet {
1267411d032SAnatoly Burakov 	void *va = NULL;
127c752998bSGaetan Rivet 
12866cc45e2SAnatoly Burakov 	rte_memseg_list_walk(find_max_end_va, &va);
1297411d032SAnatoly Burakov 	return va;
130c752998bSGaetan Rivet }
131c752998bSGaetan Rivet 
13266cc45e2SAnatoly Burakov 
133c752998bSGaetan Rivet /* parse one line of the "resource" sysfs file (note that the 'line'
134c752998bSGaetan Rivet  * string is modified)
135c752998bSGaetan Rivet  */
136c752998bSGaetan Rivet int
137c752998bSGaetan Rivet pci_parse_one_sysfs_resource(char *line, size_t len, uint64_t *phys_addr,
138c752998bSGaetan Rivet 	uint64_t *end_addr, uint64_t *flags)
139c752998bSGaetan Rivet {
140c752998bSGaetan Rivet 	union pci_resource_info {
141c752998bSGaetan Rivet 		struct {
142c752998bSGaetan Rivet 			char *phys_addr;
143c752998bSGaetan Rivet 			char *end_addr;
144c752998bSGaetan Rivet 			char *flags;
145c752998bSGaetan Rivet 		};
146c752998bSGaetan Rivet 		char *ptrs[PCI_RESOURCE_FMT_NVAL];
147c752998bSGaetan Rivet 	} res_info;
148c752998bSGaetan Rivet 
149c752998bSGaetan Rivet 	if (rte_strsplit(line, len, res_info.ptrs, 3, ' ') != 3) {
150c752998bSGaetan Rivet 		RTE_LOG(ERR, EAL,
151c752998bSGaetan Rivet 			"%s(): bad resource format\n", __func__);
152c752998bSGaetan Rivet 		return -1;
153c752998bSGaetan Rivet 	}
154c752998bSGaetan Rivet 	errno = 0;
155c752998bSGaetan Rivet 	*phys_addr = strtoull(res_info.phys_addr, NULL, 16);
156c752998bSGaetan Rivet 	*end_addr = strtoull(res_info.end_addr, NULL, 16);
157c752998bSGaetan Rivet 	*flags = strtoull(res_info.flags, NULL, 16);
158c752998bSGaetan Rivet 	if (errno != 0) {
159c752998bSGaetan Rivet 		RTE_LOG(ERR, EAL,
160c752998bSGaetan Rivet 			"%s(): bad resource format\n", __func__);
161c752998bSGaetan Rivet 		return -1;
162c752998bSGaetan Rivet 	}
163c752998bSGaetan Rivet 
164c752998bSGaetan Rivet 	return 0;
165c752998bSGaetan Rivet }
166c752998bSGaetan Rivet 
167c752998bSGaetan Rivet /* parse the "resource" sysfs file */
168c752998bSGaetan Rivet static int
169c752998bSGaetan Rivet pci_parse_sysfs_resource(const char *filename, struct rte_pci_device *dev)
170c752998bSGaetan Rivet {
171c752998bSGaetan Rivet 	FILE *f;
172c752998bSGaetan Rivet 	char buf[BUFSIZ];
173c752998bSGaetan Rivet 	int i;
174c752998bSGaetan Rivet 	uint64_t phys_addr, end_addr, flags;
175c752998bSGaetan Rivet 
176c752998bSGaetan Rivet 	f = fopen(filename, "r");
177c752998bSGaetan Rivet 	if (f == NULL) {
178c752998bSGaetan Rivet 		RTE_LOG(ERR, EAL, "Cannot open sysfs resource\n");
179c752998bSGaetan Rivet 		return -1;
180c752998bSGaetan Rivet 	}
181c752998bSGaetan Rivet 
182c752998bSGaetan Rivet 	for (i = 0; i<PCI_MAX_RESOURCE; i++) {
183c752998bSGaetan Rivet 
184c752998bSGaetan Rivet 		if (fgets(buf, sizeof(buf), f) == NULL) {
185c752998bSGaetan Rivet 			RTE_LOG(ERR, EAL,
186c752998bSGaetan Rivet 				"%s(): cannot read resource\n", __func__);
187c752998bSGaetan Rivet 			goto error;
188c752998bSGaetan Rivet 		}
189c752998bSGaetan Rivet 		if (pci_parse_one_sysfs_resource(buf, sizeof(buf), &phys_addr,
190c752998bSGaetan Rivet 				&end_addr, &flags) < 0)
191c752998bSGaetan Rivet 			goto error;
192c752998bSGaetan Rivet 
193c752998bSGaetan Rivet 		if (flags & IORESOURCE_MEM) {
194c752998bSGaetan Rivet 			dev->mem_resource[i].phys_addr = phys_addr;
195c752998bSGaetan Rivet 			dev->mem_resource[i].len = end_addr - phys_addr + 1;
196c752998bSGaetan Rivet 			/* not mapped for now */
197c752998bSGaetan Rivet 			dev->mem_resource[i].addr = NULL;
198c752998bSGaetan Rivet 		}
199c752998bSGaetan Rivet 	}
200c752998bSGaetan Rivet 	fclose(f);
201c752998bSGaetan Rivet 	return 0;
202c752998bSGaetan Rivet 
203c752998bSGaetan Rivet error:
204c752998bSGaetan Rivet 	fclose(f);
205c752998bSGaetan Rivet 	return -1;
206c752998bSGaetan Rivet }
207c752998bSGaetan Rivet 
208c752998bSGaetan Rivet /* Scan one pci sysfs entry, and fill the devices list from it. */
209c752998bSGaetan Rivet static int
210c752998bSGaetan Rivet pci_scan_one(const char *dirname, const struct rte_pci_addr *addr)
211c752998bSGaetan Rivet {
212c752998bSGaetan Rivet 	char filename[PATH_MAX];
213c752998bSGaetan Rivet 	unsigned long tmp;
214c752998bSGaetan Rivet 	struct rte_pci_device *dev;
215c752998bSGaetan Rivet 	char driver[PATH_MAX];
216c752998bSGaetan Rivet 	int ret;
217c752998bSGaetan Rivet 
218c752998bSGaetan Rivet 	dev = malloc(sizeof(*dev));
219c752998bSGaetan Rivet 	if (dev == NULL)
220c752998bSGaetan Rivet 		return -1;
221c752998bSGaetan Rivet 
222c752998bSGaetan Rivet 	memset(dev, 0, sizeof(*dev));
2236844d146SThomas Monjalon 	dev->device.bus = &rte_pci_bus.bus;
224c752998bSGaetan Rivet 	dev->addr = *addr;
225c752998bSGaetan Rivet 
226c752998bSGaetan Rivet 	/* get vendor id */
227c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/vendor", dirname);
228c752998bSGaetan Rivet 	if (eal_parse_sysfs_value(filename, &tmp) < 0) {
229*8f4de2dbSDavid Marchand 		pci_free(dev);
230c752998bSGaetan Rivet 		return -1;
231c752998bSGaetan Rivet 	}
232c752998bSGaetan Rivet 	dev->id.vendor_id = (uint16_t)tmp;
233c752998bSGaetan Rivet 
234c752998bSGaetan Rivet 	/* get device id */
235c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/device", dirname);
236c752998bSGaetan Rivet 	if (eal_parse_sysfs_value(filename, &tmp) < 0) {
237*8f4de2dbSDavid Marchand 		pci_free(dev);
238c752998bSGaetan Rivet 		return -1;
239c752998bSGaetan Rivet 	}
240c752998bSGaetan Rivet 	dev->id.device_id = (uint16_t)tmp;
241c752998bSGaetan Rivet 
242c752998bSGaetan Rivet 	/* get subsystem_vendor id */
243c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/subsystem_vendor",
244c752998bSGaetan Rivet 		 dirname);
245c752998bSGaetan Rivet 	if (eal_parse_sysfs_value(filename, &tmp) < 0) {
246*8f4de2dbSDavid Marchand 		pci_free(dev);
247c752998bSGaetan Rivet 		return -1;
248c752998bSGaetan Rivet 	}
249c752998bSGaetan Rivet 	dev->id.subsystem_vendor_id = (uint16_t)tmp;
250c752998bSGaetan Rivet 
251c752998bSGaetan Rivet 	/* get subsystem_device id */
252c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/subsystem_device",
253c752998bSGaetan Rivet 		 dirname);
254c752998bSGaetan Rivet 	if (eal_parse_sysfs_value(filename, &tmp) < 0) {
255*8f4de2dbSDavid Marchand 		pci_free(dev);
256c752998bSGaetan Rivet 		return -1;
257c752998bSGaetan Rivet 	}
258c752998bSGaetan Rivet 	dev->id.subsystem_device_id = (uint16_t)tmp;
259c752998bSGaetan Rivet 
260c752998bSGaetan Rivet 	/* get class_id */
261c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/class",
262c752998bSGaetan Rivet 		 dirname);
263c752998bSGaetan Rivet 	if (eal_parse_sysfs_value(filename, &tmp) < 0) {
264*8f4de2dbSDavid Marchand 		pci_free(dev);
265c752998bSGaetan Rivet 		return -1;
266c752998bSGaetan Rivet 	}
267c752998bSGaetan Rivet 	/* the least 24 bits are valid: class, subclass, program interface */
268c752998bSGaetan Rivet 	dev->id.class_id = (uint32_t)tmp & RTE_CLASS_ANY_ID;
269c752998bSGaetan Rivet 
270c752998bSGaetan Rivet 	/* get max_vfs */
271c752998bSGaetan Rivet 	dev->max_vfs = 0;
272c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/max_vfs", dirname);
273c752998bSGaetan Rivet 	if (!access(filename, F_OK) &&
274c752998bSGaetan Rivet 	    eal_parse_sysfs_value(filename, &tmp) == 0)
275c752998bSGaetan Rivet 		dev->max_vfs = (uint16_t)tmp;
276c752998bSGaetan Rivet 	else {
277c752998bSGaetan Rivet 		/* for non igb_uio driver, need kernel version >= 3.8 */
278c752998bSGaetan Rivet 		snprintf(filename, sizeof(filename),
279c752998bSGaetan Rivet 			 "%s/sriov_numvfs", dirname);
280c752998bSGaetan Rivet 		if (!access(filename, F_OK) &&
281c752998bSGaetan Rivet 		    eal_parse_sysfs_value(filename, &tmp) == 0)
282c752998bSGaetan Rivet 			dev->max_vfs = (uint16_t)tmp;
283c752998bSGaetan Rivet 	}
284c752998bSGaetan Rivet 
285c752998bSGaetan Rivet 	/* get numa node, default to 0 if not present */
286c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/numa_node",
287c752998bSGaetan Rivet 		 dirname);
288c752998bSGaetan Rivet 
289c752998bSGaetan Rivet 	if (access(filename, F_OK) != -1) {
290c752998bSGaetan Rivet 		if (eal_parse_sysfs_value(filename, &tmp) == 0)
291c752998bSGaetan Rivet 			dev->device.numa_node = tmp;
292c752998bSGaetan Rivet 		else
293c752998bSGaetan Rivet 			dev->device.numa_node = -1;
294c752998bSGaetan Rivet 	} else {
295c752998bSGaetan Rivet 		dev->device.numa_node = 0;
296c752998bSGaetan Rivet 	}
297c752998bSGaetan Rivet 
298*8f4de2dbSDavid Marchand 	pci_common_set(dev);
299c752998bSGaetan Rivet 
300c752998bSGaetan Rivet 	/* parse resources */
301c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/resource", dirname);
302c752998bSGaetan Rivet 	if (pci_parse_sysfs_resource(filename, dev) < 0) {
303c752998bSGaetan Rivet 		RTE_LOG(ERR, EAL, "%s(): cannot parse resource\n", __func__);
304*8f4de2dbSDavid Marchand 		pci_free(dev);
305c752998bSGaetan Rivet 		return -1;
306c752998bSGaetan Rivet 	}
307c752998bSGaetan Rivet 
308c752998bSGaetan Rivet 	/* parse driver */
309c752998bSGaetan Rivet 	snprintf(filename, sizeof(filename), "%s/driver", dirname);
31052f711f7SAndy Green 	ret = pci_get_kernel_driver_by_path(filename, driver, sizeof(driver));
311c752998bSGaetan Rivet 	if (ret < 0) {
312c752998bSGaetan Rivet 		RTE_LOG(ERR, EAL, "Fail to get kernel driver\n");
313*8f4de2dbSDavid Marchand 		pci_free(dev);
314c752998bSGaetan Rivet 		return -1;
315c752998bSGaetan Rivet 	}
316c752998bSGaetan Rivet 
317c752998bSGaetan Rivet 	if (!ret) {
318c752998bSGaetan Rivet 		if (!strcmp(driver, "vfio-pci"))
3197c0d798aSDavid Marchand 			dev->kdrv = RTE_PCI_KDRV_VFIO;
320c752998bSGaetan Rivet 		else if (!strcmp(driver, "igb_uio"))
3217c0d798aSDavid Marchand 			dev->kdrv = RTE_PCI_KDRV_IGB_UIO;
322c752998bSGaetan Rivet 		else if (!strcmp(driver, "uio_pci_generic"))
3237c0d798aSDavid Marchand 			dev->kdrv = RTE_PCI_KDRV_UIO_GENERIC;
324c752998bSGaetan Rivet 		else
3257c0d798aSDavid Marchand 			dev->kdrv = RTE_PCI_KDRV_UNKNOWN;
326c79a1c67SJerin Jacob 	} else {
327*8f4de2dbSDavid Marchand 		pci_free(dev);
328c79a1c67SJerin Jacob 		return 0;
329c79a1c67SJerin Jacob 	}
330c752998bSGaetan Rivet 	/* device is valid, add in list (sorted) */
331c752998bSGaetan Rivet 	if (TAILQ_EMPTY(&rte_pci_bus.device_list)) {
332c752998bSGaetan Rivet 		rte_pci_add_device(dev);
333c752998bSGaetan Rivet 	} else {
334c752998bSGaetan Rivet 		struct rte_pci_device *dev2;
335c752998bSGaetan Rivet 		int ret;
336c752998bSGaetan Rivet 
337c752998bSGaetan Rivet 		TAILQ_FOREACH(dev2, &rte_pci_bus.device_list, next) {
3380e3ef055SGaetan Rivet 			ret = rte_pci_addr_cmp(&dev->addr, &dev2->addr);
339c752998bSGaetan Rivet 			if (ret > 0)
340c752998bSGaetan Rivet 				continue;
341c752998bSGaetan Rivet 
342c752998bSGaetan Rivet 			if (ret < 0) {
343c752998bSGaetan Rivet 				rte_pci_insert_device(dev2, dev);
344c752998bSGaetan Rivet 			} else { /* already registered */
34555e411b3SQi Zhang 				if (!rte_dev_is_probed(&dev2->device)) {
346c752998bSGaetan Rivet 					dev2->kdrv = dev->kdrv;
347c752998bSGaetan Rivet 					dev2->max_vfs = dev->max_vfs;
3489d3ad80aSJim Harris 					dev2->id = dev->id;
349*8f4de2dbSDavid Marchand 					pci_common_set(dev2);
35055e411b3SQi Zhang 					memmove(dev2->mem_resource,
35155e411b3SQi Zhang 						dev->mem_resource,
352c752998bSGaetan Rivet 						sizeof(dev->mem_resource));
35355e411b3SQi Zhang 				} else {
35455e411b3SQi Zhang 					/**
35555e411b3SQi Zhang 					 * If device is plugged and driver is
35655e411b3SQi Zhang 					 * probed already, (This happens when
35755e411b3SQi Zhang 					 * we call rte_dev_probe which will
35855e411b3SQi Zhang 					 * scan all device on the bus) we don't
35955e411b3SQi Zhang 					 * need to do anything here unless...
36055e411b3SQi Zhang 					 **/
36155e411b3SQi Zhang 					if (dev2->kdrv != dev->kdrv ||
3629d3ad80aSJim Harris 						dev2->max_vfs != dev->max_vfs ||
3639d3ad80aSJim Harris 						memcmp(&dev2->id, &dev->id, sizeof(dev2->id)))
36455e411b3SQi Zhang 						/*
36555e411b3SQi Zhang 						 * This should not happens.
36655e411b3SQi Zhang 						 * But it is still possible if
36755e411b3SQi Zhang 						 * we unbind a device from
36855e411b3SQi Zhang 						 * vfio or uio before hotplug
36955e411b3SQi Zhang 						 * remove and rebind it with
37055e411b3SQi Zhang 						 * a different configure.
37155e411b3SQi Zhang 						 * So we just print out the
37255e411b3SQi Zhang 						 * error as an alarm.
37355e411b3SQi Zhang 						 */
37455e411b3SQi Zhang 						RTE_LOG(ERR, EAL, "Unexpected device scan at %s!\n",
37555e411b3SQi Zhang 							filename);
376fc67ae91SSomnath Kotur 					else if (dev2->device.devargs !=
377fc67ae91SSomnath Kotur 						 dev->device.devargs) {
378fc67ae91SSomnath Kotur 						rte_devargs_remove(dev2->device.devargs);
379*8f4de2dbSDavid Marchand 						pci_common_set(dev2);
380fc67ae91SSomnath Kotur 					}
38155e411b3SQi Zhang 				}
382*8f4de2dbSDavid Marchand 				pci_free(dev);
383c752998bSGaetan Rivet 			}
384c752998bSGaetan Rivet 			return 0;
385c752998bSGaetan Rivet 		}
386c752998bSGaetan Rivet 
387c752998bSGaetan Rivet 		rte_pci_add_device(dev);
388c752998bSGaetan Rivet 	}
389c752998bSGaetan Rivet 
390c752998bSGaetan Rivet 	return 0;
391c752998bSGaetan Rivet }
392c752998bSGaetan Rivet 
393c752998bSGaetan Rivet /*
394c752998bSGaetan Rivet  * split up a pci address into its constituent parts.
395c752998bSGaetan Rivet  */
396c752998bSGaetan Rivet static int
397c752998bSGaetan Rivet parse_pci_addr_format(const char *buf, int bufsize, struct rte_pci_addr *addr)
398c752998bSGaetan Rivet {
399c752998bSGaetan Rivet 	/* first split on ':' */
400c752998bSGaetan Rivet 	union splitaddr {
401c752998bSGaetan Rivet 		struct {
402c752998bSGaetan Rivet 			char *domain;
403c752998bSGaetan Rivet 			char *bus;
404c752998bSGaetan Rivet 			char *devid;
405c752998bSGaetan Rivet 			char *function;
406c752998bSGaetan Rivet 		};
407c752998bSGaetan Rivet 		char *str[PCI_FMT_NVAL]; /* last element-separator is "." not ":" */
408c752998bSGaetan Rivet 	} splitaddr;
409c752998bSGaetan Rivet 
410c752998bSGaetan Rivet 	char *buf_copy = strndup(buf, bufsize);
411c752998bSGaetan Rivet 	if (buf_copy == NULL)
412c752998bSGaetan Rivet 		return -1;
413c752998bSGaetan Rivet 
414c752998bSGaetan Rivet 	if (rte_strsplit(buf_copy, bufsize, splitaddr.str, PCI_FMT_NVAL, ':')
415c752998bSGaetan Rivet 			!= PCI_FMT_NVAL - 1)
416c752998bSGaetan Rivet 		goto error;
417c752998bSGaetan Rivet 	/* final split is on '.' between devid and function */
418c752998bSGaetan Rivet 	splitaddr.function = strchr(splitaddr.devid,'.');
419c752998bSGaetan Rivet 	if (splitaddr.function == NULL)
420c752998bSGaetan Rivet 		goto error;
421c752998bSGaetan Rivet 	*splitaddr.function++ = '\0';
422c752998bSGaetan Rivet 
423c752998bSGaetan Rivet 	/* now convert to int values */
424c752998bSGaetan Rivet 	errno = 0;
425c752998bSGaetan Rivet 	addr->domain = strtoul(splitaddr.domain, NULL, 16);
426c752998bSGaetan Rivet 	addr->bus = strtoul(splitaddr.bus, NULL, 16);
427c752998bSGaetan Rivet 	addr->devid = strtoul(splitaddr.devid, NULL, 16);
428c752998bSGaetan Rivet 	addr->function = strtoul(splitaddr.function, NULL, 10);
429c752998bSGaetan Rivet 	if (errno != 0)
430c752998bSGaetan Rivet 		goto error;
431c752998bSGaetan Rivet 
432c752998bSGaetan Rivet 	free(buf_copy); /* free the copy made with strdup */
433c752998bSGaetan Rivet 	return 0;
434c752998bSGaetan Rivet error:
435c752998bSGaetan Rivet 	free(buf_copy);
436c752998bSGaetan Rivet 	return -1;
437c752998bSGaetan Rivet }
438c752998bSGaetan Rivet 
439c752998bSGaetan Rivet /*
440c752998bSGaetan Rivet  * Scan the content of the PCI bus, and the devices in the devices
441c752998bSGaetan Rivet  * list
442c752998bSGaetan Rivet  */
443c752998bSGaetan Rivet int
444c752998bSGaetan Rivet rte_pci_scan(void)
445c752998bSGaetan Rivet {
446c752998bSGaetan Rivet 	struct dirent *e;
447c752998bSGaetan Rivet 	DIR *dir;
448c752998bSGaetan Rivet 	char dirname[PATH_MAX];
449c752998bSGaetan Rivet 	struct rte_pci_addr addr;
450c752998bSGaetan Rivet 
451c752998bSGaetan Rivet 	/* for debug purposes, PCI can be disabled */
452c752998bSGaetan Rivet 	if (!rte_eal_has_pci())
453c752998bSGaetan Rivet 		return 0;
454c752998bSGaetan Rivet 
455c752998bSGaetan Rivet #ifdef VFIO_PRESENT
456c752998bSGaetan Rivet 	if (!pci_vfio_is_enabled())
457c752998bSGaetan Rivet 		RTE_LOG(DEBUG, EAL, "VFIO PCI modules not loaded\n");
458c752998bSGaetan Rivet #endif
459c752998bSGaetan Rivet 
460c52dd394SThomas Monjalon 	dir = opendir(rte_pci_get_sysfs_path());
461c752998bSGaetan Rivet 	if (dir == NULL) {
462c752998bSGaetan Rivet 		RTE_LOG(ERR, EAL, "%s(): opendir failed: %s\n",
463c752998bSGaetan Rivet 			__func__, strerror(errno));
464c752998bSGaetan Rivet 		return -1;
465c752998bSGaetan Rivet 	}
466c752998bSGaetan Rivet 
467c752998bSGaetan Rivet 	while ((e = readdir(dir)) != NULL) {
468c752998bSGaetan Rivet 		if (e->d_name[0] == '.')
469c752998bSGaetan Rivet 			continue;
470c752998bSGaetan Rivet 
471c752998bSGaetan Rivet 		if (parse_pci_addr_format(e->d_name, sizeof(e->d_name), &addr) != 0)
472c752998bSGaetan Rivet 			continue;
473c752998bSGaetan Rivet 
474463a5245SSunil Kumar Kori 		if (rte_pci_ignore_device(&addr))
475463a5245SSunil Kumar Kori 			continue;
476463a5245SSunil Kumar Kori 
477c752998bSGaetan Rivet 		snprintf(dirname, sizeof(dirname), "%s/%s",
478c52dd394SThomas Monjalon 				rte_pci_get_sysfs_path(), e->d_name);
479c752998bSGaetan Rivet 
480c752998bSGaetan Rivet 		if (pci_scan_one(dirname, &addr) < 0)
481c752998bSGaetan Rivet 			goto error;
482c752998bSGaetan Rivet 	}
483c752998bSGaetan Rivet 	closedir(dir);
484c752998bSGaetan Rivet 	return 0;
485c752998bSGaetan Rivet 
486c752998bSGaetan Rivet error:
487c752998bSGaetan Rivet 	closedir(dir);
488c752998bSGaetan Rivet 	return -1;
489c752998bSGaetan Rivet }
490c752998bSGaetan Rivet 
49154a328f5SMaxime Coquelin #if defined(RTE_ARCH_X86)
49266d3724bSDavid Marchand bool
49366d3724bSDavid Marchand pci_device_iommu_support_va(const struct rte_pci_device *dev)
49454a328f5SMaxime Coquelin {
49554a328f5SMaxime Coquelin #define VTD_CAP_MGAW_SHIFT	16
49654a328f5SMaxime Coquelin #define VTD_CAP_MGAW_MASK	(0x3fULL << VTD_CAP_MGAW_SHIFT)
497703458e1SBen Walker 	const struct rte_pci_addr *addr = &dev->addr;
49854a328f5SMaxime Coquelin 	char filename[PATH_MAX];
49954a328f5SMaxime Coquelin 	FILE *fp;
50054a328f5SMaxime Coquelin 	uint64_t mgaw, vtd_cap_reg = 0;
50154a328f5SMaxime Coquelin 
50254a328f5SMaxime Coquelin 	snprintf(filename, sizeof(filename),
50354a328f5SMaxime Coquelin 		 "%s/" PCI_PRI_FMT "/iommu/intel-iommu/cap",
50454a328f5SMaxime Coquelin 		 rte_pci_get_sysfs_path(), addr->domain, addr->bus, addr->devid,
50554a328f5SMaxime Coquelin 		 addr->function);
50654a328f5SMaxime Coquelin 
50754a328f5SMaxime Coquelin 	fp = fopen(filename, "r");
50854a328f5SMaxime Coquelin 	if (fp == NULL) {
5092e8d5cf7SStephen Hemminger 		/* We don't have an Intel IOMMU, assume VA supported */
5102e8d5cf7SStephen Hemminger 		if (errno == ENOENT)
5112e8d5cf7SStephen Hemminger 			return true;
5122e8d5cf7SStephen Hemminger 
5132e8d5cf7SStephen Hemminger 		RTE_LOG(ERR, EAL, "%s(): can't open %s: %s\n",
5142e8d5cf7SStephen Hemminger 			__func__, filename, strerror(errno));
51554a328f5SMaxime Coquelin 		return false;
51654a328f5SMaxime Coquelin 	}
51754a328f5SMaxime Coquelin 
5182e8d5cf7SStephen Hemminger 	/* We have an Intel IOMMU */
51954a328f5SMaxime Coquelin 	if (fscanf(fp, "%" PRIx64, &vtd_cap_reg) != 1) {
52054a328f5SMaxime Coquelin 		RTE_LOG(ERR, EAL, "%s(): can't read %s\n", __func__, filename);
52154a328f5SMaxime Coquelin 		fclose(fp);
52254a328f5SMaxime Coquelin 		return false;
52354a328f5SMaxime Coquelin 	}
52454a328f5SMaxime Coquelin 
52554a328f5SMaxime Coquelin 	fclose(fp);
52654a328f5SMaxime Coquelin 
52754a328f5SMaxime Coquelin 	mgaw = ((vtd_cap_reg & VTD_CAP_MGAW_MASK) >> VTD_CAP_MGAW_SHIFT) + 1;
52854a328f5SMaxime Coquelin 
529ec200687SAlejandro Lucero 	/*
530ec200687SAlejandro Lucero 	 * Assuming there is no limitation by now. We can not know at this point
531ec200687SAlejandro Lucero 	 * because the memory has not been initialized yet. Setting the dma mask
532ec200687SAlejandro Lucero 	 * will force a check once memory initialization is done. We can not do
533ec200687SAlejandro Lucero 	 * a fallback to IOVA PA now, but if the dma check fails, the error
534ec200687SAlejandro Lucero 	 * message should advice for using '--iova-mode pa' if IOVA VA is the
535ec200687SAlejandro Lucero 	 * current mode.
536ec200687SAlejandro Lucero 	 */
537ec200687SAlejandro Lucero 	rte_mem_set_dma_mask(mgaw);
538ec200687SAlejandro Lucero 	return true;
53954a328f5SMaxime Coquelin }
54054a328f5SMaxime Coquelin #elif defined(RTE_ARCH_PPC_64)
54166d3724bSDavid Marchand bool
54266d3724bSDavid Marchand pci_device_iommu_support_va(__rte_unused const struct rte_pci_device *dev)
54354a328f5SMaxime Coquelin {
54490521573SDavid Christensen 	/*
545fc5bffb8SDavid Christensen 	 * All POWER systems support an IOMMU, but only IOMMUv2 supports
546fc5bffb8SDavid Christensen 	 * IOVA = VA in DPDK. Check contents of /proc/cpuinfo to find the
547fc5bffb8SDavid Christensen 	 * system.
548fc5bffb8SDavid Christensen 	 *
549fc5bffb8SDavid Christensen 	 * Platform | Model |  IOMMU  | VA? |             Comment
550fc5bffb8SDavid Christensen 	 * ---------+-------+---------+-----+---------------------------------
551fc5bffb8SDavid Christensen 	 *  PowerNV |  N/A  | IOMMUv2 | Yes | OpenPOWER (Bare Metal)
552fc5bffb8SDavid Christensen 	 *  pSeries | ~qemu | IOMMUv2 | Yes | PowerVM Logical Partition (LPAR)
553fc5bffb8SDavid Christensen 	 *  pSeries |  qemu | IOMMUv1 |  No | QEMU Virtual Machine
55490521573SDavid Christensen 	 */
55590521573SDavid Christensen 
55690521573SDavid Christensen 	char *line = NULL;
55790521573SDavid Christensen 	size_t len = 0;
55890521573SDavid Christensen 	char filename[PATH_MAX] = "/proc/cpuinfo";
55990521573SDavid Christensen 	FILE *fp = fopen(filename, "r");
560fc5bffb8SDavid Christensen 	bool pseries = false, powernv = false, qemu = false;
56190521573SDavid Christensen 	bool ret = false;
56290521573SDavid Christensen 
56390521573SDavid Christensen 	if (fp == NULL) {
56490521573SDavid Christensen 		RTE_LOG(ERR, EAL, "%s(): can't open %s: %s\n",
56590521573SDavid Christensen 			__func__, filename, strerror(errno));
56690521573SDavid Christensen 		return ret;
56790521573SDavid Christensen 	}
56890521573SDavid Christensen 
569fc5bffb8SDavid Christensen 	/* Check the "platform" and "model" fields */
57090521573SDavid Christensen 	while (getline(&line, &len, fp) != -1) {
571fc5bffb8SDavid Christensen 		if (strstr(line, "platform") != NULL) {
57290521573SDavid Christensen 			if (strstr(line, "PowerNV") != NULL) {
573fc5bffb8SDavid Christensen 				RTE_LOG(DEBUG, EAL, "Running on a PowerNV platform\n");
574fc5bffb8SDavid Christensen 				powernv = true;
575fc5bffb8SDavid Christensen 			} else if (strstr(line, "pSeries") != NULL) {
576fc5bffb8SDavid Christensen 				RTE_LOG(DEBUG, EAL, "Running on a pSeries platform\n");
577fc5bffb8SDavid Christensen 				pseries = true;
578fc5bffb8SDavid Christensen 			}
579fc5bffb8SDavid Christensen 		} else if (strstr(line, "model") != NULL) {
580fc5bffb8SDavid Christensen 			if (strstr(line, "qemu") != NULL) {
581fc5bffb8SDavid Christensen 				RTE_LOG(DEBUG, EAL, "Found qemu emulation\n");
582fc5bffb8SDavid Christensen 				qemu = true;
583fc5bffb8SDavid Christensen 			}
58490521573SDavid Christensen 		}
58590521573SDavid Christensen 	}
58690521573SDavid Christensen 
58790521573SDavid Christensen 	free(line);
58890521573SDavid Christensen 	fclose(fp);
589fc5bffb8SDavid Christensen 
590fc5bffb8SDavid Christensen 	if (powernv || (pseries && !qemu))
591fc5bffb8SDavid Christensen 		ret = true;
59290521573SDavid Christensen 	return ret;
59354a328f5SMaxime Coquelin }
59454a328f5SMaxime Coquelin #else
59566d3724bSDavid Marchand bool
59666d3724bSDavid Marchand pci_device_iommu_support_va(__rte_unused const struct rte_pci_device *dev)
59754a328f5SMaxime Coquelin {
59854a328f5SMaxime Coquelin 	return true;
59954a328f5SMaxime Coquelin }
60054a328f5SMaxime Coquelin #endif
60154a328f5SMaxime Coquelin 
602c752998bSGaetan Rivet enum rte_iova_mode
603703458e1SBen Walker pci_device_iova_mode(const struct rte_pci_driver *pdrv,
604703458e1SBen Walker 		     const struct rte_pci_device *pdev)
605c752998bSGaetan Rivet {
606703458e1SBen Walker 	enum rte_iova_mode iova_mode = RTE_IOVA_DC;
607c752998bSGaetan Rivet 
608703458e1SBen Walker 	switch (pdev->kdrv) {
6097c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO: {
610c752998bSGaetan Rivet #ifdef VFIO_PRESENT
611703458e1SBen Walker 		static int is_vfio_noiommu_enabled = -1;
612703458e1SBen Walker 
613703458e1SBen Walker 		if (is_vfio_noiommu_enabled == -1) {
614703458e1SBen Walker 			if (rte_vfio_noiommu_is_enabled() == 1)
615703458e1SBen Walker 				is_vfio_noiommu_enabled = 1;
616703458e1SBen Walker 			else
617703458e1SBen Walker 				is_vfio_noiommu_enabled = 0;
618703458e1SBen Walker 		}
619b76fafb1SDavid Marchand 		if (is_vfio_noiommu_enabled != 0)
620703458e1SBen Walker 			iova_mode = RTE_IOVA_PA;
621d622cad8SJerin Jacob 		else if ((pdrv->drv_flags & RTE_PCI_DRV_NEED_IOVA_AS_VA) != 0)
622b76fafb1SDavid Marchand 			iova_mode = RTE_IOVA_VA;
623c752998bSGaetan Rivet #endif
624703458e1SBen Walker 		break;
625c752998bSGaetan Rivet 	}
626c752998bSGaetan Rivet 
6277c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
6287c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
629703458e1SBen Walker 		iova_mode = RTE_IOVA_PA;
630703458e1SBen Walker 		break;
631703458e1SBen Walker 
632703458e1SBen Walker 	default:
633d622cad8SJerin Jacob 		if ((pdrv->drv_flags & RTE_PCI_DRV_NEED_IOVA_AS_VA) != 0)
634b76fafb1SDavid Marchand 			iova_mode = RTE_IOVA_VA;
635703458e1SBen Walker 		break;
636703458e1SBen Walker 	}
637703458e1SBen Walker 	return iova_mode;
638c752998bSGaetan Rivet }
639c752998bSGaetan Rivet 
640c752998bSGaetan Rivet /* Read PCI config space. */
641c752998bSGaetan Rivet int rte_pci_read_config(const struct rte_pci_device *device,
642c752998bSGaetan Rivet 		void *buf, size_t len, off_t offset)
643c752998bSGaetan Rivet {
644630deed6SAlejandro Lucero 	char devname[RTE_DEV_NAME_MAX_LEN] = "";
645d61138d4SHarman Kalra 	const struct rte_intr_handle *intr_handle = device->intr_handle;
646c752998bSGaetan Rivet 
647630deed6SAlejandro Lucero 	switch (device->kdrv) {
6487c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
6497c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
650c752998bSGaetan Rivet 		return pci_uio_read_config(intr_handle, buf, len, offset);
651c752998bSGaetan Rivet #ifdef VFIO_PRESENT
6527c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO:
653c752998bSGaetan Rivet 		return pci_vfio_read_config(intr_handle, buf, len, offset);
654c752998bSGaetan Rivet #endif
655c752998bSGaetan Rivet 	default:
656630deed6SAlejandro Lucero 		rte_pci_device_name(&device->addr, devname,
657630deed6SAlejandro Lucero 				    RTE_DEV_NAME_MAX_LEN);
658c752998bSGaetan Rivet 		RTE_LOG(ERR, EAL,
659630deed6SAlejandro Lucero 			"Unknown driver type for %s\n", devname);
660c752998bSGaetan Rivet 		return -1;
661c752998bSGaetan Rivet 	}
662c752998bSGaetan Rivet }
663c752998bSGaetan Rivet 
664c752998bSGaetan Rivet /* Write PCI config space. */
665c752998bSGaetan Rivet int rte_pci_write_config(const struct rte_pci_device *device,
666c752998bSGaetan Rivet 		const void *buf, size_t len, off_t offset)
667c752998bSGaetan Rivet {
668630deed6SAlejandro Lucero 	char devname[RTE_DEV_NAME_MAX_LEN] = "";
669d61138d4SHarman Kalra 	const struct rte_intr_handle *intr_handle = device->intr_handle;
670c752998bSGaetan Rivet 
671630deed6SAlejandro Lucero 	switch (device->kdrv) {
6727c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
6737c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
674c752998bSGaetan Rivet 		return pci_uio_write_config(intr_handle, buf, len, offset);
675c752998bSGaetan Rivet #ifdef VFIO_PRESENT
6767c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO:
677c752998bSGaetan Rivet 		return pci_vfio_write_config(intr_handle, buf, len, offset);
678c752998bSGaetan Rivet #endif
679c752998bSGaetan Rivet 	default:
680630deed6SAlejandro Lucero 		rte_pci_device_name(&device->addr, devname,
681630deed6SAlejandro Lucero 				    RTE_DEV_NAME_MAX_LEN);
682c752998bSGaetan Rivet 		RTE_LOG(ERR, EAL,
683630deed6SAlejandro Lucero 			"Unknown driver type for %s\n", devname);
684c752998bSGaetan Rivet 		return -1;
685c752998bSGaetan Rivet 	}
686c752998bSGaetan Rivet }
687c752998bSGaetan Rivet 
688c752998bSGaetan Rivet int
689c752998bSGaetan Rivet rte_pci_ioport_map(struct rte_pci_device *dev, int bar,
690c752998bSGaetan Rivet 		struct rte_pci_ioport *p)
691c752998bSGaetan Rivet {
692c752998bSGaetan Rivet 	int ret = -1;
693c752998bSGaetan Rivet 
694c752998bSGaetan Rivet 	switch (dev->kdrv) {
695c752998bSGaetan Rivet #ifdef VFIO_PRESENT
6967c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO:
697c752998bSGaetan Rivet 		if (pci_vfio_is_enabled())
698c752998bSGaetan Rivet 			ret = pci_vfio_ioport_map(dev, bar, p);
699c752998bSGaetan Rivet 		break;
700c752998bSGaetan Rivet #endif
7017c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
7027c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
703c752998bSGaetan Rivet 		ret = pci_uio_ioport_map(dev, bar, p);
704c752998bSGaetan Rivet 		break;
705c752998bSGaetan Rivet 	default:
706c752998bSGaetan Rivet 		break;
707c752998bSGaetan Rivet 	}
708c752998bSGaetan Rivet 
709c752998bSGaetan Rivet 	if (!ret)
710c752998bSGaetan Rivet 		p->dev = dev;
711c752998bSGaetan Rivet 
712c752998bSGaetan Rivet 	return ret;
713c752998bSGaetan Rivet }
714c752998bSGaetan Rivet 
715c752998bSGaetan Rivet void
716c752998bSGaetan Rivet rte_pci_ioport_read(struct rte_pci_ioport *p,
717c752998bSGaetan Rivet 		void *data, size_t len, off_t offset)
718c752998bSGaetan Rivet {
719c752998bSGaetan Rivet 	switch (p->dev->kdrv) {
720c752998bSGaetan Rivet #ifdef VFIO_PRESENT
7217c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO:
722c752998bSGaetan Rivet 		pci_vfio_ioport_read(p, data, len, offset);
723c752998bSGaetan Rivet 		break;
724c752998bSGaetan Rivet #endif
7257c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
7267c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
727c752998bSGaetan Rivet 		pci_uio_ioport_read(p, data, len, offset);
728c752998bSGaetan Rivet 		break;
729c752998bSGaetan Rivet 	default:
730c752998bSGaetan Rivet 		break;
731c752998bSGaetan Rivet 	}
732c752998bSGaetan Rivet }
733c752998bSGaetan Rivet 
734c752998bSGaetan Rivet void
735c752998bSGaetan Rivet rte_pci_ioport_write(struct rte_pci_ioport *p,
736c752998bSGaetan Rivet 		const void *data, size_t len, off_t offset)
737c752998bSGaetan Rivet {
738c752998bSGaetan Rivet 	switch (p->dev->kdrv) {
739c752998bSGaetan Rivet #ifdef VFIO_PRESENT
7407c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO:
741c752998bSGaetan Rivet 		pci_vfio_ioport_write(p, data, len, offset);
742c752998bSGaetan Rivet 		break;
743c752998bSGaetan Rivet #endif
7447c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
7457c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
746c752998bSGaetan Rivet 		pci_uio_ioport_write(p, data, len, offset);
747c752998bSGaetan Rivet 		break;
748c752998bSGaetan Rivet 	default:
749c752998bSGaetan Rivet 		break;
750c752998bSGaetan Rivet 	}
751c752998bSGaetan Rivet }
752c752998bSGaetan Rivet 
753c752998bSGaetan Rivet int
754c752998bSGaetan Rivet rte_pci_ioport_unmap(struct rte_pci_ioport *p)
755c752998bSGaetan Rivet {
756c752998bSGaetan Rivet 	int ret = -1;
757c752998bSGaetan Rivet 
758c752998bSGaetan Rivet 	switch (p->dev->kdrv) {
759c752998bSGaetan Rivet #ifdef VFIO_PRESENT
7607c0d798aSDavid Marchand 	case RTE_PCI_KDRV_VFIO:
761c752998bSGaetan Rivet 		if (pci_vfio_is_enabled())
762c752998bSGaetan Rivet 			ret = pci_vfio_ioport_unmap(p);
763c752998bSGaetan Rivet 		break;
764c752998bSGaetan Rivet #endif
7657c0d798aSDavid Marchand 	case RTE_PCI_KDRV_IGB_UIO:
7667c0d798aSDavid Marchand 	case RTE_PCI_KDRV_UIO_GENERIC:
767c752998bSGaetan Rivet 		ret = pci_uio_ioport_unmap(p);
768c752998bSGaetan Rivet 		break;
769c752998bSGaetan Rivet 	default:
770c752998bSGaetan Rivet 		break;
771c752998bSGaetan Rivet 	}
772c752998bSGaetan Rivet 
773c752998bSGaetan Rivet 	return ret;
774c752998bSGaetan Rivet }
775