xref: /dpdk/drivers/bus/pci/bsd/pci.c (revision 9a710863decb1cdb98efbdd5e11df3ebcfcc37b6) 
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2014 Intel Corporation
3  */
4 
5 #include <ctype.h>
6 #include <stdio.h>
7 #include <stdlib.h>
8 #include <string.h>
9 #include <stdarg.h>
10 #include <unistd.h>
11 #include <inttypes.h>
12 #include <sys/types.h>
13 #include <sys/stat.h>
14 #include <fcntl.h>
15 #include <errno.h>
16 #include <dirent.h>
17 #include <limits.h>
18 #include <sys/queue.h>
19 #include <sys/mman.h>
20 #include <sys/ioctl.h>
21 #include <sys/pciio.h>
22 #include <dev/pci/pcireg.h>
23 
24 #if defined(RTE_ARCH_X86)
25 #include <machine/cpufunc.h>
26 #endif
27 
28 #include <rte_interrupts.h>
29 #include <rte_log.h>
30 #include <rte_pci.h>
31 #include <rte_bus_pci.h>
32 #include <rte_common.h>
33 #include <rte_launch.h>
34 #include <rte_memory.h>
35 #include <rte_eal.h>
36 #include <rte_eal_memconfig.h>
37 #include <rte_per_lcore.h>
38 #include <rte_lcore.h>
39 #include <rte_malloc.h>
40 #include <rte_string_fns.h>
41 #include <rte_debug.h>
42 #include <rte_devargs.h>
43 
44 #include "eal_filesystem.h"
45 #include "private.h"
46 
47 /**
48  * @file
49  * PCI probing under BSD
50  *
51  * This code is used to simulate a PCI probe by parsing information in
52  * sysfs. Moreover, when a registered driver matches a device, the
53  * kernel driver currently using it is unloaded and replaced by
54  * igb_uio module, which is a very minimal userland driver for Intel
55  * network card, only providing access to PCI BAR to applications, and
56  * enabling bus master.
57  */
58 
59 extern struct rte_pci_bus rte_pci_bus;
60 
61 /* Map pci device */
62 int
63 rte_pci_map_device(struct rte_pci_device *dev)
64 {
65 	int ret = -1;
66 
67 	/* try mapping the NIC resources */
68 	switch (dev->kdrv) {
69 	case RTE_KDRV_NIC_UIO:
70 		/* map resources for devices that use uio */
71 		ret = pci_uio_map_resource(dev);
72 		break;
73 	default:
74 		RTE_LOG(DEBUG, EAL,
75 			"  Not managed by a supported kernel driver, skipped\n");
76 		ret = 1;
77 		break;
78 	}
79 
80 	return ret;
81 }
82 
83 /* Unmap pci device */
84 void
85 rte_pci_unmap_device(struct rte_pci_device *dev)
86 {
87 	/* try unmapping the NIC resources */
88 	switch (dev->kdrv) {
89 	case RTE_KDRV_NIC_UIO:
90 		/* unmap resources for devices that use uio */
91 		pci_uio_unmap_resource(dev);
92 		break;
93 	default:
94 		RTE_LOG(DEBUG, EAL,
95 			"  Not managed by a supported kernel driver, skipped\n");
96 		break;
97 	}
98 }
99 
100 void
101 pci_uio_free_resource(struct rte_pci_device *dev,
102 		struct mapped_pci_resource *uio_res)
103 {
104 	rte_free(uio_res);
105 
106 	if (dev->intr_handle.fd) {
107 		close(dev->intr_handle.fd);
108 		dev->intr_handle.fd = -1;
109 		dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
110 	}
111 }
112 
113 int
114 pci_uio_alloc_resource(struct rte_pci_device *dev,
115 		struct mapped_pci_resource **uio_res)
116 {
117 	char devname[PATH_MAX]; /* contains the /dev/uioX */
118 	struct rte_pci_addr *loc;
119 
120 	loc = &dev->addr;
121 
122 	snprintf(devname, sizeof(devname), "/dev/uio@pci:%u:%u:%u",
123 			dev->addr.bus, dev->addr.devid, dev->addr.function);
124 
125 	if (access(devname, O_RDWR) < 0) {
126 		RTE_LOG(WARNING, EAL, "  "PCI_PRI_FMT" not managed by UIO driver, "
127 				"skipping\n", loc->domain, loc->bus, loc->devid, loc->function);
128 		return 1;
129 	}
130 
131 	/* save fd if in primary process */
132 	dev->intr_handle.fd = open(devname, O_RDWR);
133 	if (dev->intr_handle.fd < 0) {
134 		RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
135 			devname, strerror(errno));
136 		goto error;
137 	}
138 	dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
139 
140 	/* allocate the mapping details for secondary processes*/
141 	*uio_res = rte_zmalloc("UIO_RES", sizeof(**uio_res), 0);
142 	if (*uio_res == NULL) {
143 		RTE_LOG(ERR, EAL,
144 			"%s(): cannot store uio mmap details\n", __func__);
145 		goto error;
146 	}
147 
148 	strlcpy((*uio_res)->path, devname, sizeof((*uio_res)->path));
149 	memcpy(&(*uio_res)->pci_addr, &dev->addr, sizeof((*uio_res)->pci_addr));
150 
151 	return 0;
152 
153 error:
154 	pci_uio_free_resource(dev, *uio_res);
155 	return -1;
156 }
157 
158 int
159 pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx,
160 		struct mapped_pci_resource *uio_res, int map_idx)
161 {
162 	int fd;
163 	char *devname;
164 	void *mapaddr;
165 	uint64_t offset;
166 	uint64_t pagesz;
167 	struct pci_map *maps;
168 
169 	maps = uio_res->maps;
170 	devname = uio_res->path;
171 	pagesz = sysconf(_SC_PAGESIZE);
172 
173 	/* allocate memory to keep path */
174 	maps[map_idx].path = rte_malloc(NULL, strlen(devname) + 1, 0);
175 	if (maps[map_idx].path == NULL) {
176 		RTE_LOG(ERR, EAL, "Cannot allocate memory for path: %s\n",
177 				strerror(errno));
178 		return -1;
179 	}
180 
181 	/*
182 	 * open resource file, to mmap it
183 	 */
184 	fd = open(devname, O_RDWR);
185 	if (fd < 0) {
186 		RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
187 				devname, strerror(errno));
188 		goto error;
189 	}
190 
191 	/* if matching map is found, then use it */
192 	offset = res_idx * pagesz;
193 	mapaddr = pci_map_resource(NULL, fd, (off_t)offset,
194 			(size_t)dev->mem_resource[res_idx].len, 0);
195 	close(fd);
196 	if (mapaddr == MAP_FAILED)
197 		goto error;
198 
199 	maps[map_idx].phaddr = dev->mem_resource[res_idx].phys_addr;
200 	maps[map_idx].size = dev->mem_resource[res_idx].len;
201 	maps[map_idx].addr = mapaddr;
202 	maps[map_idx].offset = offset;
203 	strcpy(maps[map_idx].path, devname);
204 	dev->mem_resource[res_idx].addr = mapaddr;
205 
206 	return 0;
207 
208 error:
209 	rte_free(maps[map_idx].path);
210 	return -1;
211 }
212 
213 static int
214 pci_scan_one(int dev_pci_fd, struct pci_conf *conf)
215 {
216 	struct rte_pci_device *dev;
217 	struct pci_bar_io bar;
218 	unsigned i, max;
219 
220 	dev = malloc(sizeof(*dev));
221 	if (dev == NULL) {
222 		return -1;
223 	}
224 
225 	memset(dev, 0, sizeof(*dev));
226 	dev->device.bus = &rte_pci_bus.bus;
227 
228 	dev->addr.domain = conf->pc_sel.pc_domain;
229 	dev->addr.bus = conf->pc_sel.pc_bus;
230 	dev->addr.devid = conf->pc_sel.pc_dev;
231 	dev->addr.function = conf->pc_sel.pc_func;
232 
233 	/* get vendor id */
234 	dev->id.vendor_id = conf->pc_vendor;
235 
236 	/* get device id */
237 	dev->id.device_id = conf->pc_device;
238 
239 	/* get subsystem_vendor id */
240 	dev->id.subsystem_vendor_id = conf->pc_subvendor;
241 
242 	/* get subsystem_device id */
243 	dev->id.subsystem_device_id = conf->pc_subdevice;
244 
245 	/* get class id */
246 	dev->id.class_id = (conf->pc_class << 16) |
247 			   (conf->pc_subclass << 8) |
248 			   (conf->pc_progif);
249 
250 	/* TODO: get max_vfs */
251 	dev->max_vfs = 0;
252 
253 	/* FreeBSD has no NUMA support (yet) */
254 	dev->device.numa_node = 0;
255 
256 	pci_name_set(dev);
257 
258 	/* FreeBSD has only one pass through driver */
259 	dev->kdrv = RTE_KDRV_NIC_UIO;
260 
261 	/* parse resources */
262 	switch (conf->pc_hdr & PCIM_HDRTYPE) {
263 	case PCIM_HDRTYPE_NORMAL:
264 		max = PCIR_MAX_BAR_0;
265 		break;
266 	case PCIM_HDRTYPE_BRIDGE:
267 		max = PCIR_MAX_BAR_1;
268 		break;
269 	case PCIM_HDRTYPE_CARDBUS:
270 		max = PCIR_MAX_BAR_2;
271 		break;
272 	default:
273 		goto skipdev;
274 	}
275 
276 	for (i = 0; i <= max; i++) {
277 		bar.pbi_sel = conf->pc_sel;
278 		bar.pbi_reg = PCIR_BAR(i);
279 		if (ioctl(dev_pci_fd, PCIOCGETBAR, &bar) < 0)
280 			continue;
281 
282 		dev->mem_resource[i].len = bar.pbi_length;
283 		if (PCI_BAR_IO(bar.pbi_base)) {
284 			dev->mem_resource[i].addr = (void *)(bar.pbi_base & ~((uint64_t)0xf));
285 			continue;
286 		}
287 		dev->mem_resource[i].phys_addr = bar.pbi_base & ~((uint64_t)0xf);
288 	}
289 
290 	/* device is valid, add in list (sorted) */
291 	if (TAILQ_EMPTY(&rte_pci_bus.device_list)) {
292 		rte_pci_add_device(dev);
293 	}
294 	else {
295 		struct rte_pci_device *dev2 = NULL;
296 		int ret;
297 
298 		TAILQ_FOREACH(dev2, &rte_pci_bus.device_list, next) {
299 			ret = rte_pci_addr_cmp(&dev->addr, &dev2->addr);
300 			if (ret > 0)
301 				continue;
302 			else if (ret < 0) {
303 				rte_pci_insert_device(dev2, dev);
304 			} else { /* already registered */
305 				dev2->kdrv = dev->kdrv;
306 				dev2->max_vfs = dev->max_vfs;
307 				pci_name_set(dev2);
308 				memmove(dev2->mem_resource,
309 					dev->mem_resource,
310 					sizeof(dev->mem_resource));
311 				free(dev);
312 			}
313 			return 0;
314 		}
315 		rte_pci_add_device(dev);
316 	}
317 
318 	return 0;
319 
320 skipdev:
321 	free(dev);
322 	return 0;
323 }
324 
325 /*
326  * Scan the content of the PCI bus, and add the devices in the devices
327  * list. Call pci_scan_one() for each pci entry found.
328  */
329 int
330 rte_pci_scan(void)
331 {
332 	int fd;
333 	unsigned dev_count = 0;
334 	struct pci_conf matches[16];
335 	struct pci_conf_io conf_io = {
336 			.pat_buf_len = 0,
337 			.num_patterns = 0,
338 			.patterns = NULL,
339 			.match_buf_len = sizeof(matches),
340 			.matches = &matches[0],
341 	};
342 
343 	/* for debug purposes, PCI can be disabled */
344 	if (!rte_eal_has_pci())
345 		return 0;
346 
347 	fd = open("/dev/pci", O_RDONLY);
348 	if (fd < 0) {
349 		RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
350 		goto error;
351 	}
352 
353 	do {
354 		unsigned i;
355 		if (ioctl(fd, PCIOCGETCONF, &conf_io) < 0) {
356 			RTE_LOG(ERR, EAL, "%s(): error with ioctl on /dev/pci: %s\n",
357 					__func__, strerror(errno));
358 			goto error;
359 		}
360 
361 		for (i = 0; i < conf_io.num_matches; i++)
362 			if (pci_scan_one(fd, &matches[i]) < 0)
363 				goto error;
364 
365 		dev_count += conf_io.num_matches;
366 	} while(conf_io.status == PCI_GETCONF_MORE_DEVS);
367 
368 	close(fd);
369 
370 	RTE_LOG(DEBUG, EAL, "PCI scan found %u devices\n", dev_count);
371 	return 0;
372 
373 error:
374 	if (fd >= 0)
375 		close(fd);
376 	return -1;
377 }
378 
379 bool
380 pci_device_iommu_support_va(__rte_unused const struct rte_pci_device *dev)
381 {
382 	return false;
383 }
384 
385 enum rte_iova_mode
386 pci_device_iova_mode(const struct rte_pci_driver *pdrv __rte_unused,
387 		     const struct rte_pci_device *pdev)
388 {
389 	/* Supports only RTE_KDRV_NIC_UIO */
390 	if (pdev->kdrv != RTE_KDRV_NIC_UIO)
391 		RTE_LOG(DEBUG, EAL, "Unsupported kernel driver? Defaulting to IOVA as 'PA'\n");
392 
393 	return RTE_IOVA_PA;
394 }
395 
396 int
397 pci_update_device(const struct rte_pci_addr *addr)
398 {
399 	int fd;
400 	struct pci_conf matches[2];
401 	struct pci_match_conf match = {
402 		.pc_sel = {
403 			.pc_domain = addr->domain,
404 			.pc_bus = addr->bus,
405 			.pc_dev = addr->devid,
406 			.pc_func = addr->function,
407 		},
408 	};
409 	struct pci_conf_io conf_io = {
410 		.pat_buf_len = 0,
411 		.num_patterns = 1,
412 		.patterns = &match,
413 		.match_buf_len = sizeof(matches),
414 		.matches = &matches[0],
415 	};
416 
417 	fd = open("/dev/pci", O_RDONLY);
418 	if (fd < 0) {
419 		RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
420 		goto error;
421 	}
422 
423 	if (ioctl(fd, PCIOCGETCONF, &conf_io) < 0) {
424 		RTE_LOG(ERR, EAL, "%s(): error with ioctl on /dev/pci: %s\n",
425 				__func__, strerror(errno));
426 		goto error;
427 	}
428 
429 	if (conf_io.num_matches != 1)
430 		goto error;
431 
432 	if (pci_scan_one(fd, &matches[0]) < 0)
433 		goto error;
434 
435 	close(fd);
436 
437 	return 0;
438 
439 error:
440 	if (fd >= 0)
441 		close(fd);
442 	return -1;
443 }
444 
445 /* Read PCI config space. */
446 int rte_pci_read_config(const struct rte_pci_device *dev,
447 		void *buf, size_t len, off_t offset)
448 {
449 	int fd = -1;
450 	int size;
451 	/* Copy Linux implementation's behaviour */
452 	const int return_len = len;
453 	struct pci_io pi = {
454 		.pi_sel = {
455 			.pc_domain = dev->addr.domain,
456 			.pc_bus = dev->addr.bus,
457 			.pc_dev = dev->addr.devid,
458 			.pc_func = dev->addr.function,
459 		},
460 		.pi_reg = offset,
461 	};
462 
463 	fd = open("/dev/pci", O_RDWR);
464 	if (fd < 0) {
465 		RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
466 		goto error;
467 	}
468 
469 	while (len > 0) {
470 		size = (len >= 4) ? 4 : ((len >= 2) ? 2 : 1);
471 		pi.pi_width = size;
472 
473 		if (ioctl(fd, PCIOCREAD, &pi) < 0)
474 			goto error;
475 		memcpy(buf, &pi.pi_data, size);
476 
477 		buf = (char *)buf + size;
478 		pi.pi_reg += size;
479 		len -= size;
480 	}
481 	close(fd);
482 
483 	return return_len;
484 
485  error:
486 	if (fd >= 0)
487 		close(fd);
488 	return -1;
489 }
490 
491 /* Write PCI config space. */
492 int rte_pci_write_config(const struct rte_pci_device *dev,
493 		const void *buf, size_t len, off_t offset)
494 {
495 	int fd = -1;
496 
497 	struct pci_io pi = {
498 		.pi_sel = {
499 			.pc_domain = dev->addr.domain,
500 			.pc_bus = dev->addr.bus,
501 			.pc_dev = dev->addr.devid,
502 			.pc_func = dev->addr.function,
503 		},
504 		.pi_reg = offset,
505 		.pi_data = *(const uint32_t *)buf,
506 		.pi_width = len,
507 	};
508 
509 	if (len == 3 || len > sizeof(pi.pi_data)) {
510 		RTE_LOG(ERR, EAL, "%s(): invalid pci read length\n", __func__);
511 		goto error;
512 	}
513 
514 	memcpy(&pi.pi_data, buf, len);
515 
516 	fd = open("/dev/pci", O_RDWR);
517 	if (fd < 0) {
518 		RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
519 		goto error;
520 	}
521 
522 	if (ioctl(fd, PCIOCWRITE, &pi) < 0)
523 		goto error;
524 
525 	close(fd);
526 	return 0;
527 
528  error:
529 	if (fd >= 0)
530 		close(fd);
531 	return -1;
532 }
533 
534 int
535 rte_pci_ioport_map(struct rte_pci_device *dev, int bar,
536 		struct rte_pci_ioport *p)
537 {
538 	int ret;
539 
540 	switch (dev->kdrv) {
541 #if defined(RTE_ARCH_X86)
542 	case RTE_KDRV_NIC_UIO:
543 		if ((uintptr_t) dev->mem_resource[bar].addr <= UINT16_MAX) {
544 			p->base = (uintptr_t)dev->mem_resource[bar].addr;
545 			ret = 0;
546 		} else
547 			ret = -1;
548 		break;
549 #endif
550 	default:
551 		ret = -1;
552 		break;
553 	}
554 
555 	if (!ret)
556 		p->dev = dev;
557 
558 	return ret;
559 }
560 
561 static void
562 pci_uio_ioport_read(struct rte_pci_ioport *p,
563 		void *data, size_t len, off_t offset)
564 {
565 #if defined(RTE_ARCH_X86)
566 	uint8_t *d;
567 	int size;
568 	unsigned short reg = p->base + offset;
569 
570 	for (d = data; len > 0; d += size, reg += size, len -= size) {
571 		if (len >= 4) {
572 			size = 4;
573 			*(uint32_t *)d = inl(reg);
574 		} else if (len >= 2) {
575 			size = 2;
576 			*(uint16_t *)d = inw(reg);
577 		} else {
578 			size = 1;
579 			*d = inb(reg);
580 		}
581 	}
582 #else
583 	RTE_SET_USED(p);
584 	RTE_SET_USED(data);
585 	RTE_SET_USED(len);
586 	RTE_SET_USED(offset);
587 #endif
588 }
589 
590 void
591 rte_pci_ioport_read(struct rte_pci_ioport *p,
592 		void *data, size_t len, off_t offset)
593 {
594 	switch (p->dev->kdrv) {
595 	case RTE_KDRV_NIC_UIO:
596 		pci_uio_ioport_read(p, data, len, offset);
597 		break;
598 	default:
599 		break;
600 	}
601 }
602 
603 static void
604 pci_uio_ioport_write(struct rte_pci_ioport *p,
605 		const void *data, size_t len, off_t offset)
606 {
607 #if defined(RTE_ARCH_X86)
608 	const uint8_t *s;
609 	int size;
610 	unsigned short reg = p->base + offset;
611 
612 	for (s = data; len > 0; s += size, reg += size, len -= size) {
613 		if (len >= 4) {
614 			size = 4;
615 			outl(reg, *(const uint32_t *)s);
616 		} else if (len >= 2) {
617 			size = 2;
618 			outw(reg, *(const uint16_t *)s);
619 		} else {
620 			size = 1;
621 			outb(reg, *s);
622 		}
623 	}
624 #else
625 	RTE_SET_USED(p);
626 	RTE_SET_USED(data);
627 	RTE_SET_USED(len);
628 	RTE_SET_USED(offset);
629 #endif
630 }
631 
632 void
633 rte_pci_ioport_write(struct rte_pci_ioport *p,
634 		const void *data, size_t len, off_t offset)
635 {
636 	switch (p->dev->kdrv) {
637 	case RTE_KDRV_NIC_UIO:
638 		pci_uio_ioport_write(p, data, len, offset);
639 		break;
640 	default:
641 		break;
642 	}
643 }
644 
645 int
646 rte_pci_ioport_unmap(struct rte_pci_ioport *p)
647 {
648 	int ret;
649 
650 	switch (p->dev->kdrv) {
651 #if defined(RTE_ARCH_X86)
652 	case RTE_KDRV_NIC_UIO:
653 		ret = 0;
654 		break;
655 #endif
656 	default:
657 		ret = -1;
658 		break;
659 	}
660 
661 	return ret;
662 }
663