xref: /dpdk/drivers/bus/pci/bsd/pci.c (revision 90197eb0945b50c9cd6e11f310cfc5078b28f75e) 
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2014 Intel Corporation
3  */
4 
5 #include <ctype.h>
6 #include <stdio.h>
7 #include <stdlib.h>
8 #include <string.h>
9 #include <stdarg.h>
10 #include <unistd.h>
11 #include <inttypes.h>
12 #include <sys/types.h>
13 #include <sys/stat.h>
14 #include <fcntl.h>
15 #include <errno.h>
16 #include <dirent.h>
17 #include <limits.h>
18 #include <sys/queue.h>
19 #include <sys/mman.h>
20 #include <sys/ioctl.h>
21 #include <sys/pciio.h>
22 #include <dev/pci/pcireg.h>
23 
24 #if defined(RTE_ARCH_X86)
25 #include <machine/cpufunc.h>
26 #endif
27 
28 #include <rte_interrupts.h>
29 #include <rte_log.h>
30 #include <rte_pci.h>
31 #include <rte_bus_pci.h>
32 #include <rte_common.h>
33 #include <rte_launch.h>
34 #include <rte_memory.h>
35 #include <rte_eal.h>
36 #include <rte_eal_memconfig.h>
37 #include <rte_per_lcore.h>
38 #include <rte_lcore.h>
39 #include <rte_malloc.h>
40 #include <rte_string_fns.h>
41 #include <rte_debug.h>
42 #include <rte_devargs.h>
43 
44 #include "eal_filesystem.h"
45 #include "private.h"
46 
47 /**
48  * @file
49  * PCI probing under BSD
50  *
51  * This code is used to simulate a PCI probe by parsing information in
52  * sysfs. Moreover, when a registered driver matches a device, the
53  * kernel driver currently using it is unloaded and replaced by
54  * igb_uio module, which is a very minimal userland driver for Intel
55  * network card, only providing access to PCI BAR to applications, and
56  * enabling bus master.
57  */
58 
59 extern struct rte_pci_bus rte_pci_bus;
60 
61 /* Map pci device */
62 int
63 rte_pci_map_device(struct rte_pci_device *dev)
64 {
65 	int ret = -1;
66 
67 	/* try mapping the NIC resources */
68 	switch (dev->kdrv) {
69 	case RTE_KDRV_NIC_UIO:
70 		/* map resources for devices that use uio */
71 		ret = pci_uio_map_resource(dev);
72 		break;
73 	default:
74 		RTE_LOG(DEBUG, EAL,
75 			"  Not managed by a supported kernel driver, skipped\n");
76 		ret = 1;
77 		break;
78 	}
79 
80 	return ret;
81 }
82 
83 /* Unmap pci device */
84 void
85 rte_pci_unmap_device(struct rte_pci_device *dev)
86 {
87 	/* try unmapping the NIC resources */
88 	switch (dev->kdrv) {
89 	case RTE_KDRV_NIC_UIO:
90 		/* unmap resources for devices that use uio */
91 		pci_uio_unmap_resource(dev);
92 		break;
93 	default:
94 		RTE_LOG(DEBUG, EAL,
95 			"  Not managed by a supported kernel driver, skipped\n");
96 		break;
97 	}
98 }
99 
100 void
101 pci_uio_free_resource(struct rte_pci_device *dev,
102 		struct mapped_pci_resource *uio_res)
103 {
104 	rte_free(uio_res);
105 
106 	if (dev->intr_handle.fd) {
107 		close(dev->intr_handle.fd);
108 		dev->intr_handle.fd = -1;
109 		dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
110 	}
111 }
112 
113 int
114 pci_uio_alloc_resource(struct rte_pci_device *dev,
115 		struct mapped_pci_resource **uio_res)
116 {
117 	char devname[PATH_MAX]; /* contains the /dev/uioX */
118 	struct rte_pci_addr *loc;
119 
120 	loc = &dev->addr;
121 
122 	snprintf(devname, sizeof(devname), "/dev/uio@pci:%u:%u:%u",
123 			dev->addr.bus, dev->addr.devid, dev->addr.function);
124 
125 	if (access(devname, O_RDWR) < 0) {
126 		RTE_LOG(WARNING, EAL, "  "PCI_PRI_FMT" not managed by UIO driver, "
127 				"skipping\n", loc->domain, loc->bus, loc->devid, loc->function);
128 		return 1;
129 	}
130 
131 	/* save fd if in primary process */
132 	dev->intr_handle.fd = open(devname, O_RDWR);
133 	if (dev->intr_handle.fd < 0) {
134 		RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
135 			devname, strerror(errno));
136 		goto error;
137 	}
138 	dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
139 
140 	/* allocate the mapping details for secondary processes*/
141 	*uio_res = rte_zmalloc("UIO_RES", sizeof(**uio_res), 0);
142 	if (*uio_res == NULL) {
143 		RTE_LOG(ERR, EAL,
144 			"%s(): cannot store uio mmap details\n", __func__);
145 		goto error;
146 	}
147 
148 	strlcpy((*uio_res)->path, devname, sizeof((*uio_res)->path));
149 	memcpy(&(*uio_res)->pci_addr, &dev->addr, sizeof((*uio_res)->pci_addr));
150 
151 	return 0;
152 
153 error:
154 	pci_uio_free_resource(dev, *uio_res);
155 	return -1;
156 }
157 
158 int
159 pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx,
160 		struct mapped_pci_resource *uio_res, int map_idx)
161 {
162 	int fd;
163 	char *devname;
164 	void *mapaddr;
165 	uint64_t offset;
166 	uint64_t pagesz;
167 	struct pci_map *maps;
168 
169 	maps = uio_res->maps;
170 	devname = uio_res->path;
171 	pagesz = sysconf(_SC_PAGESIZE);
172 
173 	/* allocate memory to keep path */
174 	maps[map_idx].path = rte_malloc(NULL, strlen(devname) + 1, 0);
175 	if (maps[map_idx].path == NULL) {
176 		RTE_LOG(ERR, EAL, "Cannot allocate memory for path: %s\n",
177 				strerror(errno));
178 		return -1;
179 	}
180 
181 	/*
182 	 * open resource file, to mmap it
183 	 */
184 	fd = open(devname, O_RDWR);
185 	if (fd < 0) {
186 		RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
187 				devname, strerror(errno));
188 		goto error;
189 	}
190 
191 	/* if matching map is found, then use it */
192 	offset = res_idx * pagesz;
193 	mapaddr = pci_map_resource(NULL, fd, (off_t)offset,
194 			(size_t)dev->mem_resource[res_idx].len, 0);
195 	close(fd);
196 	if (mapaddr == MAP_FAILED)
197 		goto error;
198 
199 	maps[map_idx].phaddr = dev->mem_resource[res_idx].phys_addr;
200 	maps[map_idx].size = dev->mem_resource[res_idx].len;
201 	maps[map_idx].addr = mapaddr;
202 	maps[map_idx].offset = offset;
203 	strcpy(maps[map_idx].path, devname);
204 	dev->mem_resource[res_idx].addr = mapaddr;
205 
206 	return 0;
207 
208 error:
209 	rte_free(maps[map_idx].path);
210 	return -1;
211 }
212 
213 static int
214 pci_scan_one(int dev_pci_fd, struct pci_conf *conf)
215 {
216 	struct rte_pci_device *dev;
217 	struct pci_bar_io bar;
218 	unsigned i, max;
219 
220 	dev = malloc(sizeof(*dev));
221 	if (dev == NULL) {
222 		return -1;
223 	}
224 
225 	memset(dev, 0, sizeof(*dev));
226 	dev->device.bus = &rte_pci_bus.bus;
227 
228 	dev->addr.domain = conf->pc_sel.pc_domain;
229 	dev->addr.bus = conf->pc_sel.pc_bus;
230 	dev->addr.devid = conf->pc_sel.pc_dev;
231 	dev->addr.function = conf->pc_sel.pc_func;
232 
233 	/* get vendor id */
234 	dev->id.vendor_id = conf->pc_vendor;
235 
236 	/* get device id */
237 	dev->id.device_id = conf->pc_device;
238 
239 	/* get subsystem_vendor id */
240 	dev->id.subsystem_vendor_id = conf->pc_subvendor;
241 
242 	/* get subsystem_device id */
243 	dev->id.subsystem_device_id = conf->pc_subdevice;
244 
245 	/* get class id */
246 	dev->id.class_id = (conf->pc_class << 16) |
247 			   (conf->pc_subclass << 8) |
248 			   (conf->pc_progif);
249 
250 	/* TODO: get max_vfs */
251 	dev->max_vfs = 0;
252 
253 	/* FreeBSD has no NUMA support (yet) */
254 	dev->device.numa_node = 0;
255 
256 	pci_name_set(dev);
257 
258 	/* FreeBSD has only one pass through driver */
259 	dev->kdrv = RTE_KDRV_NIC_UIO;
260 
261 	/* parse resources */
262 	switch (conf->pc_hdr & PCIM_HDRTYPE) {
263 	case PCIM_HDRTYPE_NORMAL:
264 		max = PCIR_MAX_BAR_0;
265 		break;
266 	case PCIM_HDRTYPE_BRIDGE:
267 		max = PCIR_MAX_BAR_1;
268 		break;
269 	case PCIM_HDRTYPE_CARDBUS:
270 		max = PCIR_MAX_BAR_2;
271 		break;
272 	default:
273 		goto skipdev;
274 	}
275 
276 	for (i = 0; i <= max; i++) {
277 		bar.pbi_sel = conf->pc_sel;
278 		bar.pbi_reg = PCIR_BAR(i);
279 		if (ioctl(dev_pci_fd, PCIOCGETBAR, &bar) < 0)
280 			continue;
281 
282 		dev->mem_resource[i].len = bar.pbi_length;
283 		if (PCI_BAR_IO(bar.pbi_base)) {
284 			dev->mem_resource[i].addr = (void *)(bar.pbi_base & ~((uint64_t)0xf));
285 			continue;
286 		}
287 		dev->mem_resource[i].phys_addr = bar.pbi_base & ~((uint64_t)0xf);
288 	}
289 
290 	/* device is valid, add in list (sorted) */
291 	if (TAILQ_EMPTY(&rte_pci_bus.device_list)) {
292 		rte_pci_add_device(dev);
293 	}
294 	else {
295 		struct rte_pci_device *dev2 = NULL;
296 		int ret;
297 
298 		TAILQ_FOREACH(dev2, &rte_pci_bus.device_list, next) {
299 			ret = rte_pci_addr_cmp(&dev->addr, &dev2->addr);
300 			if (ret > 0)
301 				continue;
302 			else if (ret < 0) {
303 				rte_pci_insert_device(dev2, dev);
304 			} else { /* already registered */
305 				dev2->kdrv = dev->kdrv;
306 				dev2->max_vfs = dev->max_vfs;
307 				pci_name_set(dev2);
308 				memmove(dev2->mem_resource,
309 					dev->mem_resource,
310 					sizeof(dev->mem_resource));
311 				free(dev);
312 			}
313 			return 0;
314 		}
315 		rte_pci_add_device(dev);
316 	}
317 
318 	return 0;
319 
320 skipdev:
321 	free(dev);
322 	return 0;
323 }
324 
325 /*
326  * Scan the content of the PCI bus, and add the devices in the devices
327  * list. Call pci_scan_one() for each pci entry found.
328  */
329 int
330 rte_pci_scan(void)
331 {
332 	int fd;
333 	unsigned dev_count = 0;
334 	struct pci_conf matches[16];
335 	struct pci_conf_io conf_io = {
336 			.pat_buf_len = 0,
337 			.num_patterns = 0,
338 			.patterns = NULL,
339 			.match_buf_len = sizeof(matches),
340 			.matches = &matches[0],
341 	};
342 
343 	/* for debug purposes, PCI can be disabled */
344 	if (!rte_eal_has_pci())
345 		return 0;
346 
347 	fd = open("/dev/pci", O_RDONLY);
348 	if (fd < 0) {
349 		RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
350 		goto error;
351 	}
352 
353 	do {
354 		unsigned i;
355 		if (ioctl(fd, PCIOCGETCONF, &conf_io) < 0) {
356 			RTE_LOG(ERR, EAL, "%s(): error with ioctl on /dev/pci: %s\n",
357 					__func__, strerror(errno));
358 			goto error;
359 		}
360 
361 		for (i = 0; i < conf_io.num_matches; i++)
362 			if (pci_scan_one(fd, &matches[i]) < 0)
363 				goto error;
364 
365 		dev_count += conf_io.num_matches;
366 	} while(conf_io.status == PCI_GETCONF_MORE_DEVS);
367 
368 	close(fd);
369 
370 	RTE_LOG(DEBUG, EAL, "PCI scan found %u devices\n", dev_count);
371 	return 0;
372 
373 error:
374 	if (fd >= 0)
375 		close(fd);
376 	return -1;
377 }
378 
379 enum rte_iova_mode
380 pci_device_iova_mode(const struct rte_pci_driver *pdrv __rte_unused,
381 		     const struct rte_pci_device *pdev)
382 {
383 	/* Supports only RTE_KDRV_NIC_UIO */
384 	if (pdev->kdrv != RTE_KDRV_NIC_UIO)
385 		RTE_LOG(DEBUG, EAL, "Unsupported kernel driver? Defaulting to IOVA as 'PA'\n");
386 
387 	return RTE_IOVA_PA;
388 }
389 
390 int
391 pci_update_device(const struct rte_pci_addr *addr)
392 {
393 	int fd;
394 	struct pci_conf matches[2];
395 	struct pci_match_conf match = {
396 		.pc_sel = {
397 			.pc_domain = addr->domain,
398 			.pc_bus = addr->bus,
399 			.pc_dev = addr->devid,
400 			.pc_func = addr->function,
401 		},
402 	};
403 	struct pci_conf_io conf_io = {
404 		.pat_buf_len = 0,
405 		.num_patterns = 1,
406 		.patterns = &match,
407 		.match_buf_len = sizeof(matches),
408 		.matches = &matches[0],
409 	};
410 
411 	fd = open("/dev/pci", O_RDONLY);
412 	if (fd < 0) {
413 		RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
414 		goto error;
415 	}
416 
417 	if (ioctl(fd, PCIOCGETCONF, &conf_io) < 0) {
418 		RTE_LOG(ERR, EAL, "%s(): error with ioctl on /dev/pci: %s\n",
419 				__func__, strerror(errno));
420 		goto error;
421 	}
422 
423 	if (conf_io.num_matches != 1)
424 		goto error;
425 
426 	if (pci_scan_one(fd, &matches[0]) < 0)
427 		goto error;
428 
429 	close(fd);
430 
431 	return 0;
432 
433 error:
434 	if (fd >= 0)
435 		close(fd);
436 	return -1;
437 }
438 
439 /* Read PCI config space. */
440 int rte_pci_read_config(const struct rte_pci_device *dev,
441 		void *buf, size_t len, off_t offset)
442 {
443 	int fd = -1;
444 	int size;
445 	/* Copy Linux implementation's behaviour */
446 	const int return_len = len;
447 	struct pci_io pi = {
448 		.pi_sel = {
449 			.pc_domain = dev->addr.domain,
450 			.pc_bus = dev->addr.bus,
451 			.pc_dev = dev->addr.devid,
452 			.pc_func = dev->addr.function,
453 		},
454 		.pi_reg = offset,
455 	};
456 
457 	fd = open("/dev/pci", O_RDWR);
458 	if (fd < 0) {
459 		RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
460 		goto error;
461 	}
462 
463 	while (len > 0) {
464 		size = (len >= 4) ? 4 : ((len >= 2) ? 2 : 1);
465 		pi.pi_width = size;
466 
467 		if (ioctl(fd, PCIOCREAD, &pi) < 0)
468 			goto error;
469 		memcpy(buf, &pi.pi_data, size);
470 
471 		buf = (char *)buf + size;
472 		pi.pi_reg += size;
473 		len -= size;
474 	}
475 	close(fd);
476 
477 	return return_len;
478 
479  error:
480 	if (fd >= 0)
481 		close(fd);
482 	return -1;
483 }
484 
485 /* Write PCI config space. */
486 int rte_pci_write_config(const struct rte_pci_device *dev,
487 		const void *buf, size_t len, off_t offset)
488 {
489 	int fd = -1;
490 
491 	struct pci_io pi = {
492 		.pi_sel = {
493 			.pc_domain = dev->addr.domain,
494 			.pc_bus = dev->addr.bus,
495 			.pc_dev = dev->addr.devid,
496 			.pc_func = dev->addr.function,
497 		},
498 		.pi_reg = offset,
499 		.pi_data = *(const uint32_t *)buf,
500 		.pi_width = len,
501 	};
502 
503 	if (len == 3 || len > sizeof(pi.pi_data)) {
504 		RTE_LOG(ERR, EAL, "%s(): invalid pci read length\n", __func__);
505 		goto error;
506 	}
507 
508 	memcpy(&pi.pi_data, buf, len);
509 
510 	fd = open("/dev/pci", O_RDWR);
511 	if (fd < 0) {
512 		RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
513 		goto error;
514 	}
515 
516 	if (ioctl(fd, PCIOCWRITE, &pi) < 0)
517 		goto error;
518 
519 	close(fd);
520 	return 0;
521 
522  error:
523 	if (fd >= 0)
524 		close(fd);
525 	return -1;
526 }
527 
528 int
529 rte_pci_ioport_map(struct rte_pci_device *dev, int bar,
530 		struct rte_pci_ioport *p)
531 {
532 	int ret;
533 
534 	switch (dev->kdrv) {
535 #if defined(RTE_ARCH_X86)
536 	case RTE_KDRV_NIC_UIO:
537 		if ((uintptr_t) dev->mem_resource[bar].addr <= UINT16_MAX) {
538 			p->base = (uintptr_t)dev->mem_resource[bar].addr;
539 			ret = 0;
540 		} else
541 			ret = -1;
542 		break;
543 #endif
544 	default:
545 		ret = -1;
546 		break;
547 	}
548 
549 	if (!ret)
550 		p->dev = dev;
551 
552 	return ret;
553 }
554 
555 static void
556 pci_uio_ioport_read(struct rte_pci_ioport *p,
557 		void *data, size_t len, off_t offset)
558 {
559 #if defined(RTE_ARCH_X86)
560 	uint8_t *d;
561 	int size;
562 	unsigned short reg = p->base + offset;
563 
564 	for (d = data; len > 0; d += size, reg += size, len -= size) {
565 		if (len >= 4) {
566 			size = 4;
567 			*(uint32_t *)d = inl(reg);
568 		} else if (len >= 2) {
569 			size = 2;
570 			*(uint16_t *)d = inw(reg);
571 		} else {
572 			size = 1;
573 			*d = inb(reg);
574 		}
575 	}
576 #else
577 	RTE_SET_USED(p);
578 	RTE_SET_USED(data);
579 	RTE_SET_USED(len);
580 	RTE_SET_USED(offset);
581 #endif
582 }
583 
584 void
585 rte_pci_ioport_read(struct rte_pci_ioport *p,
586 		void *data, size_t len, off_t offset)
587 {
588 	switch (p->dev->kdrv) {
589 	case RTE_KDRV_NIC_UIO:
590 		pci_uio_ioport_read(p, data, len, offset);
591 		break;
592 	default:
593 		break;
594 	}
595 }
596 
597 static void
598 pci_uio_ioport_write(struct rte_pci_ioport *p,
599 		const void *data, size_t len, off_t offset)
600 {
601 #if defined(RTE_ARCH_X86)
602 	const uint8_t *s;
603 	int size;
604 	unsigned short reg = p->base + offset;
605 
606 	for (s = data; len > 0; s += size, reg += size, len -= size) {
607 		if (len >= 4) {
608 			size = 4;
609 			outl(reg, *(const uint32_t *)s);
610 		} else if (len >= 2) {
611 			size = 2;
612 			outw(reg, *(const uint16_t *)s);
613 		} else {
614 			size = 1;
615 			outb(reg, *s);
616 		}
617 	}
618 #else
619 	RTE_SET_USED(p);
620 	RTE_SET_USED(data);
621 	RTE_SET_USED(len);
622 	RTE_SET_USED(offset);
623 #endif
624 }
625 
626 void
627 rte_pci_ioport_write(struct rte_pci_ioport *p,
628 		const void *data, size_t len, off_t offset)
629 {
630 	switch (p->dev->kdrv) {
631 	case RTE_KDRV_NIC_UIO:
632 		pci_uio_ioport_write(p, data, len, offset);
633 		break;
634 	default:
635 		break;
636 	}
637 }
638 
639 int
640 rte_pci_ioport_unmap(struct rte_pci_ioport *p)
641 {
642 	int ret;
643 
644 	switch (p->dev->kdrv) {
645 #if defined(RTE_ARCH_X86)
646 	case RTE_KDRV_NIC_UIO:
647 		ret = 0;
648 		break;
649 #endif
650 	default:
651 		ret = -1;
652 		break;
653 	}
654 
655 	return ret;
656 }
657