1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. 4 * 5 */ 6 #ifndef _QBMAN_SYS_DECL_H_ 7 #define _QBMAN_SYS_DECL_H_ 8 9 #include <compat.h> 10 #include <fsl_qbman_base.h> 11 12 /* Sanity check */ 13 #if (__BYTE_ORDER__ != __ORDER_BIG_ENDIAN__) && \ 14 (__BYTE_ORDER__ != __ORDER_LITTLE_ENDIAN__) 15 #error "Unknown endianness!" 16 #endif 17 18 /****************/ 19 /* arch assists */ 20 /****************/ 21 #if defined(RTE_ARCH_ARM) 22 #if defined(RTE_ARCH_64) 23 #define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); } 24 #define lwsync() { asm volatile("dmb st" : : : "memory"); } 25 #define dcbf(p) { asm volatile("dc cvac, %0" : : "r"(p) : "memory"); } 26 #define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); } 27 static inline void prefetch_for_load(void *p) 28 { 29 asm volatile("prfm pldl1keep, [%0, #0]" : : "r" (p)); 30 } 31 32 static inline void prefetch_for_store(void *p) 33 { 34 asm volatile("prfm pstl1keep, [%0, #0]" : : "r" (p)); 35 } 36 #else /* RTE_ARCH_32 */ 37 #define dcbz(p) memset(p, 0, 64) 38 #define lwsync() { asm volatile("dmb st" : : : "memory"); } 39 #define dcbf(p) RTE_SET_USED(p) 40 #define dccivac(p) RTE_SET_USED(p) 41 #define prefetch_for_load(p) { asm volatile ("pld [%0]" : : "r" (p)); } 42 #define prefetch_for_store(p) { asm volatile ("pld [%0]" : : "r" (p)); } 43 #endif 44 #else 45 #define dcbz(p) RTE_SET_USED(p) 46 #define lwsync() 47 #define dcbf(p) RTE_SET_USED(p) 48 #define dccivac(p) RTE_SET_USED(p) 49 static inline void prefetch_for_load(void *p) 50 { 51 RTE_SET_USED(p); 52 } 53 static inline void prefetch_for_store(void *p) 54 { 55 RTE_SET_USED(p); 56 } 57 #endif 58 #endif /* _QBMAN_SYS_DECL_H_ */ 59