1d81734caSHemant Agrawal /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) 223df3960SShreyansh Jain * 323df3960SShreyansh Jain * Copyright 2010-2011 Freescale Semiconductor, Inc. 423df3960SShreyansh Jain * All rights reserved. 52aa10990SRohit Raj * Copyright 2020 NXP 623df3960SShreyansh Jain * 723df3960SShreyansh Jain */ 823df3960SShreyansh Jain 923df3960SShreyansh Jain #ifndef __PROCESS_H 1023df3960SShreyansh Jain #define __PROCESS_H 1123df3960SShreyansh Jain 1223df3960SShreyansh Jain #include <compat.h> 13*1094dd94SDavid Marchand #include <rte_compat.h> 147a292619SRohit Raj #include <rte_ethdev.h> 1523df3960SShreyansh Jain 1623df3960SShreyansh Jain /* The process device underlies process-wide user/kernel interactions, such as 1723df3960SShreyansh Jain * mapping dma_mem memory and providing accompanying ioctl()s. (This isn't used 1823df3960SShreyansh Jain * for portals, which use one UIO device each.). 1923df3960SShreyansh Jain */ 2023df3960SShreyansh Jain #define PROCESS_PATH "/dev/fsl-usdpaa" 2123df3960SShreyansh Jain 2223df3960SShreyansh Jain /* Allocation of resource IDs uses a generic interface. This enum is used to 2323df3960SShreyansh Jain * distinguish between the type of underlying object being manipulated. 2423df3960SShreyansh Jain */ 2523df3960SShreyansh Jain enum dpaa_id_type { 2623df3960SShreyansh Jain dpaa_id_fqid, 2723df3960SShreyansh Jain dpaa_id_bpid, 2823df3960SShreyansh Jain dpaa_id_qpool, 2923df3960SShreyansh Jain dpaa_id_cgrid, 3023df3960SShreyansh Jain dpaa_id_max /* <-- not a valid type, represents the number of types */ 3123df3960SShreyansh Jain }; 3223df3960SShreyansh Jain 3323df3960SShreyansh Jain int process_alloc(enum dpaa_id_type id_type, uint32_t *base, uint32_t num, 3423df3960SShreyansh Jain uint32_t align, int partial); 3523df3960SShreyansh Jain void process_release(enum dpaa_id_type id_type, uint32_t base, uint32_t num); 3623df3960SShreyansh Jain 3723df3960SShreyansh Jain int process_reserve(enum dpaa_id_type id_type, uint32_t base, uint32_t num); 3823df3960SShreyansh Jain 3923df3960SShreyansh Jain /* Mapping and using QMan/BMan portals */ 4023df3960SShreyansh Jain enum dpaa_portal_type { 4123df3960SShreyansh Jain dpaa_portal_qman, 4223df3960SShreyansh Jain dpaa_portal_bman, 4323df3960SShreyansh Jain }; 4423df3960SShreyansh Jain 459d32ef0fSHemant Agrawal struct dpaa_portal_map { 469d32ef0fSHemant Agrawal void *cinh; 479d32ef0fSHemant Agrawal void *cena; 489d32ef0fSHemant Agrawal }; 499d32ef0fSHemant Agrawal 5023df3960SShreyansh Jain struct dpaa_ioctl_portal_map { 5123df3960SShreyansh Jain /* Input parameter, is a qman or bman portal required. */ 5223df3960SShreyansh Jain enum dpaa_portal_type type; 537be78d02SJosh Soref /* Specifies a specific portal index to map or 0xffffffff 5423df3960SShreyansh Jain * for don't care. 5523df3960SShreyansh Jain */ 5623df3960SShreyansh Jain uint32_t index; 5723df3960SShreyansh Jain 5823df3960SShreyansh Jain /* Return value if the map succeeds, this gives the mapped 5923df3960SShreyansh Jain * cache-inhibited (cinh) and cache-enabled (cena) addresses. 6023df3960SShreyansh Jain */ 619d32ef0fSHemant Agrawal struct dpaa_portal_map addr; 629d32ef0fSHemant Agrawal 6323df3960SShreyansh Jain /* Qman-specific return values */ 6423df3960SShreyansh Jain u16 channel; 6523df3960SShreyansh Jain uint32_t pools; 6623df3960SShreyansh Jain }; 6723df3960SShreyansh Jain 6823df3960SShreyansh Jain int process_portal_map(struct dpaa_ioctl_portal_map *params); 6923df3960SShreyansh Jain int process_portal_unmap(struct dpaa_portal_map *map); 7023df3960SShreyansh Jain 7123df3960SShreyansh Jain struct dpaa_ioctl_irq_map { 7223df3960SShreyansh Jain enum dpaa_portal_type type; /* Type of portal to map */ 7323df3960SShreyansh Jain int fd; /* File descriptor that contains the portal */ 7423df3960SShreyansh Jain void *portal_cinh; /* Cache inhibited area to identify the portal */ 7523df3960SShreyansh Jain }; 7623df3960SShreyansh Jain 7723df3960SShreyansh Jain int process_portal_irq_map(int fd, struct dpaa_ioctl_irq_map *irq); 7823df3960SShreyansh Jain int process_portal_irq_unmap(int fd); 7923df3960SShreyansh Jain 802aa10990SRohit Raj struct usdpaa_ioctl_link_status { 812aa10990SRohit Raj char if_name[IF_NAME_MAX_LEN]; 822aa10990SRohit Raj uint32_t efd; 832aa10990SRohit Raj }; 842aa10990SRohit Raj 852aa10990SRohit Raj __rte_internal 862aa10990SRohit Raj int dpaa_intr_enable(char *if_name, int efd); 872aa10990SRohit Raj 882aa10990SRohit Raj __rte_internal 892aa10990SRohit Raj int dpaa_intr_disable(char *if_name); 902aa10990SRohit Raj 917a292619SRohit Raj struct usdpaa_ioctl_link_status_args_old { 927a292619SRohit Raj /* network device node name */ 937a292619SRohit Raj char if_name[IF_NAME_MAX_LEN]; 94295968d1SFerruh Yigit /* link status(RTE_ETH_LINK_UP/DOWN) */ 957a292619SRohit Raj int link_status; 967a292619SRohit Raj }; 977a292619SRohit Raj 982aa10990SRohit Raj struct usdpaa_ioctl_link_status_args { 992aa10990SRohit Raj /* network device node name */ 1002aa10990SRohit Raj char if_name[IF_NAME_MAX_LEN]; 101295968d1SFerruh Yigit /* link status(RTE_ETH_LINK_UP/DOWN) */ 1022aa10990SRohit Raj int link_status; 103295968d1SFerruh Yigit /* link speed (RTE_ETH_SPEED_NUM_)*/ 1047a292619SRohit Raj int link_speed; 105295968d1SFerruh Yigit /* link duplex (RTE_ETH_LINK_[HALF/FULL]_DUPLEX)*/ 1067a292619SRohit Raj int link_duplex; 107295968d1SFerruh Yigit /* link autoneg (RTE_ETH_LINK_AUTONEG/FIXED)*/ 1087a292619SRohit Raj int link_autoneg; 1097a292619SRohit Raj 1102aa10990SRohit Raj }; 111f231d48dSRohit Raj 112f231d48dSRohit Raj struct usdpaa_ioctl_update_link_status_args { 113f231d48dSRohit Raj /* network device node name */ 114f231d48dSRohit Raj char if_name[IF_NAME_MAX_LEN]; 115295968d1SFerruh Yigit /* link status(RTE_ETH_LINK_UP/DOWN) */ 116f231d48dSRohit Raj int link_status; 117f231d48dSRohit Raj }; 118f231d48dSRohit Raj 1197a292619SRohit Raj struct usdpaa_ioctl_update_link_speed { 1207a292619SRohit Raj /* network device node name*/ 1217a292619SRohit Raj char if_name[IF_NAME_MAX_LEN]; 122295968d1SFerruh Yigit /* link speed (RTE_ETH_SPEED_NUM_)*/ 1237a292619SRohit Raj int link_speed; 124295968d1SFerruh Yigit /* link duplex (RTE_ETH_LINK_[HALF/FULL]_DUPLEX)*/ 1257a292619SRohit Raj int link_duplex; 1267a292619SRohit Raj }; 1272aa10990SRohit Raj 128f231d48dSRohit Raj __rte_internal 1297a292619SRohit Raj int dpaa_get_link_status(char *if_name, struct rte_eth_link *link); 1307a292619SRohit Raj __rte_internal 131f231d48dSRohit Raj int dpaa_update_link_status(char *if_name, int link_status); 1327a292619SRohit Raj __rte_internal 1337a292619SRohit Raj int dpaa_update_link_speed(char *if_name, int speed, int duplex); 1347a292619SRohit Raj __rte_internal 1357a292619SRohit Raj int dpaa_restart_link_autoneg(char *if_name); 1367a292619SRohit Raj __rte_internal 1377a292619SRohit Raj int dpaa_get_ioctl_version_number(void); 138f231d48dSRohit Raj 13923df3960SShreyansh Jain #endif /* __PROCESS_H */ 140