1*d81734caSHemant Agrawal /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) 2f09ede6cSShreyansh Jain * 3f09ede6cSShreyansh Jain * Copyright 2008-2016 Freescale Semiconductor Inc. 4*d81734caSHemant Agrawal * Copyright 2017 NXP 5f09ede6cSShreyansh Jain * 6f09ede6cSShreyansh Jain */ 7f09ede6cSShreyansh Jain 8f09ede6cSShreyansh Jain #ifndef __BMAN_PRIV_H 9f09ede6cSShreyansh Jain #define __BMAN_PRIV_H 10f09ede6cSShreyansh Jain 11f09ede6cSShreyansh Jain #include "dpaa_sys.h" 12f09ede6cSShreyansh Jain #include <fsl_bman.h> 13f09ede6cSShreyansh Jain 14f09ede6cSShreyansh Jain /* Revision info (for errata and feature handling) */ 15f09ede6cSShreyansh Jain #define BMAN_REV10 0x0100 16f09ede6cSShreyansh Jain #define BMAN_REV20 0x0200 17f09ede6cSShreyansh Jain #define BMAN_REV21 0x0201 18f09ede6cSShreyansh Jain 19f09ede6cSShreyansh Jain #define BMAN_PORTAL_IRQ_PATH "/dev/fsl-usdpaa-irq" 20f09ede6cSShreyansh Jain #define BMAN_CCSR_MAP "/dev/mem" 21f09ede6cSShreyansh Jain 22f09ede6cSShreyansh Jain /* This mask contains all the "irqsource" bits visible to API users */ 23f09ede6cSShreyansh Jain #define BM_PIRQ_VISIBLE (BM_PIRQ_RCRI | BM_PIRQ_BSCN) 24f09ede6cSShreyansh Jain 25f09ede6cSShreyansh Jain /* These are bm_<reg>_<verb>(). So for example, bm_disable_write() means "write 26f09ede6cSShreyansh Jain * the disable register" rather than "disable the ability to write". 27f09ede6cSShreyansh Jain */ 28f09ede6cSShreyansh Jain #define bm_isr_status_read(bm) __bm_isr_read(bm, bm_isr_status) 29f09ede6cSShreyansh Jain #define bm_isr_status_clear(bm, m) __bm_isr_write(bm, bm_isr_status, m) 30f09ede6cSShreyansh Jain #define bm_isr_enable_read(bm) __bm_isr_read(bm, bm_isr_enable) 31f09ede6cSShreyansh Jain #define bm_isr_enable_write(bm, v) __bm_isr_write(bm, bm_isr_enable, v) 32f09ede6cSShreyansh Jain #define bm_isr_disable_read(bm) __bm_isr_read(bm, bm_isr_disable) 33f09ede6cSShreyansh Jain #define bm_isr_disable_write(bm, v) __bm_isr_write(bm, bm_isr_disable, v) 34f09ede6cSShreyansh Jain #define bm_isr_inhibit(bm) __bm_isr_write(bm, bm_isr_inhibit, 1) 35f09ede6cSShreyansh Jain #define bm_isr_uninhibit(bm) __bm_isr_write(bm, bm_isr_inhibit, 0) 36f09ede6cSShreyansh Jain 37f09ede6cSShreyansh Jain /* 38f09ede6cSShreyansh Jain * Global variables of the max portal/pool number this bman version supported 39f09ede6cSShreyansh Jain */ 40f09ede6cSShreyansh Jain extern u16 bman_pool_max; 41f09ede6cSShreyansh Jain 42f09ede6cSShreyansh Jain /* used by CCSR and portal interrupt code */ 43f09ede6cSShreyansh Jain enum bm_isr_reg { 44f09ede6cSShreyansh Jain bm_isr_status = 0, 45f09ede6cSShreyansh Jain bm_isr_enable = 1, 46f09ede6cSShreyansh Jain bm_isr_disable = 2, 47f09ede6cSShreyansh Jain bm_isr_inhibit = 3 48f09ede6cSShreyansh Jain }; 49f09ede6cSShreyansh Jain 50f09ede6cSShreyansh Jain struct bm_portal_config { 51f09ede6cSShreyansh Jain /* 52f09ede6cSShreyansh Jain * Corenet portal addresses; 53f09ede6cSShreyansh Jain * [0]==cache-enabled, [1]==cache-inhibited. 54f09ede6cSShreyansh Jain */ 55f09ede6cSShreyansh Jain void __iomem *addr_virt[2]; 56f09ede6cSShreyansh Jain /* Allow these to be joined in lists */ 57f09ede6cSShreyansh Jain struct list_head list; 58f09ede6cSShreyansh Jain /* User-visible portal configuration settings */ 59f09ede6cSShreyansh Jain /* This is used for any "core-affine" portals, ie. default portals 60f09ede6cSShreyansh Jain * associated to the corresponding cpu. -1 implies that there is no 61f09ede6cSShreyansh Jain * core affinity configured. 62f09ede6cSShreyansh Jain */ 63f09ede6cSShreyansh Jain int cpu; 64f09ede6cSShreyansh Jain /* portal interrupt line */ 65f09ede6cSShreyansh Jain int irq; 66f09ede6cSShreyansh Jain /* the unique index of this portal */ 67f09ede6cSShreyansh Jain u32 index; 68f09ede6cSShreyansh Jain /* Is this portal shared? (If so, it has coarser locking and demuxes 69f09ede6cSShreyansh Jain * processing on behalf of other CPUs.). 70f09ede6cSShreyansh Jain */ 71f09ede6cSShreyansh Jain int is_shared; 72f09ede6cSShreyansh Jain /* These are the buffer pool IDs that may be used via this portal. */ 73f09ede6cSShreyansh Jain struct bman_depletion mask; 74f09ede6cSShreyansh Jain 75f09ede6cSShreyansh Jain }; 76f09ede6cSShreyansh Jain 77f09ede6cSShreyansh Jain int bman_init_ccsr(const struct device_node *node); 78f09ede6cSShreyansh Jain 79f09ede6cSShreyansh Jain struct bman_portal *bman_create_affine_portal( 80f09ede6cSShreyansh Jain const struct bm_portal_config *config); 81f09ede6cSShreyansh Jain const struct bm_portal_config *bman_destroy_affine_portal(void); 82f09ede6cSShreyansh Jain 83f09ede6cSShreyansh Jain /* Set depletion thresholds associated with a buffer pool. Requires that the 84f09ede6cSShreyansh Jain * operating system have access to Bman CCSR (ie. compiled in support and 85f09ede6cSShreyansh Jain * run-time access courtesy of the device-tree). 86f09ede6cSShreyansh Jain */ 87f09ede6cSShreyansh Jain int bm_pool_set(u32 bpid, const u32 *thresholds); 88f09ede6cSShreyansh Jain 89f09ede6cSShreyansh Jain /* Read the free buffer count for a given buffer */ 90f09ede6cSShreyansh Jain u32 bm_pool_free_buffers(u32 bpid); 91f09ede6cSShreyansh Jain 92f09ede6cSShreyansh Jain #endif /* __BMAN_PRIV_H */ 93