1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2019 Intel Corporation 3 */ 4 5 #ifndef _FPGA_LTE_FEC_H_ 6 #define _FPGA_LTE_FEC_H_ 7 8 #include <stdint.h> 9 #include <stdbool.h> 10 11 /** 12 * @file fpga_lte_fec.h 13 * 14 * Interface for Intel(R) FGPA LTE FEC device configuration at the host level, 15 * directly accessible by the application. 16 * Configuration related to LTE Turbo coding functionality is done through 17 * librte_bbdev library. 18 * 19 * @warning 20 * @b EXPERIMENTAL: this API may change without prior notice 21 */ 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /**< Number of Virtual Functions FGPA 4G FEC supports */ 28 #define FPGA_LTE_FEC_NUM_VFS 8 29 30 /** 31 * Structure to pass FPGA 4G FEC configuration. 32 */ 33 struct rte_fpga_lte_fec_conf { 34 /**< 1 if PF is used for dataplane, 0 for VFs */ 35 bool pf_mode_en; 36 /**< Number of UL queues per VF */ 37 uint8_t vf_ul_queues_number[FPGA_LTE_FEC_NUM_VFS]; 38 /**< Number of DL queues per VF */ 39 uint8_t vf_dl_queues_number[FPGA_LTE_FEC_NUM_VFS]; 40 /**< UL bandwidth. Needed for schedule algorithm */ 41 uint8_t ul_bandwidth; 42 /**< DL bandwidth. Needed for schedule algorithm */ 43 uint8_t dl_bandwidth; 44 /**< UL Load Balance */ 45 uint8_t ul_load_balance; 46 /**< DL Load Balance */ 47 uint8_t dl_load_balance; 48 /**< FLR timeout value */ 49 uint16_t flr_time_out; 50 }; 51 52 /** 53 * Configure Intel(R) FPGA LTE FEC device 54 * 55 * @param dev_name 56 * The name of the device. This is the short form of PCI BDF, e.g. 00:01.0. 57 * It can also be retrieved for a bbdev device from the dev_name field in the 58 * rte_bbdev_info structure returned by rte_bbdev_info_get(). 59 * @param conf 60 * Configuration to apply to FPGA 4G FEC. 61 * 62 * @return 63 * Zero on success, negative value on failure. 64 */ 65 __rte_experimental 66 int 67 rte_fpga_lte_fec_configure(const char *dev_name, 68 const struct rte_fpga_lte_fec_conf *conf); 69 70 #ifdef __cplusplus 71 } 72 #endif 73 74 #endif /* _FPGA_LTE_FEC_H_ */ 75