1.. SPDX-License-Identifier: BSD-3-Clause 2 Copyright(c) 2010-2014 Intel Corporation. 3 4Profile Your Application 5======================== 6 7The following sections describe methods of profiling DPDK applications on 8different architectures. 9 10 11Profiling on x86 12---------------- 13 14Intel processors provide performance counters to monitor events. 15Some tools provided by Intel, such as Intel® VTune™ Amplifier, can be used 16to profile and benchmark an application. 17See the *VTune Performance Analyzer Essentials* publication from Intel Press for more information. 18 19For a DPDK application, this can be done in a Linux* application environment only. 20 21The main situations that should be monitored through event counters are: 22 23* Cache misses 24 25* Branch mis-predicts 26 27* DTLB misses 28 29* Long latency instructions and exceptions 30 31Refer to the 32`Intel Performance Analysis Guide <http://software.intel.com/sites/products/collateral/hpc/vtune/performance_analysis_guide.pdf>`_ 33for details about application profiling. 34 35 36Profiling on ARM64 37------------------ 38 39Using Linux perf 40~~~~~~~~~~~~~~~~ 41 42The ARM64 architecture provide performance counters to monitor events. The 43Linux ``perf`` tool can be used to profile and benchmark an application. In 44addition to the standard events, ``perf`` can be used to profile arm64 45specific PMU (Performance Monitor Unit) events through raw events (``-e`` 46``-rXX``). 47 48For more derails refer to the 49`ARM64 specific PMU events enumeration <http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100095_0002_04_en/way1382543438508.html>`_. 50 51 52Low-resolution generic counter 53~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 54 55The default ``cntvct_el0`` based ``rte_rdtsc()`` provides a portable means to 56get a wall clock counter in user space. Typically it runs at a lower clock frequency than the CPU clock frequency. 57Cycles counted using this method should be scaled to CPU clock frequency. 58 59 60High-resolution cycle counter 61~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 62 63The alternative method to enable ``rte_rdtsc()`` for a high resolution wall 64clock counter is through the ARMv8 PMU subsystem. The PMU cycle counter runs 65at CPU frequency. However, access to the PMU cycle counter from user space is 66not enabled by default in the arm64 linux kernel. It is possible to enable 67cycle counter for user space access by configuring the PMU from the privileged 68mode (kernel space). 69 70By default the ``rte_rdtsc()`` implementation uses a portable ``cntvct_el0`` 71scheme. 72 73The example below shows the steps to configure the PMU based cycle counter on 74an ARMv8 machine. 75 76.. code-block:: console 77 78 git clone https://github.com/jerinjacobk/armv8_pmu_cycle_counter_el0 79 cd armv8_pmu_cycle_counter_el0 80 make 81 sudo insmod pmu_el0_cycle_counter.ko 82 83Please refer to :doc:`../linux_gsg/build_dpdk` for details on compiling DPDK with meson. 84 85.. warning:: 86 87 The PMU based scheme is useful for high accuracy performance profiling with 88 ``rte_rdtsc()``. However, this method can not be used in conjunction with 89 Linux userspace profiling tools like ``perf`` as this scheme alters the PMU 90 registers state. 91